J500 LINEAR | Alldatasheet

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SECOND SOURCE FOR SILICONIX J500 SERIES WIDE CURRENT RANGE 0.192 to 5.6mA BIASING NOT REQUIRED VGS = 0V ABSOLUTE MAXIMUM RATINGS1 @ 25 °C (unless otherwise stated) Maximum Temperatures Storage Temperature -55 to 150°C Junction Operating Temperature -55 to 135°C Maximum Power Dissipation Continuous Power Dissipation @125°C 360mW Maximum Currents Forward Current 20mA Reverse Current 50mA Maximum Voltages Peak Operating Voltage POV = 50V COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL CHARACTERISTIC MIN TYP MAX UNITS CONDITIONS POV Peak Operating Voltage2 50 V IF = 1.1IF(max) VR Reverse Voltage 0.8 V IR = 1mA CF Forward Capacitance 2.2 pF VF = 25V, f = 1MHz SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) Forward Current3 IF Dynamic Impedance4 Zd Knee Impedance Zk Limiting Voltage5 VL VF = 25V VF = 25V VF = 6V IF = 0.8IF(min) PART MIN NOM MAX MIN TYP TYP TYP MAX A K A K TO-92 BOTTOM VIE W AK Linear Integrated Systems J500 SERIES CURRENT REGULATING DIODES Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261

V-I CHARACTERISTICS CURRENT REGULTING DIODE POVIFZk VL VR VR IR IF VF rDS PACKAGING DETAILS LS XXX YYWW 0.170 0.195 0.500 0.610 0.016 0.022 0.095 0.105 0.175 0.195 0.130 0.155 0.045 0.060 0.014 0.020 TO-92 DIMENSIONS IN INCHES. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 1. Absolute maximum ratings are limiting values above which serviceability may be impaired. 2. Pulsed, t = 2ms. Maximum VF where IF < 1.1IF(max). 3. Pulsed, t = 2ms. Continuous currents may vary. 4. Pulsed, t = 2ms. Continuous impedances may vary. 5. Min VF required to ensure IF = 0.8IF(min). Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.