IPT019N08N5 INFINEON | Alldatasheet

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Technical content

Features

  • Idealforhighfrequencyswitchingandsync.rec.
  • ExcellentgatechargexRDS(on)product(FOM)
  • Verylowon-resistanceRDS(on)
  • N-channel,normallevel
  • 100%avalanchetested
  • Pb-freeplating;RoHScompliant
  • Halogen-freeaccordingtoIEC61249-2-21 Productvalidation FullyqualifiedaccordingtoJEDECforIndustrialApplications Table1KeyPerformanceParameters Parameter Value Unit VDS 80 V RDS(on),max 1.9 mΩ ID 247 A Qoss 119 nC QG(0V..10V) 101 nC Type/OrderingCode Package Marking RelatedLinks IPT019N08N5 PG-HSOF-8 019N08N5 -

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet TableofContents

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Continuous drain current ID 247 175 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=10V,TA=25°C, RTHJA=40°C/W1) Pulsed drain current2) ID,pulse - - 988 A TA=25°C Avalanche energy, single pulse3) EAS - - 264 - ID=150A,RGS=25Ω Gate source voltage VGS -20 - 20 - - Power dissipation Ptot - - 231 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 2Thermalcharacteristics Table3Thermalcharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Thermal resistance, junction - case RthJC - 0.4 0.65 °C/W - Device on PCB, minimal footprint RthJA - - 62 °C/W - Device on PCB, 6 cm² cooling area1) RthJA - - 40 °C/W - 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Drain-source breakdown voltage V(BR)DSS 80 - - V VGS=0V,ID=1mA Gate threshold voltage VGS(th) 2.2 3.0 3.8 V VDS=VGS,ID=159µA Zero gate voltage drain current IDSS 0.1 100 µA VDS=80V,VGS=0V,Tj=25°C VDS=80V,VGS=0V,Tj=125°C Gate-source leakage current IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) 1.6 2.2 1.9 2.7 mΩ VGS=10V,ID=150A VGS=6V,ID=75A Gate resistance1) RG - 1.4 2.1 Ω - Transconductance gfs 95 190 - S |VDS|≥2|ID|RDS(on)max,ID=100A Table5Dynamiccharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Input capacitance1) Ciss - 7100 9200 pF VGS=0V,VDS=40V,f=1MHz Output capacitance1) Coss - 1100 1400 pF VGS=0V,VDS=40V,f=1MHz Reverse transfer capacitance1) Crss - 51 89 pF VGS=0V,VDS=40V,f=1MHz Turn-on delay time td(on) - 17 - ns VDD=40V,VGS=10V,ID=100A, RG,ext=1.8Ω Rise time tr - 12 - ns VDD=40V,VGS=10V,ID=100A, RG,ext=1.8Ω Turn-off delay time td(off) - 39 - ns VDD=40V,VGS=10V,ID=100A, RG,ext=1.8Ω Fall time tf - 17 - ns VDD=40V,VGS=10V,ID=100A, RG,ext=1.8Ω Table6Gatechargecharacteristics2) Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Gate to source charge Qgs - 33 - nC VDD=40V,ID=100A,VGS=0to10V Gate charge at threshold Qg(th) - 21 - nC VDD=40V,ID=100A,VGS=0to10V Gate to drain charge1) Qgd - 22 32 nC VDD=40V,ID=100A,VGS=0to10V Switching charge Qsw - 34 - nC VDD=40V,ID=100A,VGS=0to10V Gate charge total1) Qg - 101 127 nC VDD=40V,ID=100A,VGS=0to10V Gate plateau voltage Vplateau - 4.7 - V VDD=40V,ID=100A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 87 - nC VDS=0.1V,VGS=0to10V Output charge2) Qoss - 119 159 nC VDS=40V,VGS=0V 1) Defined by design. Not subject to production test. 2) See ″Gate charge waveforms″ for parameter definition

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet Table7Reversediode Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Diode continuous forward current IS - - 171 A TC=25°C Diode pulse current IS,pulse - - 988 A TC=25°C Diode forward voltage VSD - 0.87 1.2 V VGS=0V,IF=100A,Tj=25°C Reverse recovery time1) trr - 46 92 ns VR=40V,IF=100A,diF/dt=100A/µs Reverse recovery charge1) Qrr - 122 244 nC VR=40V,IF=100A,diF/dt=100A/µs 1) Defined by design. Not subject to production test.

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation TC[°C] Ptot[W] 100 125 150 175 200 120 160 200 240 Ptot=f(TC) Diagram2:Draincurrent TC[°C] ID[A] 100 125 150 175 200 100 150 200 250 ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea VDS[V] ID[A] 10-1 100 101 102 10-2 10-1 100 101 102 103 104 1 µs 10 µs 100 µs 1 ms 10 ms DC ID=f(VDS);TC=25°C;D=0;parameter:tp Diagram4:Max.transientthermalimpedance tp[s] ZthJC[K/W] 10-5 10-4 10-3 10-2 10-1 100 10-2 10-1 100 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 ZthJC=f(tp);parameter:D=tp/T

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet Diagram5:Typ.outputcharacteristics VDS[V] ID[A] 200 400 600 800 1000 8 V 10 V 7 V 6 V 5 V 4.5 V ID=f(VDS),Tj=25°C;parameter:VGS Diagram6:Typ.drain-sourceonresistance ID[A] RDS(on)[mΩ ] 100 200 300 400 500 4.5 V 5 V 6 V 7 V 8 V 10 V RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics VGS[V] ID[A] 200 400 600 800 1000 175 °C 25 °C ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Diagram8:Typ.drain-sourceonresistance VGS[V] RDS(on)[mΩ ] 25 °C 175 °C RDS(on)=f(VGS),ID=150A;parameter:Tj

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet Diagram9:Normalizeddrain-sourceonresistance Tj[°C] RDS(on)(normalizedto25°C) -80 -40 120 160 200 0.0 0.4 0.8 1.2 1.6 2.0 RDS(on)=f(Tj),ID=150A,VGS=10V Diagram10:Typ.gatethresholdvoltage Tj[°C] VGS(th)[V] -80 -40 120 160 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1590 µA 159 µA VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances VDS[V] C[pF] 101 102 103 104 Ciss Coss Crss C=f(VDS);VGS=0V;f=1MHz Diagram12:Forwardcharacteristicsofreversediode VSD[V] IF[A] 0.00 0.25 0.50 0.75 1.00 1.25 1.50 100 101 102 103 25 °C 25 °C, max 175 °C 175 °C, max IF=f(VSD);parameter:Tj

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet Diagram13:Avalanchecharacteristics tAV[µs] IAV[A] 100 101 102 103 100 101 102 103 25 °C 100 °C 150 °C IAS=f(tAV);RGS=25Ω ;parameter:Tj,start Diagram14:Typ.gatecharge Qgate[nC] VGS[V] 100 120 16 V 40 V 64 V VGS=f(Qgate),ID=100Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Tj[°C] VBR(DSS)[V] -80 -40 120 160 200 VBR(DSS)=f(Tj);ID=1mA Diagram Gate charge waveforms

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet 5PackageOutlines Z8B00169619 REVISIONISSUE DATE EUROPEAN PROJECTION 0220-02-2014 DOCUMENT NO. E5E4 e MILLIMETERSADIMMINMAXINCHESMINMAXb1cDD2EE1 NL 1.60 9.900.6010.5810.10 2.10 0.3820.0160.4050.382 0.063 0.3900.0240.4160.398 0.0838 8 1.20 (BSC)0.047 (BSC) b 0.700.900.0280.0351) partially covered with Mold Flash b20.420.500.0170.020 2SCALE0 4mm Figure1OutlinePG-HSOF-8,dimensionsinmm/inches

OptiMOSTM5Power-Transistor,80V IPT019N08N5 Rev.2.0,2019-03-26Final Data Sheet RevisionHistory IPT019N08N5 Revision:2019-03-26,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2019-03-26 Release of final version Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2018InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics (“Beschaffenheitsgarantie”). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer’scompliancewithitsobligationsstatedinthis documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer’sproductsandanyuseofthe productofInfineonTechnologiesincustomer’sapplications. Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer’s technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct informationgiveninthisdocumentwithrespecttosuchapplication. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered.