IPA029N06NM5S

IPA029N06NM5S INFINEON | Alldatasheet

Document overview

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Technical content

Features

• Idealforhighfrequencyswitchingandsync.rec.
• ExcellentgatechargexRDS(on)product(FOM)
• Verylowon-resistanceRDS(on)
• N-channel,normallevel
• 100%avalanchetested
• Pb-freeplating;RoHScompliant
• Halogen-freeaccordingtoIEC61249-2-21 Productvalidation QualifiedaccordingtoJEDECStandard Table1KeyPerformanceParameters Parameter Value Unit VDS 60 V RDS(on),max 2.9 mΩ ID 87 A Qoss 65 nC QG(0V..10V) 56 nC Type/OrderingCode Package Marking RelatedLinks IPA029N06NM5S PG-TO 220 FullPAK 029N065S -

OptiMOSTM5Power-Transistor,60V IPA029N06NM5S Rev.2.1,2019-09-02Final Data Sheet TableofContents

OptiMOSTM5Power-Transistor,60V IPA029N06NM5S Rev.2.1,2019-09-02Final Data Sheet 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Continuous drain current ID

62 A VGS=10V,TC=25°C

VGS=10V,TC=100°C Pulsed drain current1) ID,pulse - - 348 A TC=25°C Avalanche energy, single pulse2) EAS - - 140 mJ ID=87A,RGS=25Ω Gate source voltage VGS -20 - 20 V - Power dissipation Ptot - - 38 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 2Thermalcharacteristics Table3Thermalcharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Thermal resistance, junction - case RthJC - 2.9 3.9 °C/W - 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Drain-source breakdown voltage V(BR)DSS 60 - - V VGS=0V,ID=1mA Gate threshold voltage VGS(th) 2.1 2.8 3.3 V VDS=VGS,ID=75µA Zero gate voltage drain current IDSS 0.1 100 µA VDS=60V,VGS=0V,Tj=25°C VDS=60V,VGS=0V,Tj=125°C Gate-source leakage current IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) 2.8 3.6 2.9 - mΩ VGS=10V,ID=87A VGS=6V,ID=22A Gate resistance3) RG - 1.3 - Ω - Transconductance gfs - 140 - S |VDS|≥2|ID|RDS(on)max,ID=87A 1) See Diagram 3 for more detailed information 2) See Diagram 13 for more detailed information 3) Defined by design. Not subject to production test.

OptiMOSTM5Power-Transistor,60V IPA029N06NM5S Rev.2.1,2019-09-02Final Data Sheet Table5Dynamiccharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Input capacitance1) Ciss - 4100 5300 pF VGS=0V,VDS=30V,f=1MHz Output capacitance Coss - 980 - pF VGS=0V,VDS=30V,f=1MHz Reverse transfer capacitance Crss - 39 - pF VGS=0V,VDS=30V,f=1MHz Turn-on delay time td(on) - 16 - ns VDD=30V,VGS=10V,ID=87A, RG,ext=3Ω Rise time tr - 15 - ns VDD=30V,VGS=10V,ID=87A, RG,ext=3Ω Turn-off delay time td(off) - 30 - ns VDD=30V,VGS=10V,ID=87A, RG,ext=3Ω Fall time tf - 11 - ns VDD=30V,VGS=10V,ID=87A, RG,ext=3Ω Table6Gatechargecharacteristics2) Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Gate to source charge Qgs - 19 - nC VDD=30V,ID=87A,VGS=0to10V Gate charge at threshold Qg(th) - 11 - nC VDD=30V,ID=87A,VGS=0to10V Gate to drain charge Qgd - 11 - nC VDD=30V,ID=87A,VGS=0to10V Switching charge Qsw - 19 - nC VDD=30V,ID=87A,VGS=0to10V Gate charge total1) Qg - 56 74 nC VDD=30V,ID=87A,VGS=0to10V Gate plateau voltage Vplateau - 4.8 - V VDD=30V,ID=87A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 49 - nC VDS=0.1V,VGS=0to10V Output charge Qoss - 65 - nC VDD=30V,VGS=0V Table7Reversediode Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Diode continuous forward current IS - - 32 A TC=25°C Diode pulse current IS,pulse - - 348 A TC=25°C Diode forward voltage VSD - 0.86 1.2 V VGS=0V,IF=32A,Tj=25°C Reverse recovery time1) trr - 36 - ns VR=30V,IF=30A,diF/dt=100A/µs Reverse recovery charge1) Qrr - 31 - nC VR=30V,IF=30A,diF/dt=100A/µs 1) Defined by design. Not subject to production test. 2) See ″Gate charge waveforms″ for parameter definition

OptiMOSTM5Power-Transistor,60V IPA029N06NM5S Rev.2.1,2019-09-02Final Data Sheet 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation TC[°C] Ptot[W] 100 125 150 175 200 Ptot=f(TC) Diagram2:Draincurrent TC[°C] ID[A] 100 125 150 175 200 100 ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea VDS[V] ID[A] 10-1 100 101 102 10-2 10-1 100 101 102 103 1 µs 10 µs 100 µs 1 ms 10 ms DC ID=f(VDS);TC=25°C;D=0;parameter:tp Diagram4:Max.transientthermalimpedance tp[s] ZthJC[K/W] 10-5 10-4 10-3 10-2 10-1 100 101 10-2 10-1 100 101 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 ZthJC=f(tp);parameter:D=tp/T

OptiMOSTM5Power-Transistor,60V IPA029N06NM5S Rev.2.1,2019-09-02Final Data Sheet Diagram5:Typ.outputcharacteristics VDS[V] ID[A] 100 150 200 250 300 350 7 V 8 V 10 V 6 V 5 V 4.5 V ID=f(VDS),Tj=25°C;parameter:VGS Diagram6:Typ.drain-sourceonresistance ID[A] RDS(on)[mΩ ] 100 125 150 175 4.5 V 5 V 6 V 7 V 8 V 10 V RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics VGS[V] ID[A] 100 150 200 250 300 350 175 °C 25 °C ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Diagram8:Typ.drain-sourceonresistance VGS[V] RDS(on)[mΩ ] 175 °C 25 °C RDS(on)=f(VGS),ID=87A;parameter:Tj

OptiMOSTM5Power-Transistor,60V IPA029N06NM5S Rev.2.1,2019-09-02Final Data Sheet Diagram9:Normalizeddrain-sourceonresistance Tj[°C] RDS(on)(normalizedto25°C) -80 -40 120 160 200 0.0 0.4 0.8 1.2 1.6 2.0 RDS(on)=f(Tj),ID=87A,VGS=10V Diagram10:Typ.gatethresholdvoltage Tj[°C] VGS(th)[V] -80 -40 120 160 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 750 µA 75 µA VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances VDS[V] C[pF] 101 102 103 104 Ciss Coss Crss C=f(VDS);VGS=0V;f=1MHz Diagram12:Forwardcharacteristicsofreversediode VSD[V] IF[A] 0.00 0.25 0.50 0.75 1.00 1.25 1.50 100 101 102 103 25 °C 25 °C, max 175 °C 175 °C, max IF=f(VSD);parameter:Tj

OptiMOSTM5Power-Transistor,60V IPA029N06NM5S Rev.2.1,2019-09-02Final Data Sheet Diagram13:Avalanchecharacteristics tAV[µs] IAV[A] 100 101 102 103 10-1 100 101 102 25 °C 100 °C 150 °C IAS=f(tAV);RGS=25Ω ;parameter:Tj,start Diagram14:Typ.gatecharge Qgate[nC] VGS[V] 12 V 30 V 48 V VGS=f(Qgate),ID=87Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Tj[°C] VBR(DSS)[V] -80 -40 120 160 200 VBR(DSS)=f(Tj);ID=1mA Diagram Gate charge waveforms

OptiMOSTM5Power-Transistor,60V IPA029N06NM5S Rev.2.1,2019-09-02Final Data Sheet 5PackageOutlines DIMENSIONSMIN.MAX.A2 H b Dcb2 EeLQøPL1 AA1 2.862.42 2.5428.70 1.2015.670.40 0.65 0.90 0.631.5016.15 Z8B00181328REVISIONISSUE DATE EUROPEAN PROJECTION 0323.07.20180 5mm DOCUMENT NO. 5:1234 123 Figure1OutlinePG-TO220FullPAK,dimensionsinmm/inches

OptiMOSTM5Power-Transistor,60V IPA029N06NM5S Rev.2.1,2019-09-02Final Data Sheet RevisionHistory IPA029N06NM5S Revision:2019-09-02,Rev.2.1 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2019-07-23 Release of final version 2.1 2019-09-02 Update package outline Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2019InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics (“Beschaffenheitsgarantie”). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer’scompliancewithitsobligationsstatedinthis documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer’sproductsandanyuseofthe productofInfineonTechnologiesincustomer’sapplications. Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer’s technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct informationgiveninthisdocumentwithrespecttosuchapplication. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered.