IP4254

IP4251 NXP | Alldatasheet

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Technical content

1. Product profile

1.1 General description

The IP425x family consists of 4-, 6- and 8-channel RC low-pass filter arrays which are designed to provide filtering of undesired RF signals on the I/O ports of portable communication or computing devices. In addition, the IP425x family incorporates diodes to provide protection to downstream components from ElectroStatic Discharge (ESD) voltages as high as±30 kV. The IP425x family is fabricated using monolithic silicon technology and integrates up to 8 resistors and 16 diodes in a 0.4 mm pitch 8-, 12- or 16-pin MicroPak (compatible with QFN) lead-free plastic package with a height of 0.5 mm only.

1.2 Features

n Pb-free, Restriction of the use of certain Hazardous Substances (RoHS) and dark green compliant n 4-, 6- and 8-channel integratedπ-type RC filter network n IP4251CZ8/CZ12/CZ16: 100Ω channel series resistance, 10 pF (at 2.5 V DC) channel capacitance n IP4252CZ8/CZ12/CZ16: 40Ω channel series resistance, 12 pF (at 2.5 V DC) channel capacitance n IP4253CZ8/CZ12/CZ16: 200Ω channel series resistance, 30 pF (at 2.5 V DC) channel capacitance n IP4254CZ8/CZ12/CZ16: 100Ω channel series resistance, 30 pF (at 2.5 V DC) channel capacitance n ESD protection to±30 kV contact discharge according to IEC 61000-4-2 standard far exceeding level 4 n MicroPak (QFN compatible) plastic package with 0.4 mm pitch

1.3 Applications

n General purpose ElectroMagnetic Interference (EMI) and Radio-Frequency Interference (RFI) filtering and downstream ESD protection for: u Cellular and Personal Communication System (PCS) mobile handsets u Cordless telephones u Wireless data (WAN/LAN) systems u PDAs IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network with ESD protection to IEC 61000-4-2, level 4 Rev. 03 — 6 May 2009 Product data sheet

Table 1. Pinning IP425xCZx

Table 2. Ordering information

IEC 61000-4-2 model. All devices far exceed IEC 61000-4-2, level 4. [1] Depends on layout details. Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 4. Thermal characteristics

Table 5. Channel resistance Tamb = 25°C unless otherwise specified. Table 6. Channel characteristics Tamb = 25°C unless otherwise specified.

7.1 Insertion loss

simulated insertion loss for IP4252 is depicted inFigure2. The insertion loss was measured using the test set-up as depicted inFigure1. Table 7. Frequency characteristics Tamb = 25°C unless otherwise specified.

800 MHz < f < 3 GHz - 16 - dB

800 MHz < f < 3 GHz

800 MHz < f < 3 GHz - 12 - dB

800 MHz < f < 3 GHz - 33 - dB

800 MHz < f < 3 GHz - 28 - dB

IP4251_52_53_54_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 6 May 2009 7 of 16 NXP Semiconductors IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network (1) IP4252CZ16 - ch1 to ch16 (2) IP4251CZ16 - ch1 to ch16 (3) IP4254CZ16 - ch1 to ch16 (4) IP4253CZ16 - ch1 to ch16 Fig 1. Frequency response set-up Fig 2. IP425x family frequency response curves OUT 001aag218 50 Ω 50 Ω Vgen DUT IN 001aaj308 −30 −20 −40 −10 S21 (dB) −50 f (MHz) 10−1 10410311 0 210 (1) (2) (3) (4) (1) IP4251CZ16 - ch1 to ch16 (2) IP4251CZ16 - ch4 to ch13 (1) IP4252CZ16 - ch1 to ch16 (2) IP4252CZ16 - ch4 to ch13 Fig 3. IP4251 frequency response curves Fig 4. IP4252 frequency response curves 001aaj608 −30 −20 −40 −10 S21 (dB) −50 f (MHz) 10−1 10410311 0 210 (1) (2) 001aaj609 −30 −20 −40 −10 S21 (dB) −50 f (MHz) 10−1 10410311 0 210 (1) (2)

IP4251_52_53_54_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 6 May 2009 8 of 16 NXP Semiconductors IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network Due to the optimized silicon dice and package design, all channels in a single package show a very good matching performance as the insertion loss for a channel at the package side (e.g. ch1 to ch16) is nearly identical with the center channels (e.g. ch4 to ch13). Typical measurements results are shown in Figure3 toFigure6 for the different devices.

7.2 Selection

The IP425x family is mainly designed as EMI/RFI filters for multi-channel interfaces. The selection of one of the filter devices has to be performed dependent on the maximum clock frequency, driver strength, capacitive load of the sink, and also the maximum applicable rise and fall times.

7.2.1 SD(HC) and MMC memory interface

The Secure Digital High Capacity (SDHC) memory card interface standard specification and the MultiMediaCard (MMC) (JESD 84A43) standard specification recommend a rise and fall time of 25 % to 62.5 % (62.5 % to 25 % respectively) of 3 ns or less for the input signal of the receiving interface side. Assuming a typical capacitance of about 20 pF for the SDHC memory card itself, and approximately 4 pF to 7 pF for the PCB and the card holder, IP4252CZ12-6 (6 channels, R s(ch)=4 0Ω ,C ch =1 2p Fa tVbias(DC)= 2.5 V) is a matching selection to filter and protect all relevant interface pins such as CLK, CMD, and DAT0 to DAT3/CD. Please refer to Figure7 for a general example of the implementation of the IP4252 in an SD(HC) card interface. In case additional channels such as write-protect or a mechanical card detection switch are used, the IP4252CZ16-8 (8 channels, Rs(ch)=4 0Ω , Cch = 12 pF at Vbias(DC)= 2.5 V) offers two additional channels. (1) IP4253CZ16 - ch1 to ch16 (2) IP4253CZ16 - ch4 to ch13 (1) IP4254CZ16 - ch4 to ch13 (2) IP4254CZ16 - ch1 to ch16 Fig 5. IP4253 frequency response curves Fig 6. IP4254 frequency response curves 001aaj610 −30 −20 −40 −10 S21 (dB) −50 f (MHz) 10−1 10410311 0 210 (1) (2) 001aaj611 −30 −20 −40 −10 S21 (dB) −50 f (MHz) 10−1 10410311 0 210 (1) (2)

IP4251_52_53_54_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 6 May 2009 9 of 16 NXP Semiconductors IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network The capacitance values specified for the signal channels of the MMC interface differ from the SD(HC) specification. The MMC card side interface is specified to have an intrinsic capacitance of 12 pF to 18 pF and the total channel is limited according the specification to 30 pF only. Therefore, any filter device capacitance is limited to a maximum of up to 18 pF , including the card holder and PCB traces. Please refer to Figure8 for a general example of the implementation of the IP4252 in a MultiMediaCard interface application. Fig 7. Example of IP4252 in an SD(HC) card interface 001aaj310 IP4252CZ12-6 (IP4252CZ16-8) DAT1 pull-up resistors 10 kW - 100 kW 10 kW - 90 kW DAT3/CD pull-up 10 kW - 100 kW DAT3/CD pull-up >270 kW exact value depends on required logic levels DAT1 SD MEMORY CARD SET_CLR_ CARD_DETECT (ACMD42) to HOST INTERFACE DAT0 GND CLK VCC (VSD ) VCC (VSD ) DAT3/CD CMD DAT2 optional: 2-additional channels of IP4252CZ16-8 optional: write protect switch optional: electrical card detect WP DAT0 CLK CMD DAT3/CD DAT2 CD WP optional: card detect switch CD

IP4251_52_53_54_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 6 May 2009 10 of 16 NXP Semiconductors IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network To generate SDHC- and MMC-compliant digital signals, the driver strength should not significantly undercut 8 mA.

7.2.2 LCD interfaces, medium-speed interfaces

For digital interfaces such as LCD display interfaces running at clock speeds between

10 MHz and 25 MHz or more, IP4251, IP4252, or IP4254 can be used in dependency of

the sink load, clock speed, driver strength and rise and fall time requirements. Also the minimum EMI filter requirements may be a decision-making factor.

7.2.3 Keypad, low-speed interfaces

Especially for lower-speed interfaces such as keypads, low-speed serial interfaces (e.g. RS232) and low-speed control signals, IP4253 (R s(ch)= 200Ω , Cch = 30 pF at Vbias(DC)= 2.5 V) offers a very robust ESD protection and strong suppression of unwanted frequencies (EMI-filtering). Fig 8. Example of IP4252 in an MMC interface 001aaj309 IP4252CZ12-6 IP4252CZ8-4 DAT1 pull-up resistors 50 kW - 100 kW CMD pull-up 4.7 kW - 100 kW DAT1 C8 e.g. RSMMC HOST INTERFACE DAT0 C7 DAT7 C13 VSS2 C6 DAT6 C12 CLK C5 VCC (VMMC ) VCC (VMMC ) VSS1 C3 DAT5 C11 CMD C2 DAT4 C10 DAT3 C1 DAT2 CMD DAT4 DAT3 DAT2 C9 DAT0 DAT7 DAT6 CLK DAT5

IP4251_52_53_54_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 6 May 2009 11 of 16 NXP Semiconductors IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network 8. Package outline Fig 9. Package outline SOT983-1 (HXSON8U) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT983-1 07-01-12 07-11-14 UNIT A max mm 0.5 0.05 0.00 0.25 0.15 1.75 1.65 1.5 1.3 1.4 1.3 0.5 0.3 1.2 0.35 0.15 0.05 A 1 DIMENSIONS (mm are the original dimensions) HXSON8U: plastic thermal enhanced extremely thin small outline package; no leads; 8 terminals; UTLP based; body 1.35 x 1.7 x 0.5 mm 0 0.5 1 mm scale b D D h E E h e 0.4 e1 L v 0.1 w y 0.05 0.09 0.00 0.1 X B A terminal 1 index area D E Cy1 C y detail X A b e 1/2 e AC Bv M Cw M terminal 1 index area D h Eh L

IP4251_52_53_54_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 6 May 2009 12 of 16 NXP Semiconductors IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network Fig 10. Package outline SOT984-1 (HXSON12U) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT984-1 07-01-12 07-11-14 UNIT A max mm 0.5 0.05 0.00 0.25 0.15 2.55 2.45 2.3 2.1 1.4 1.3 0.5 0.3 2 0.35 0.15 0.05 A 1 DIMENSIONS (mm are the original dimensions) HXSON12U: plastic thermal enhanced extremely thin small outline package; no leads; 12 terminals; UTLP based; body 1.35 x 2.5 x 0.5 mm 0 0.5 1 mm scale b D D h E E h e 0.4 e1 L 0.09 0.00 L1 v 0.1 w y 0.05 0.1 X B A terminal 1 index area D E Cy1 C y detail X A b e 1/2 e AC Bv M Cw M terminal 1 index area D h Eh L 12 7

IP4251_52_53_54_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 6 May 2009 13 of 16 NXP Semiconductors IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network Fig 11. Package outline SOT985-1 (HXSON16U) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT985-1 07-01-12 07-11-14 UNIT A max mm 0.5 0.05 0.00 0.25 0.15 3.35 3.25 3.1 2.9 1.4 1.3 0.5 0.3 2.8 0.35 0.15 0.05 A 1 DIMENSIONS (mm are the original dimensions) HXSON16U: plastic thermal enhanced extremely thin small outline package; no leads; 16 terminals; UTLP based; body 1.35 x 3.3 x 0.5 mm 0 0.5 1 mm scale b D D h E E h e 0.4 e1 L 0.09 0.00 L1 v 0.1 w y 0.05 0.1 X B A terminal 1 index area D E Cy1 C y detail X A b e 1/2 e AC Bv M Cw M terminal 1 index area D h Eh L 16 9

Table 8. Revision history Modifications: • Added product types IP4251x and IP4252x.

• Added chapterSection 7 “Application information”. IP4253_54_CZ8_CZ12_CZ16_2 20071108 Product data sheet - IP4253_54_CZ8_CZ12_CZ16_1 IP4253_54_CZ8_CZ12_CZ16_1 20070209 Objective data sheet - -

IP4251_52_53_54_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 6 May 2009 15 of 16 NXP Semiconductors IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network 10. Legal information

10.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

10.2 Definitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

10.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control —This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

10.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 11. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

NXP Semiconductors IP4251/52/53/54 Integrated 4-, 6- and 8-channel passive filter network © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 6 May 2009 Document identifier: IP4251_52_53_54_3 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 12. Contents