IMT65R010M2H INFINEON | Alldatasheet
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Technical content
Features
Fully qualified according to JEDEC for Industrial Applications Please note: The source and driver source pins are not exchangeable. Their exchange might lead to malfunction. Table 1 Key performance parameters Parameter Value Unit V over full T 650 V R 10.0 mΩ R 13.1 mΩ Q 113 nC I 575 A Q @ 400 V 212 nC E @ 400 V 28.8 μJ TOLL Type / Ordering code Package Marking Related links IMT65R010M2H PG‑HSOF‑8 65R010M2 see Appendix A Ultra‑low switching losses• Benchmark gate threshold voltage, = 4.5 VV• GS(th) Robust against parasitic turn‑on even with 0 V turn‑off gate voltage• Flexible driving voltage and compatible with bipolar driving scheme• Robust body diode operation under hard commutation events• .XT interconnection technology for best‑in‑class thermal performance• Enables high efficiency and high power density designs• Facilitates great ease of use and integration• Provides the best price performance ratio compared to Industry’s most ambitious roadmaps Reduces the size, weight and bill of materials of the systems• Enhances system robustness and reliability• SMPS• Solar PV inverters• Energy storage and battery formation• UPS• EV charging infrastructure• Motor drives• DSS j,range DS(on),typ DS(on),max G,typ D,pulse oss oss Public IMT65R010M2H Final datasheet Drain Tab Gate Pin 1 Source Pin 3-8 Driver Source Pin 2 *1: Internal body diode
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 2 Revision 2.0 https://www.infineon.com 2024‑11‑06 Table of contents
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 3 Revision 2.0 https://www.infineon.com 2024‑11‑06
1 Maximum ratings
at = 25°C, unless otherwise specified.T Note: for optimum lifetime and reliability, Infineon recommends operating conditions that do not exceed 80% of the maximum ratings stated in this datasheet. Table 2 Maximum ratings Parameter Symbol Values Unit Note / Test condition Min. Typ. Max. Continuous DC drain current 1) I ‑ ‑ 168
126 A T = 25°C
= 100°CT Peak drain current 2) I ‑ ‑ 575 A T = 25°C, = 18 VV Avalanche energy, single pulse E ‑ ‑ 534 mJ I = 20 A, = 50 V; see table 11V Avalanche energy, repetitive E ‑ ‑ 2.67 mJ Avalanche current, single pulse I ‑ ‑ 20.0 A ‑ MOSFET ruggednessdv/dt dv/dt ‑ ‑ 200 V/ns V = 0...400 V Gate source voltage (static) 3) V ‑7 ‑ 23 V ‑ Gate source voltage (transient) V ‑10 ‑ 25 V t ≤ 500 ns, duty cycle ≤ 1% Power dissipation P ‑ ‑ 681 W T = 25°C Storage temperature T ‑55 ‑ 150 °C ‑Operating junction temperature T ‑55 ‑ 175 °C Mounting torque ‑ ‑ ‑ n.a. Ncm Continuous reverse drain current 1) I ‑ ‑ 168
93 A V = 18 V, = 25°C T
= 0 V, = 25°CV T Peak reverse drain current 2) I ‑ ‑ 575
173 A T = 25°C, ≤ 250 ns t
= 25°CT Insulation withstand voltage V ‑ ‑ n.a. V V , = 25°C, = 1 minT t Limited by .1) T Pulse width limited by .2) t T The maximum gate‑source voltage in the application design should be in accordance to IPC‑9592B.3) j DDC c c DM c GS AS D DD AR AS DS GS GS p tot c stg j SDC GS c GS c SM c p c ISO rms c j,max pulse j,max
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 4 Revision 2.0 https://www.infineon.com 2024‑11‑06
2 Thermal characteristics
Table 3 Thermal characteristics Parameter Symbol Values Unit Note / Test condition Min. Typ. Max. Thermal resistance, junction ‑ case R ‑ ‑ 0.22 °C/W Not subject to production test. Parameter verified by design/characterization according to JESD51‑14. Soldering temperature, reflow soldering allowed T ‑ ‑ 260 °C reflow MSL3 th(j‑c) sold
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 5 Revision 2.0 https://www.infineon.com 2024‑11‑06
3 Operating range
Unit Note / Test condition Min. Typ. Max. Recommended turn‑on voltage V ‑ 18 ‑ V Recommended turn‑off voltage V ‑ 0 ‑ V GS(on) GS(off)
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 6 Revision 2.0 https://www.infineon.com 2024‑11‑06
4 Electrical characteristics
at = 25°C, unless otherwise specifiedT Table 5 Static characteristics Parameter Symbol Values Unit Note / Test condition Min. Typ. Max. Drain‑source voltage V 650 ‑ ‑ V V = 0 V, = 1.87 mAI Gate threshold voltage 4) V 3.5 4.5 5.6 V V = , = 18.7 mAV I Zero gate voltage drain current I ‑ 1 ‑ μA V = 650 V, = 0 V, = 25°C V T = 650 V, = 0 V, = 175°CV V T Gate‑source leakage current I ‑ ‑ 100 nA V = 20 V, = 0 VV Drain‑source on‑state resistance R ‑ 13.0 10.0 9.1 13.1 mΩ V = 15 V, = 92.1 A, = 25°C I T = 18 V, = 92.1 A, = 25°C V I T = 20 V, = 92.1 A, = 25°C V I T = 18 V, = 92.1 A, =175°CV I T Internal gate resistance R ‑ 1.7 ‑ Ω f = 1 MHz Tested after 1 ms pulse at V = +20 V. “Linear mode” operation is not recommended. For assessment of potential “linear 4) mode” operation, please contact Infineon sales office. Table 6 Dynamic characteristics External parasitic elements (PCB layout) influence switching behavior significantly. Stray inductances and coupling capacitances must be minimized. For layout recommendations please use provided application notes or contact Infineon sales office. Parameter Symbol Values Unit Note / Test condition Min. Typ. Max. Input capacitance C ‑ 4001 ‑ pF V = 0 V, = 400 V, = 250 kHzV fReverse transfer capacitance C ‑ 22 ‑ pF Output capacitance 5) C ‑ 297 386 pF Output charge 5) Q ‑ 212 276 nC calculation based on C Effective output capacitance, energy related 6) C ‑ 359 ‑ pF V = 0 V, = 0...400 VV Effective output capacitance, time related 7) C ‑ 531 ‑ pF I = constant, = 0 V, = 0...V V 400 V Turn‑on delay time t ‑ 16 ‑ ns V = 400 V, = 0/18 V,V see table 10 Rise time t ‑ 24 ‑ ns Turn‑off delay time t ‑ 30 ‑ ns Fall time t ‑ 9.4 ‑ ns j DSS GS D GS(th) DS GS D DSS DS GS j DS GS j GSS GS DS DS(on) GS D j GS D j GS D j GS D j G,int GS iss GS DSrss oss oss oss o(er) GS DS o(tr) D GS DS d(on) DD GS D G,ext r d(off) f
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 7 Revision 2.0 https://www.infineon.com 2024‑11‑06 Table 6 Dynamic characteristics External parasitic elements (PCB layout) influence switching behavior significantly. Stray inductances and coupling capacitances must be minimized. For layout recommendations please use provided application notes or contact Infineon sales office. Parameter Symbol Values Unit Note / Test condition Min. Typ. Max. Turn‑ON switching losses 8) E ‑ 216 ‑ μJ V = 400 V, = 0/18 V,V = 92.1 A, = 3.3 ΩI RTurn‑OFF switching losses 8) E ‑ 371 ‑ μJ Total switching losses 8) E ‑ 587 ‑ μJ Maximum specification is defined by calculated six sigma upper confidence bound.5) is a fixed capacitance that gives the same stored energy as while is rising from 0 to 400 V.6) C C V is a fixed capacitance that gives the same charging time as while is rising from 0 to 400 V.7) C C V Values for 4‑pin configuration based on TO‑263‑7 measurements; MOSFET used in half‑bridge configuration without external 8) diode. Table 7 Gate charge characteristics Parameter Symbol Values Unit Note / Test condition Min. Typ. Max. Plateau gate to source charge Q ‑ 29 ‑ nC V = 400 V, = 92.1 A,I = 0 to 18 VVGate to drain charge Q ‑ 21 ‑ nC Total gate charge Q ‑ 113 ‑ nC Table 8 Reverse diode characteristics Parameter Symbol Values Unit Note / Test condition Min. Typ. Max. Drain‑source reverse voltage V ‑ 4.3 ‑ V V = 0 V, = 92.1 A, = 25°CI T MOSFET forward recovery time t ‑ 25 19 ‑ ns V = 400 V, = 92.1 A,I d /d = 1000 A/μs; see table 9 i t = 400 V, = 92.1 A,V I d /d = 4000 A/μs; see table 9i t MOSFET forward recovery charge 9) Q ‑ 224 376 ‑ nC V = 400 V, = 92.1 A,I d /d = 1000 A/μs; see table 9 i t = 400 V, = 92.1 A,V I d /d = 4000 A/μs; see table 9i t MOSFET peak forward recovery current I ‑ 18 40 ‑ A V = 400 V, = 92.1 A,I d /d = 1000 A/μs; see table 9 i t = 400 V, = 92.1 A,V I d /d = 4000 A/μs; see table 9i t includes .9) Q Q on DD GS D G,ext off tot o(er) oss DS o(tr) oss DS GS(pl) DD D GS GD G SD GS S j fr DD S S DD S S fr DD S S DD S S frm DD S S DD S S fr oss
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 8 Revision 2.0 https://www.infineon.com 2024‑11‑06
5 Electrical characteristics diagrams
Diagram 1: Power dissipation Diagram 2: Safe operating area P =f(T ) I =f(V ); T =25 °C; D=0; parameter: t Diagram 3: Safe operating area Diagram 4: Max. transient thermal impedance I =f(V ); T =80 °C; D=0; parameter: t Z =f(t ); parameter: D=t /T tot C DS DS C p DS DS C p th(j‑c),max P p 0 25 50 75 100 125 150 175 TC [°C] 100 200 300 400 500 600 700Ptot [W] 100 101 102 103 VDS [V] 10 1 100 101 102 103 IDS [A] 1 µs 10 µs 100 µs 1 ms 10 msDC 100 101 102 103 VDS [V] 10 2 10 1 100 101 102 103 IDS [A] 1 µs 10 µs 100 µs 1 ms 10 ms DC 10 5 10 4 10 3 10 2 10 1 tp [s] 10 2 10 1 100 Zth(j c), max [K/W] single pulse 0.01 0.02 0.05 0.1 0.2 0.5
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 9 Revision 2.0 https://www.infineon.com 2024‑11‑06 Diagram 5: Typ. output characteristics Diagram 6: Typ. output characteristics I =f(V ); T=25 °C; parameter: V I =f(V ); T=175 °C; parameter: V Diagram 7: Typ. drain‑source on‑state resistance Diagram 8: Drain‑source on‑state resistance R =f(I ); T=125 °C; parameter: V R =f(T); I =92.1 A; V =18 V DS DS j GS DS DS j GS DS(on) DS j GS DS(on) j D GS 0 5 10 15 20 VDS [V] 100 200 300 400 500 600 700 800 900 1000IDS [A] 8 V 10 V 12 V 15 V 18 V 20 V 0 5 10 15 20 VDS [V] 100 200 300 400 500 600 700 800 900 1000IDS [A] 8 V 10 V 12 V 15 V 18 V 20 V 0 100 200 300 400 500 600 700 800 900 1000 IDS [A] 0.012 0.022 0.032 RDS(on) [ ]
10 V 12 V 15 V
0 25 50 75 100 125 150 175 Tj [°C] 0.5 1.0 1.5 2.0 RDS(on) [normalized]
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 10 Revision 2.0 https://www.infineon.com 2024‑11‑06 Diagram 9: Typ. transfer characteristics Diagram 10: Typ. gate charge I =f(V ); V =20 V; parameter: T V =f(Q ); I =92.1 A pulsed; parameter: V Diagram 11: Typ. reverse drain current characteristics Diagram 12: Typ. reverse drain current characteristics I =f(V ); V =0 V; parameter: T I =f(V ); V =18 V; parameter: T DS GS DS j GS G D DD SD SD GS j SD SD GS j 0 2 4 6 8 10 12 14 16 18 20 VGS [V] 100 200 300 400 500 600 700 800 900 1000IDS [A] 25 °C 175 °C 0 25 50 75 100 125 150 QG [nC] 20VGS [V] 400 V VSD [V] 10 1 100 101 102 103 ISD [A] 25 °C 175 °C VSD [V] 10 1 100 101 102 103 ISD [A] 25 °C 175 °C
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 11 Revision 2.0 https://www.infineon.com 2024‑11‑06 Diagram 13: Avalanche energy Diagram 14: Drain‑source breakdown voltage E =f(T); I =20.0 A; V =50 V V =f(T); I =1.87 mA Diagram 15: Typ. capacitances Diagram 16: Typ. Coss stored energy C=f(V ); V =0 V; f=250 kHz E =f(V ) AS j D DD DSS j D DS GS oss DS 25 50 75 100 125 150 175 Tj [°C] 100 200 300 400 500 600EAS [mJ] 0 25 50 75 100 125 150 175 Tj [°C] 650 660 670 680 690 700VDSS [V] 0 50 100 150 200 250 300 350 400 450 500 550 600 650 VDS [V] 101 102 103 104 C [pF] Ciss Coss Crss 0 50 100 150 200 250 300 350 400 450 500 550 600 650 VDS [V] 80Eoss [µJ]
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 12 Revision 2.0 https://www.infineon.com 2024‑11‑06 Diagram 17: Typ. Qoss output charge Diagram 18: Typ. Switching Losses vs R Q =f(V ) E=f(R ); V =400 V; V =0‑18 V; I =92.1 A Diagram 19: Typ. Switching Losses vs switching current G,ext oss DS G,ext DD GS D D DD GS G,ext 0 50 100 150 200 250 300 350 400 450 500 550 600 650 VDS [V] 100 150 200 250 300Qoss [nC] 0 5 10 15 20 25 RG, ext [ ] 500 1000 1500 2000 2500 3000 3500E [µJ] Eon Eoff Etot 0 50 100 150 200 ID [A] 500 1000 1500 2000E [µJ] Eon Eoff Etot
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 13 Revision 2.0 https://www.infineon.com 2024‑11‑06
6 Test circuits
Table 9 Body diode characteristics Table 10 Switching times Table 11 Unclamped inductive load Test circuit for body diode characteristics Body diode recovery waveform RG1 RG2 IS VDS Qfr tfr Ifrm Ifrm Is dIs / dtVDD ISO VDD VDS IS Switching times test circuit for inductive load Switching times waveform VDS VGS td(on) td(off)tr ton tf toff 10% 90% VDS VGS RG VDD Unclamped inductive load test circuit Unclamped inductive waveform VDS VDSS ID VDS ID VDS VDD
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 14 Revision 2.0 https://www.infineon.com 2024‑11‑06
7 Package outlines
Figure 1 Outline PG‑HSOF‑8, dimensions in mm DIMENSIONSMIN.MAX.MILLIMETERSPG-HSOF-8-U02PACKAGE - GROUPNUMBER: 1.20 (BSC) 2.202.40 AbDEE1E2e L b19.709.90 L10.500.90 L20.500.70
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 15 Revision 2.0 https://www.infineon.com 2024‑11‑06 Figure 2 Footprint drawing PG‑HSOF‑8, dimensions in mm
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 16 Revision 2.0 https://www.infineon.com 2024‑11‑06 Figure 3 Packaging variant PG‑HSOF‑8, dimensions in mm The drawing is in compliance with ISO 128-30, Projection Method 1 [ ]All dimensions are in units mm 4120.32.610.21224
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 17 Revision 2.0 https://www.infineon.com 2024‑11‑06
8 Appendix A
IFX CoolSiC CoolSiC™ MOSFET 650 V G2 Webpage IFX CoolSiC CoolSiC™ MOSFET 650 V G2 Application Note IFX CoolSiC CoolSiC™ MOSFET 650 V G2 Simulation Model IFX Design tools
CoolSiC™ MOSFET 650 V G2 IMT65R010M2H Public Datasheet 18 Revision 2.0 https://www.infineon.com 2024‑11‑06 IMT65R010M2H Revision 2024‑11‑06, Rev. 2.0 Previous revisions Revision Date Subjects (major changes since last revision) 2.0 2024‑11‑06 Release of final Trademarks All referenced product or service names and trademarks are the property of their respective owners. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: erratum@infineon.com Published by Infineon Technologies AG
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