IM512-L6A

IM512-L6A INFINEON | Alldatasheet

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Technical content

Features

 Fully isolated Dual In-Line molded module  650V CoolMOS™ CFD2 Power MOSFETs  Rugged SOI gate driver technology with stability against transient and negative voltage  Allowable negative VS potential up to -11V for signal transmission at VBS=15V  Integrated bootstrap functionality  Over current shutdown  Built-in NTC thermistor for temperature monitor  Under-voltage lockout at all channels  Low side source pins accessible for all phase current monitoring (open source)  Cross-conduction prevention  All of 4 switches turn off during protection  Lead-free terminal plating; RoHS compliant Potential applications  Two phase linear compressor for Refrigerators and single phase low power motor drives Product validation Qualified for industrial applications according to the relevant tests of JEDEC47/20/22. Table 1 Part Ordering Table Base Part Number Package Type Standard Pack Orderable Part Number Form Quantity IM512-L6A DIP 20 tubes 280 pcs IM512L6AXKMA1

Datasheet 2 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Table of Contents Table of Contents

Datasheet 3 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Internal Electrical Schematic

1 Internal Electrical Schematic

NC (17) NV (18) NC (20) V (21) U (22) P (23) (2) VB(U) (15) ITRIP (14) VFO (10) LIN(U) (11) LIN(V) (12) NC (16) VSS (13) VDD (4) VB(V) (6) NC (7) HIN(U) (8) HIN(V) (9) NC (1) VS(U) (3) VS(V) (5) NC NU (19) Thermistor RBS1 RBS2 RBS3 NC (24) Figure 1 Internal electrical schematic

Datasheet 4 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Pin Description

2 Pin Description

2.1 Pin Assignment

(1) VS(U) (2) VB(U) (3) VS(V) (4) VB(V) (5) NC (6) NC (7) HIN(U) (8) HIN(V) (9) NC (10) LIN(U) (11) LIN(V) (12) NC (13) VDD (14) VFO (15) ITRIP (16) VSS (23) P (22) U (21) V (20) NC (19) NU (18) NV (17) NC (24) NC Figure 2 Pin configuration Table 1 Pin assignment Pin Number Pin name Pin Description

1 VS(U) U-phase high side floating IC supply offset voltage

2 VB(U) U-phase high side floating IC supply voltage

3 VS(V) V-phase high side floating IC supply offset voltage

4 VB(V) V-phase high side floating IC supply voltage

5 NC No Connection

6 NC No Connection

7 HIN(U) U-phase high side gate driver input

8 HIN(V) V-phase high side gate driver input

9 NC No Connection

10 LIN(U) U-phase low side gate driver input

11 LIN(V) V-phase low side gate driver input

12 NC No Connection

13 VDD Low side control supply

14 VFO Fault output / Temperature monitor

15 ITRIP Over current shutdown input

16 VSS Low side control negative supply

17 NC No Connection

Datasheet 5 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Pin Description Pin Number Pin name Pin Description

18 NV V-phase low side source

19 NU U-phase low side source

20 NC No Connection

21 V Motor V-phase output

22 U Motor U-phase output

23 P Positive bus input voltage

24 NC No Connection

2.2 Pin Description

HIN(U, V) and LIN(U, V) (Low side and high side control pins, Pin 7, 8, 10 and 11) These pins are positive logic and they are responsible for the control of the integrated MOSFET. The Schmitt -trigger input threshold s of them are such to guarantee LSTTL and CMOS compatibility down to 3.3V controller outputs. Pull-down resistor of about 5k is internally provided to pre-bias inputs during supply start-up and a zener clamp is provided for pin protection purposes. Input Schmitt-trigger and noise filter provide beneficial noise rejecti on to short input pulses. The noise filter suppresses control pulses which are below the filter time tFILIN. The filter acts according to Figure 4. CIPOSTM UZ=10.5V INPUT NOISE FILTER  k5 Schmitt-Trigger SWITCH LEVEL VIH; VILVSS HINx LINx Figure 3 Input pin structure HIN LIN HO LOlow high tFILIN tFILINa) b) HIN LIN HO LO Figure 4 Input filter timing diagram It is not recommended for proper work to provide input pulse-width lower than 1µs. The integrated gate drive provides additionally a shoot through p revention capability which avoids the simultaneous on -state of two gate drivers of the same leg (i.e. HO1 and LO1, HO2 and LO2). When two inputs of a same leg are activated, only former activated one is activated so that the leg is kept steadily in a safe state. A minimum deadtime insertion of typically 380ns is also provided by driver IC, in order to reduce cross-conduction of the external power switches. VFO (Fault-output and NTC, Pin 14) The VFO pin indicates a module failure in case of under voltage at pin VDD or in case of triggered over current detection at ITRIP. A pull -up resistor is externally required. VFO VSS VDD RON,FLT From ITRIP - Latch From UV detection CIPOSTM Thermistor Figure 5 Internal circuit at pin VFO The same pin provides direct access to the NTC, which is referenced to VSS. An external pull-up resistor connected to +5V ensures that the resulting voltage can be directly connected to the microcontroller. ITRIP (Over current detection function, Pin 15) CIPOS™ provides an over current detection function by connecting the ITRIP input with the MOSFET drain current feedback. The ITRIP comparator threshold (typ . 0.47V) is referenced to VSS ground. An input noise filter ( typ.: tITRIPMIN = 530ns) prevents the driver to detect false over - current events. Over current detection generates a shutdown of all outputs of the gate driver after the shutdown propagation delay of typically 1000ns. The fault-clear time is set to minimum 40µs.

Datasheet 6 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Pin Description VDD, VSS ( Low side c ontrol supply and reference, Pin 13, 16) VDD is the control supply and it provides power both to input logic and to output power stage. Input logic is referenced to VSS ground. The under -voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 12.1V is present. The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below VDDUV- = 10. 4V. This prevents the external power switches from critically low gate voltage levels during on -state and therefore from excessive power dissipation. VB(U, V) and VS(U, V) (High side supplies, Pin 1, 2, 3 and 4) VB to VS is the high side supply voltage. The high side circuit can float with respect to VSS following the external high side power device source voltage. Due to the low power consu mption, the floating driver stage is supplied by integrated bootstrap circuit. The under -voltage detection operates with a rising supply threshold of typical V BSUV+ = 12.1V and a falling threshold of VBSUV- = 10.4V. VS(U, V) provide a high robustness aga inst negative voltage in respect of VSS of -50V transiently. This ensures very stable designs even under rough conditions. NV, NU (Low side source, Pin 18 and 19) The low side sources are available for current measurements of each phase leg. It is recommended to keep the connection to pin VSS as short as possible in order to avoid unnecessary inductive voltage drops. V, U (High side source and low side drain, Pin 21 and 22) These pins are connected to U, V input of a motor. P (Positive bus input voltage, Pin 23) The high side MOSFETs are connected to the bus voltage. It is noted that the bus voltage does not exceed 450V.

Datasheet 7 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Absolute Maximum Ratings

3 Absolute Maximum Ratings

(VDD = 15V and TJ = 25° C, if not stated otherwise)

3.1 Module Section

Description Symbol Condition Value Unit Storage temperature range TSTG -40 ~ 125 °C Operating case temperature TC Refer to Figure 7 -40 ~ 125 °C Operating junction temperature TJ -40 ~ 150 °C Isolation test voltage VISO 1min, RMS, f = 60Hz 2000 V

3.2 Inverter Section

Description Symbol Condition Value Unit Max. blocking voltage VDSS ID = 250µA 650 V DC link supply voltage of P-N VPN Applied between P-N 450 V DC link supply voltage (surge) of P- N VPN(surge) Applied between P-N 500 V Output current IO TC = 25° C, TJ < 150° C ±10 A Peak output current IO(peak) less than 1ms ±12 A Power dissipation per MOSFET Ptot 29.7 W Short circuit withstand time1 tSC VDC ≤ 400V, TJ = 150° C 5 µs

3.3 Control Section

Description Symbol Condition Value Unit High side offset voltage VS 600 V Repetitive peak reverse voltage of bootstrap diode VRRM 600 V Module supply voltage VDD 20 V High side floating supply voltage (VB reference to VS) VBS 20 V Input voltage VIN LIN, HIN, ITRIP 10 V 1 Allowed number of short circuits: <1000; time between short circuits: >1s.

Datasheet 8 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Thermal Characteristics

4 Thermal Characteristics

Description Symbol Condition Value Unit Min. Typ. Max. Single MOSFET thermal resistance, junction-case RthJC 4.21 K/W

Datasheet 9 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Recommended Operation Conditions

5 Recommended Operation Conditions

All voltages are absolute voltages referenced to VSS -potential unless otherwise specified. Description Symbol Value Unit Min. Typ. Max. DC link supply voltage of P-N VPN 0 - 450 V Low side supply voltage VDD 14.0 15 18.5 V High side floating supply voltage (VB vs. VS) VBS 13.5 - 18.5 V Logic input voltages LIN, HIN, ITRIP VIN 0 - 5 V PWM carrier frequency FPWM - - 20 kHz External deadtime between HIN and LIN DT 1.5 - - µs Voltage between VSS - N (including surge) VCOMP -5 - 5 V Minimum input pulse width PWIN(ON) PWIN(OFF) 1.2 - - µs Control supply variation ΔVBS, ΔVDD

1 V/µs

Datasheet 10 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Static Parameters

6 Static Parameters

(VDD = 15V and TJ = 25° C, if not stated otherwise)

6.1 Inverter Section

Description Symbol Condition Value Unit Min. Typ. Max. Drain-Source on-state resistance RDS(on) ID =4.4A TJ = 25° C 150° C 0.28 0.73 0.33 Ω Drain-Source leakage current IDSS VDS = 600V - - 1 mA Diode forward voltage VF IF = 4.4A TJ = 25° C 0.9 - V

6.2 Control Section

Description Symbol Condition Value Unit Min. Typ. Max. Logic "1" input voltage (LIN, HIN) VIH - 2.1 2.5 V Logic "0" input voltage (LIN, HIN) VIL 0.7 0.9 - V ITRIP positive going threshold VIT,TH+ 400 470 540 mV ITRIP input hysteresis VIT,HYS - 70 - mV VDD and VBS supply under voltage positive going threshold VDDUV+ VBSUV+ 10.8 12.1 13.0 V VDD and VBS supply under voltage negative going threshold VDDUV- VBSUV- 9.5 10.4 11.2 V VDD and VBS supply under voltage lockout hysteresis VDDUVH VBSUVH 1.0 1.7 - V Quiescent VBx supply current (VBx only) IQBS HIN = 0V - - 500 µA Quiescent VDD supply current (VDD only) IQDD LIN = 0V, HINX = 5V - - 900 µA Input bias current for LIN, HIN IIN+ VIN = 5V - 1 1.5 mA Input bias current for ITRIP IITRIP+ VITRIP = 5V - 65 150 µA Input bias current for VFO IFO VFO = 5V, VITRIP = 0V - 60 - µA VFO output voltage VFO IFO = 10mA, VITRIP = 1V - 0.5 - V Bootstrap diode forward voltage VF_BSD IF = 20mA, VS2 and VS3 = 0V - 2.6 - V Bootstrap resistance RBSD Between VF1=4V and VF2=5V - 40 - Ω

Datasheet 11 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Dynamic Parameters

7 Dynamic Parameters

(VDD = 15V and TJ = 25° C, if not stated otherwise)

7.1 Inverter Section

Description Symbol Condition Value Unit Min. Typ. Max. Turn-on propagation delay time ton VLIN, HIN = 5V, ID = 6A, VDC = 300V - 875 - ns Turn-on rise time tr - 85 - ns Turn-on switching time tc(on) - 200 - ns Reverse recovery time trr - 115 - ns Turn-off propagation delay time toff VLIN, HIN = 0V, ID = 6A, VDC = 300V - 810 - ns Turn-off fall time tf - 10 - ns Turn-off switching time tc(off) - 20 - ns Short circuit propagation delay time tSCP From VIT,TH+ to 10% ISC - 1300 - ns MOSFET turn-on energy (includes reverse recovery of diode) Eon VDC = 300V, ID = 6A TJ = 25° C 150° C 360 660 µJ MOSFET turn-off energy Eoff VDC = 300V, ID = 6A TJ = 25° C 150° C µJ Diode recovery energy Erec VDC = 300V, ID = 6A TJ = 25° C 150° C 125 µJ Control Section Description Symbol Condition Value Unit Min. Typ. Max. Bootstrap diode reverse recovery time trr_BS IF = 0.6A, di/dt = 80A/µs - 50 - ns Input filter time ITRIP tITRIPmin VITRIP = 1V - 530 - ns Input filter time at LIN, HIN for turn on and off tFILIN VLIN, HIN = 0V & 5V - 290 - ns Fault clear time after ITRIP-fault tFLTCLR VITRIP = 1V 40 65 200 µs ITRIP to Fault propagation delay tFLT VLIN, HIN = 0 or VLIN, HIN = 5V, VITRIP = 1V - 730 1000 ns Internal deadtime DTIC - 380 - ns Matching propagation delay time (On and Off) all channels MT External dead time >500ns - 20 100 ns

Datasheet 12 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Thermistor

8 Thermistor

Description Condition Symbol Value Unit Min. Typ. Max. Resistance TNTC = 25° C RNTC - 85 - k B-constant of NTC (Negative Temperature Coefficient) B(25/100) - 4092 - K -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 500 1000 1500 2000 2500 3000 3500 Thermistor temperature [℃] Thermistor resistance [kΩ ] Figure 6 Thermistor resistance – temperature curve and table (For more information, please refer to the application note ‘AN2016-10 CIPOS Mini Technical description’) 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 Thermistor temperature [℃] Thermistor resistance [kΩ ] Min. Typ. Max.

Datasheet 13 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Mechanical Characteristics and Ratings

9 Mechanical Characteristics and Ratings

Description Condition Value Unit Min. Typ. Max. Comparative Tracking Index (CTI) 550 - - V Mounting torque M3 screw and washer 0.59 0.69 0.78 Nm Backside Curvature Refer to Figure 8 -50 - 100 µm Weight - 6.12 - g

Datasheet 14 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Qualification Information

10 Qualification Information

UL Certification File number E314539 Moisture sensitivity level (SOP23 only) - RoHS Compliant Yes (Lead-free terminal plating) ESD HBM(Human Body Model) Class 2 CDM(Charged Device Model) Class C3

Datasheet 15 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Diagrams and Tables

11 Diagrams and Tables

11.1 TC Measurement Point

Figure 7 TC measurement point1

11.2 Backside Curvature Measurment Point

Figure 8 Backside curvature measurement position 1Any measurement except for the specified point in Figure 7 is not relevant for the temperature verification and brings wrong or different information.

Datasheet 16 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Diagrams and Tables

11.3 Switching Time Definition

0.9V 2.1V 90% 10%10% 10% 90% toff tf ton tr tc(off) tc(on) 10% trr 10%

Datasheet 17 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Application Guide

12.1 Typical Application Schematic

5 or 3.3V line U-phase current sensing NC (17) NV (18) NC (20) V (21) U (22) P (23) (2) VB(U) (15) ITRIP (14) VFO (10) LIN(U) (11) LIN(V) (12) NC (16) VSS (13) VDD (4) VB(V) (6) NC (7) HIN(U) (8) HIN(V) (9) NC (1) VS(U) (3) VS(V) (5) NC NU (19) NC (24) Thermistor VSS VDD LIN3 LIN2 LIN1 VFO ITRIP LO3 LO2 LO1 HO1 HO2 HO3 VB1 VS1 VB2 VS2 VB3 VS3 HIN3 HIN2 HIN1 RBS1 RBS2 RBS3 <Signal for protection> Temperature monitor Micro Controller #6 #7 Single Phase AC Motor V-phase current sensing <Signal for protection> Power GND line Control GND line Figure 9 Typical application circuit  #1 Input circuit − RC filter can be used to reduce input signal noise. (100Ω, 1nF) − The capacitors should be located close to IPM (to VSS terminal especially).  #2 Itrip circuit − To prevent a mis operation of protection function, RC filter is recommended. − The capacitor should be located close to Itrip and VSS terminals.  #3 VFO circuit − VFO pin is open drain configuration. This terminal should be pulled up to the bias voltage of the 5V/3.3V through a proper resistor. − It is recommended that RC filter is placed close to the controller.  #4 VB-VS circuit − Capacitors for high side floating supply voltage should be placed close to VB and VS terminals.  #5 Snubber capacitor − The wiring among CIPOS™ Mini, snubber capacitor and shunt resistors should be short as possible.  #6 Shunt resistor − SMD type shunt resistors are strongly recommended to minimize its internal stray inductance.  #7 Ground pattern − Pattern overlap of Power ground and signal ground Ground should be minimized. Thepatterns should be connected at one end of shunt resistor only for the same potential.

Datasheet 18 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Application Guide

12.2 Performance Chart

Figure 10 Maximum operating current SOA1 1This maximum operating current SOA is just one of example based on typical characteristics for this product. It can be changed by each user’s actual operating conditions.

Datasheet 19 of 20 Version 2.0 2017-12-07 CIPOS™ Mini with CoolMOS™ Technology IM512-L6A Package Outline

81726 München, Germany

© 2018 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document? Email: erratum@infineon.com Document reference IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabiliti es of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this do cument and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). Please note that this product is not qualified according to the AEC Q100 or AEC Q101 documents of the Automotive Electronics Council. WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. Edition 2017-12-07 ifx1 Trademarks All referenced product or service names and trademarks are the property of their respective owners.