IM393-L6E INFINEON | Alldatasheet
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Technical content
Features
Integrated gate drivers and bootstrap function Temperature monitor Protection shutdown pin Low VCE (on) Trench IGBT technology Under voltage lockout for all channels Matched propagation delay for all channels 3.3V Schmitt-triggered input logic Cross-conduction prevention logic Isolation 2000VRMS min and CTI > 600 Recognized by UL (File Number : E314539) 2019-05-21 Potential applications Washing machines Air-conditioners Refrigerators Fans Dishwashers Low power motor drives Product validation Qualified for industrial applications according to the relevant tests of JEDEC47/20/22. Table1 Part Ordering Table Tiny DIP IM393-L6E
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Table of Contents Table of Contents
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Internal Electrical Schematic
1 Internal Electrical Schematic
Figure 1 Internal electrical schematic COM VDD LIN2 LIN1 HIN3 ITRIP LO1 LO2 LO3 HO3 HO2 HO1 VB3 VS3 VB2 VS2VB1 VS1 HIN2 HIN1 RFE (27) N(U) (28) N(V) (30) U (31) V (32) W (33) P (4) VB(W) (20) HIN(W) (21) LIN(U) (22) LIN(V) (23) LIN(W) (7) VB(V) (10) VB(U) (17) RFE (18) HIN(U) (19) HIN(V) (3) VS(W) (6) VS(V) (9) VS(U) (29) N(W) (1) P (12) VDD (13) VTH (14) COM (15) COM (16) ITRIP LIN3 (24) N(W) (26) N(U) (25) N(V) (35) P VSS -t°
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Pin Configuration
2 Pin Configuration
Figure 2 Pin configuration
2.1 Pin Assignment
(4) VB(W) (20) HIN(W) (21) LIN(U) (22) LIN(V) (23) LIN(W) (7) VB(V) (10) VB(U) (17) RFE (18) HIN(U) (19) HIN(V) (3) VS(W) (6) VS(V) (9) VS(U) (1) P (12) VDD (13) VTH (14) COM (15) COM (16) ITRIP (24) N(W) (26) N(U) (28) N(V) (30) U (31) V (32) W (33) P (29) N(W) (35) P
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Pin Configuration Pin Name Description
1 P Positive bus input voltage
( 2 ) N/A None
3 VS(W) W-phase high side floating supply offset voltage
4 VB(W) W-phase high side floating supply voltage
( 5 ) N/A None
6 VS(V) V - phase high side floating supply offset voltage
7 VB(V) V - phase high side floating supply voltage
( 8 ) N/A None
9 VS(U) U- phase high side floating supply offset voltage
10 VB(U) U- phase high side floating supply voltage
( 11 ) N/A None
12 VDD Low side control supply
13 VTH Temperature monitor
14 COM Low side control negative supply
15 COM Low side control negative supply
16 ITRIP Over current protection input
17 RFE RCIN / Fault / Enable
18 HIN(U) U-phase high side gate driver input
19 HIN(V) V-phase high side gate driver input
20 HIN(W) W-phase high side gate driver input
21 LIN(U) U-phase low side gate driver input
22 LIN(V) V-phase low side gate driver input
23 LIN(W) W-phase low side gate driver input
24 N(W) W-phase low side emitter
25 N(V) V-phase low side emitter
26 N(U) U-phase low side emitter
27 N(U) U-phase low side emitter
28 N(V) V-phase low side emitter
29 N(W) W-phase low side emitter
30 U U-phase output
31 V V-phase output
32 W W-phase output
33 P Positive bus input voltage
( 34 ) N/A None
35 P Positive bus input voltage
( 36 ) N/A None Table 2 Pin Assignment
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Pin Descriptions
2.2 Pin Descriptions
HIN(U,V,W) and LIN(U,V,W) (High side and low side control pins) These pins are positive logic and they are responsible for the control of the integrated IGBT. The Schmitt -trigger input thresholds of them are such to guarantee LSTTL and CMOS compatibility down to 3.3V controller outputs. Pull-down resistor of about 4k is internally provided to pre -bias inputs during supply start - up and an ESD diode is provided for pin protection purposes. Input Schmitt -trigger and noise filter provide beneficial noise rejection to short input pulses. The noise filter suppresses control pulses which are below the filter time TFILIN. The filter acts according to Figure 4. The integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on -state of the high -side and low-side switch of the same inverter phase. A minimum deadtime insertion of typically 275ns is also provided by driver IC, in order to reduce cross-conduction of the external power switches. Figure 3 Input pin structure Figure 4 Input filter timing diagram VDD, COM (Low side control supply and reference) VDD is the control supply and it provides power both to input logic and to output power stage. Input logic is referenced to COM ground. The under -voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 10.4V is present. The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below VDDUV- = 9.4V. This prevents the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. VB(U,V,W) and VS(U,V,W) (High side supplies) VB to V S is the high side supply voltage. The high side circuit can float with respect to COM following the external high side power device emitter voltage. Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. The under-voltage detection operates with a rising supply threshold of typical V BSUV+ = 10.41V and a falling threshold of VBSUV- = 9.4V. VS(U,V,W) provide a high robustness against negative voltage in respect of COM. This ensures very stable designs even under rough conditions. N (U, V, W) (Low side emitters) The low side emitters are available for current measurements of each phase leg. It is recommended to keep the connection to pin COM as short as possible in order to avoid unnecessary inductive voltage drops. VTH (Thermistor) A UL certified NTC is integrated in the module with one terminal of the chip connected to COM and the other to VTH. When pulled up to a rail voltage such as VDD or 3.3V by a resistor, the VTH pin provides an analog voltage signal corresponding to the temperature of the thermistor. CIPOSTM TINY INPUT NOISE FILTER k4 Schmitt-Trigger SWITCH LEVEL VIH; VILCOM HIN(X) LIN(X) HIN(X) LIN(X) HOx LOxlow high tFILIN tFILINa) b) HIN(X) LIN(X) HOx LOx
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
3 Absolute Maximum Rating
3.1 Module
3.2 Inverter
Parameter Symbol Conditions Value Units Operating junction temperature TJ IGBT, diode, HVIC -40 ~ 150 °C Operating case temperature TC -40 ~ 125 °C Storage temperature TSTG -40 ~ 125 °C Isolation test voltage VISO AC RMS, 1 minute, 60Hz 2000 V Table 5 Parameter Symbol Conditions Value Units Logic supply voltage VDD -0.3 ~ 20 V Input voltage VIN LIN, HIN, ITRIP, RFE -0.3 ~ 20 V High side floating supply voltage (VB reference to VS) VBS(U,V,W) -0.3 ~ 20 V
3.3 Control
Parameter Symbol Conditions Value Units Blocking voltage VCES IGBT, diode, HVIC 600 V DC –link supply voltage of P-N VPN Applied between P and N 450 V DC –link supply voltage (surge) of P-N VPN(surge) Applied between P and N 500 V Output current IO TC = 25°C, TJ < 150°C ±15 A Peak output Current Io(peak) TC = 25°C, TJ < 150°C,less than 1ms ±22.5 A Power dispassion per IGBT Ptot 23 W Short Circuit withstand time TSC TJ < 150°C, VDC = 360V, VDD = 15V 3 μs
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
4 Thermal Characteristics
Parameter Symbol Conditions Units Value Min. Typ. Max. Single IGBT thermal resistance, junction-case RTH(J-C) Low side W-phase IGBT (See Figure 8 for TC measurement point) - 4.7 5.4 °C/W Single diode thermal resistance, junction-case RTH(J-C)D Low side W-phase diode (See Figure 8 for TC measurement point) - 6.1 7.0 °C/W
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
5 Recommended Operating Conditions
Recommended Operating Conditions Table 7 Parameter Symbol Conditions Value Units Min. Typ. Max. Positive DC bus input voltage VDC - - 450 V Low side control supply voltage VDD 13.5 15 16.5 V High side floating supply voltage VBS 12.5 15 17.5 V Input voltage VIN LIN, HIN, ITRIP, RFE 0 - 5 V PWM carrier frequency FPWM - 20 - kHz Voltage between COM and N (including surge) VCOM -5 - 5 V External dead time between HIN & LIN DT 1 - - µs Input pulse width PWIN(ON) PWIN(OFF) 1 - - µs For proper operation the device should be used within the recommended conditions. All voltages are absolute referenced to COM. The VS offset is tested with all supplies biased at 15V differential.
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
6 Static Parameters
6.1 Inverter
6.2 Control
Parameter Symbol Conditions Value Units Min. Typ. Max. Collector-Emitter saturation voltage VCE(ON) IC = 7.5A - 1.5 1.9 V Collector-Emitter leakage current VIN = 0V, VCE = 600V - 10 80 μA ICES VIN = 0V, VCE = 600V, TJ=150°C - 80 - μA Diode forward voltage drop VF IC = 7.5A - 1.7 2.2 V Static Parameters VBIAS(VDD, VBS(U,V,W))=15V, TJ=25°C unless otherwise specified Table 9 Parameter Symbol Conditions Value Units Min. Typ. Max. Logic “1” input voltage VIN,TH+ LIN, HIN, RFE 2.5 - - V Logic “0” input voltage VIN,TH- LIN, HIN, RFE - - 0.8 V VDD/VBS supply undervoltage, positive going threshold VDD,UV+, VBS,UV+ 9.6 10.4 11.2 V VDD/VBS supply undervoltage, negative going threshold VDD,UV-, VBS,UV- 8.6 9.4 10.2 V VDD/VBS supply undervoltage lock-out hysteresis VDDUVH, VBSUVH - 1 - V Quiescent VBS supply current IQBS - - 150 μA Quiescent VDD supply current IQDD - - 3.2 mA Offset supply leakage current ILK VS = 600V - - 50 μA Input bias current for LIN, HIN IIN+ VIN = 3.3V - 825 1110 μA Input bias current for RFE IIN,RFE+ VREF = 3.3V - 0 1 μA Input bias current for ITRIP ITRIP+ VITRIP = 3.3V - 4 16 μA ITRIP threshold voltage VITRIP 0.44 0.49 0.54 V VBIAS(VDD, VBS(U,V,W))=15V, TJ=25ºC, unless otherwise specified. The VIN parameters are referenced to COM and are applicable to all six channels
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Static Parameters Parameter Symbol Conditions Value Units Min. Typ. Max. ITRIP input hysteresis VITRIP,HYS - 0.07 - V Bootstrap resistance RBS - 200 - Ω RFE low on resistance RRFE - 50 100 Ω
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
7 Dynamic Parameters
7.1 Inverter
7.2 Control
VBIAS(VDD, VBS(U,V,W))=15V, TJ=25ºC, unless otherwise specified. Table 11 Parameter Symbol Conditions Value Units Min. Typ. Max. Input filter time (HIN, LIN, ITRIP) TFILIN VIN = 0 or VIN = 5V - 350 - ns Input filter time (RFE) TFILRFE VRFE = 0 or VRFE = 5V 100 200 - ns ITRIP to Fault propagation delay TFLT VIN = 0 or VIN = 5V, VITRIP = 5V 400 600 800 ns Internal injected dead time TDT VIN = 0 or VIN = 5V 190 275 420 ns Matching propagation delay time (On & Off) all channels MT External dead time > 420ns - - 50 ns VBIAS(VDD, VBS(U,V,W))=15V, TJ=25ºC, unless otherwise specified. Table 10 Parameter Symbol Conditions Value Units Min. Typ. Max. Input to output turn-on propagation delay TON IC = 7.5A, VDC = 300V - - 1.15 μs Input to output turn-off propagation delay TOFF IC = 7.5A, VDC = 300V - - 1.15 μs RFE low to six switch turn-off propagation delay TEN VRFE = 5V to 0V - - 1.35 μs ITRIP to six switch turn-off propagation delay TITRIP IC = 7.5A, VDC = 300V - - 1.5 μs IGBT turn-on energy EON VDC = 300V, IC = 7.5A, TJ = 25°C 150°C 220 330 μJ IGBT turn-off energy EOFF VDC = 300V, IC = 7.5A, TJ = 25°C 150°C 110 155 μJ Diode reverse recovery energy EREC VDC = 300V, IC = 7.5A, TJ = 25°C 150°C μJ Reverse Bias Safe Operating Area RBSOA TJ = 150°C, IC = 30A, VP = 600V, VDC = 450V,VDD = +15V to 0V FULL SQUARE
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
8 Thermistor Characteristics
Parameter Symbol Conditions Value Units Min. Typ. Max. Resistance R25 T = 25°C, ±5% tolerance 44.65 47 49.35 kΩ Resistance R125 T = 125°C 1.27 1.41 1.56 kΩ B-constant B 25-50°C, R2=R1e[B1/T2-1/T1)] 3989 4050 4111 K Temperature Range -40 - 125 °C Thermistor Characteristics Figure 7 Thermistor readout vs. temperature (with 4.7kohm REXT pull-up resistor) and typical thermistor resistance values vs. temperature table (For more details, please refer to the application note ‘AN2018-13 CIPOS™ IM393-XX IPM technical description_1R0_final’) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Thermistor Pin Read-Out Volage, VTHERM [V] Thermistor Temperature [ C] Max Typ Min +5V REXT RTHERM VTHERM
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
9 Mechanical Characteristics and Ratings
Parameter Symbol Conditions Units Value Min. Typ. Max. Thermal resistance, case- heatsink RTH(C-S) Flat, greased surface. Heatsink compound thermal conductivity 1W/mK - 0.25 - °C/W Comparative Tracking Index CTI 600 - - V Curvature of module backside BKC 0 - 150 µm Mounting torque T M3 screw and washer 0.6 0.7 0.8 Nm Weight W - 6.0 - g Mechanical Characteristics and Ratings Figure 8 Backside curvature measurement position
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
10 Qualification Information
UL Certified File Number : E314539 RoHS Compliant Yes ESD Human body model Class 3A Charge discharge model Class C3 Qualification Information
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Diagram & Tables Figure 10 Module block diagram Figure 9 TC measurement point
11 Diagram & Tables
11.1 Tc Measurement Point
11.2 Input-Output Logic Table
Table 15 Input-output logic level table RFE ITRIP HIN(U,V,W) LIN(U,V,W) U,V,W 1 0 1 0 VDC 1 0 0 1 0 1 0 0 0 Off* 1 0 1 1 Off* 1 1 X X Off*
0 X X X Off*
U, V, W Driver IC LIN(U, V, W) HIN(U, V, W) P ITRIP RFE * Voltage depends on direction of phase current
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Diagrams & Tables
11.3 Switching Time Definitions
Figure 11 ITRIP time waveform Figure 12 Output disable timing diagram Figure 13 Switching times definition ITRIP LIN(U, V, W) HIN(U, V, W) TFLT-CLR 50% 50% U, V, W 50% TITRIP 50% RFE 50% TFLT RFE 50% 50% U, V, W TEN HINx LINx iCx vCEx 0.9V 2.1V 90% 10%10% 10% 90% toff tf ton tr tc(off) tc(on) 10% trr 10%
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Application Guide Figure 14 Typical application connection
12.1 Typical Application Schematic
- Input circuit -RC filter can be used to reduce input signal noise (100Ω, 1nF) -The capacitors should be located close to CIPOS™ Tiny (to COM terminal especially). 2. Itrip circuit -To prevent a mis operation of protection function, RC filter is recommended -The capacitor must be located close to Itrip and COM terminals. 3. VTH circuit -This terminal should be pulled up to the bias voltage of 5V/3.3V through a proper resistor to define suitable voltage for temperature monitoring. -It is recommended that RC filter is placed close to the controller 4. VB-VS circuit -Capacitors for high side floating supply voltage should be placed close to VB and VS terminals. -Additional high frequency capacitors, typically 0.1µF, are strongly recommended. 5. Snubber capacitor -The wiring among CIPOS™ Tiny, snubber capacitor and shunt resistors should be short as possible. 6. Shunt resistor -SMD type shunt resistors are strongly recommended to minimize its internal stray inductance. 7. Ground pattern -Pattern overlap of power ground and signal ground should be minimized. The patterns should be connected at the common end of shunt resistors only for the same potential. 8. COM pattern -Both of the COM terminals should be connected together. 9. RFE circuit -To setup R and C parameter for fault clear time, please refer to Figure 5. -This R is also mandatory for fault out reporting function because it is open drain structure. 10. P pattern -Both of the P terminals should be connected together. 15V Micro Controller #6 #7 3-ph AC Motor Power GND Control GND COM VDD LIN2 LIN1 HIN3 ITRIP LO1 LO2 LO3 HO3 HO2 HO1 VB3 VS3 VB2 VS2VB1 VS1 HIN2 HIN1 RFE N(U) (27) N(V) (28) U (30) V (31) W (32) P (33) (4) VB(W) (20) HIN(W) (21) LIN(U) (22) LIN(V) (23) LIN(W) (7) VB(V) (10) VB(U) (17) RFE (18) HIN(U) (19) HIN(V) (3) VS(W) (6) VS(V) (9) VS(U) N(W) (29) (1) P (12) VDD (13) VTH (14) COM (15) COM (16) ITRIP LIN3 (24) N(W) (26) N(U) (25) N(V) P (35) VSS -t° 5 or 3.3V 5 or 3.3V #10
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Application Guide Figure 15 Maximum operating current SOA 12.3 Tj vs. Tth Figure 16 Typical Tj vs Tth correlation, sinusoidal modulation, VDC=300V, Iphase=5Arms, fsw=16kHz, fmod=50Hz, MI=0.8, PF=0.6
12.2 Performance Charts
65 70 75 80 85 90 95 100 105 110 115 IGBT Junction Temperature - °C Internal Thermistor Temperature Equivalent Read Out - °C TJ avg = 1.25 x TTherm + 19 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 RMS Current [A] Case Temperature Tc [℃] V+ = 300V, VDD=VBS=15V, TJ≤150 C, TC≤125 C, MI=0.8, PF=0.8, Sinusoidal PWM FPWM=6kHz FPWM=16kHz 1. This maximum operating current SOA is just one of example based on typical characteristics for this product. It can be change by each user’s actual operating conditions.
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E Application Guide Figure 17 Negative transient Vs SOA for integrated gate driver 12.4 –VS Immunity
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
Package Information
32.00±0.30 25X1.27 31.75 7.50 1 3 4 7 9 10 13 15 17 19 21 23 26 34.00 4.45±0.15 3.80 7.62 8X0.60 8X0.70 4X3.81 2X2.54 MISSING PIN : 2, 5, 8, 11, 34 16.00 15.875 1.90 Default tolerance : ± 0.5mm Lead length : 5.55 (STANDARD) 15.00 3.20 5.55±0.15 0.50±0.05 9.509.50 3.00 8.30 1.70±0.20 0°~4°
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E 15.00 3.20 2.90±0.15 0.50±0.05 9.509.50 3.00 5.65 272829313233 30 32.00±0.30 25X1.27 31.75 7.50 1 3 4 7 9 10 13 15 17 19 21 23 26 1.70±0.20 34.00 4.45±0.15 3.80 7.62 8X0.60 8X0.70 4X3.81 2X2.54 MISSING PIN : 2, 5, 8, 11, 34 16.00 15.875 1.90 Default tolerance : ± 0.5mm Lead length : 2.9 (-2.65mm) 0°~4°
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E 15.00 3.20 3.60±0.15 0.50±0.05 9.509.503.00 6.35 272829313233 30 32.00±0.30 25X1.27 31.75 7.50 1 3 4 7 9 10 13 15 17 19 21 23 26 1.70±0.20 34.00 4.45±0.15 3.80 7.62 8X0.60 8X0.70 4X3.81 2X2.54 MISSING PIN : 2, 5, 8, 11, 34 16.00 15.875 1.90 Default tolerance : ± 0.5mm Lead length : 3.6 (-1.95mm) 0°~4°
CIPOS™ Tiny Final Datasheet V2.0 2019-05-21 IM393-L6E
Revision History
Major changes since the last revision Page or Reference Revision Date Description of changes
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