IM323-L6G INFINEON | Alldatasheet
Document overview
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Technical content
Features
- Fully isolated Dual In-Line molded module
- Applied full-package
- Lead-free terminal plating; RoHS compliant Inverter
- 600V Reverse conducting, RCD2 IGBT
- Rugged SOI gate driver technology with stability against transient and negative voltage
- Allowable negative VS potential up to -11V for signal transmission at VBS = 15V
- Integrated bootstrap functionality
- Over current shutdown
- Built-in NTC thermistor for temperature monitoring
- Under-voltage lockout at all channels
- Low-side emitter pins accessible for phase current monitoring (open emitter)
- Sleep function
- Cross-conduction prevention
- All of 6 switches turn off during protection Potential applications Air conditioning and Home appliances Industrial drives
Datasheet 2 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Product validation Product validation Qualified for industrial applications according to the relevant tests of JEDEC47/20/22. Table 1 Product information Base part number Package type Standard pack Remark Form MOQ IM323-L6G DIP 33x19 15 pcs / Tube 240 pcs IM323-L6G2 DIP 33x19 15 pcs / Tube 240 pcs Short lead
Datasheet 3 of 22 V 2.1 2022-01-28 Table of contents CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Table of contents
Datasheet 4 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Internal electrical schematic
1 Internal electrical schematic
NW (20) NV (21) W (23) V (2 4) U (25) P (26) (2) VB(U) (17) ITRIP (16) VFO (12) LIN(U) (13) L IN(V) (14) L IN(W) (18) V SS2 (15) V D D2 (4) VB(V) (6) VB(W) (7) HIN(U) (8) HIN(V) (9) HIN(W) (1) VS(U) (3) VS(V) (5) VS(W) NU (22) LI N 3 LI N 2 LI N 1 VFO ITRIP LO 3 LO 2 LO 1 HO 1 HO 2 HO 3 VB 1 VS 1 VS 2 VS 3 HI N 3 HI N 2 HI N 1 (10) V D D1 (11) VSS1 RBS 1 RC-IGBT RC-IGBT VB 2 RBS 2 RBS 3 VB 3 RC-IGBT (19) V OT RC-IGBT RC-IGBT RC-IGBT VDD VSS Figure 1 Internal electrical schematic
Datasheet 5 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Pin description
2 Pin description
2.1 Pin assignment
(2) VB(U) (17) ITRIP (16) VFO (12) LIN(U) (13) LIN(V) (14) LIN(W) (18) VSS2 (15) VDD2 (4) VB(V) (6) VB(W) (7) HIN(U) (8) HIN(V) (9) HIN(W) (1) VS(U) (3) VS(V) (5) VS(W) (10) VDD1 (11) VSS1 (19) VOT (20) NW (21) NV (23) W (24) V (25) U (26) P (22) NU Figure 2 Pin configuration Table 2 Pin assignment Pin number Pin name Pin description
1 VS(U) U-phase high-side floating IC supply offset voltage
2 VB(U) U-phase high-side floating IC supply voltage
3 VS(V) V-phase high-side floating IC supply offset voltage
4 VB(V) V-phase high-side floating IC supply voltage
5 VS(W) W-phase high-side floating IC supply offset voltage
6 VB(W) W-phase high-side floating IC supply voltage
7 HIN(U) U-phase high-side gate driver input
8 HIN(V) V-phase high-side gate driver input
9 HIN(W) W-phase high-side gate driver input
10 VDD1 Low-side control supply
11 VSS1 Low-side control negative supply
12 LIN(U) U-phase low-side gate driver input
13 LIN(V) V-phase low-side gate driver input
14 LIN(W) W-phase low-side gate driver input
15 VDD2 Low-side control supply
16 VFO Fault-output
17 ITRIP Over-current shutdown input
18 VSS2 Low-side control negative supply
19 VOT Temperature output
20 NW W-phase low-side emitter
21 NV V-phase low-side emitter
22 NU U-phase low-side emitter
23 W Motor W-phase output
24 V Motor V-phase output
25 U Motor U-phase output
26 P Positive bus input voltage
2.2 Pin description
responsible for the control of the integrated IGBT s. Figure 4. It is not recommended for proper work to provide input pulse-width lower than 1 µs. same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and LO3). kept steadily in a safe state. conduction of the external power switches. fault-clear time as shown in Figure 10.
Datasheet 7 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Pin description threshold (typ. = 0.525 V) is referenced to V SS. A n input noise filter (tITRIP = typ. 530 ns) prevents the driver to detect false over-current events. Over-current detection generates a shutdown of outputs of the gate driver. Fast track shutdown function allows low -side outputs to be turned off faster than high-side outputs about 200 ns. The fault-clear time is set to minimum 100 µs. VDDX, VSSX (Control supply and reference, Pin 10(15) and reference, Pin 11(18)) VDD is the control supply and it provides power both to input logic and to output power stage. Input logic is referenced to VSS ground. The under -voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 12.4 V is present. The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below VDDUV- = 11.5 V. This prevents the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. VB (U, V, W) and VS (U, V, W) (High-side supplies, Pin 1 - 6) VB to VS is the high-side supply voltage. The high-side circuit can float with respect to V SS following the external high-side power device emitter voltage. Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. The under-voltage detection operates with a rising supply threshold of typical V BSUV+ = 1 1.5 V and a falling threshold of VBSUV- = 10.7 V. VS (U, V, W) provide a high robustness against negative voltage in respect of VSS of -50 V transiently. This ensures very stable designs even under rough conditions. NW, NV, NU (Low-side emitter, Pin 20 - 22) The low -side emitters are available for current measurements of each phase leg. It is recommended to keep the connection to pin VSS as short as possible in order to avoid unnecessary inductive voltage drops. W, V, U (High-side emitter and low-side collector, Pin 23 - 25) These pins are connected to motor U, V, W input pins. P (Positive bus input voltage, Pin 26) The high -side IGBT s are connected to the bus voltage. It is noted that the bus voltage does not exceed 450 V.
Datasheet 8 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Absolute maximum ratings
3 Absolute maximum ratings
(VDD = 15V and TJ = 25° C, if not stated otherwise)
3.1 Module section
Description Symbol Condition Value Unit Storage temperature range TSTG -40 ~ 125 °C Operating case temperature TC Refer to Figure 7 -40 ~ 125 °C Operating junction temperature TJ -40 ~ 150 °C Maximum junction temperature1 TJ, switch, max 175 °C Isolation voltage VISO 1 min, RMS, f = 60 Hz 2000 V
3.2 Inverter section
Description Symbol Condition Value Unit Maximum blocking voltage VCES IC = 250 µA 600 V DC link supply voltage of P - N VPN Applied between P - N 450 V DC link supply voltage (surge) of P - N VPN(Surge) Applied between P - N 500 V Collector current2 IC TC = 25° C, TJ < 150° C ±15 A Maximum peak collector current ICP TC = 25° C, TJ < 150° C, less than 1 ms ±30 A Power dissipation per IGBT Ptot 27 W Short circuit withstand time tSC VDD = 15 V, VDC ≤ 400 V, TJ ≤ 150° C 3 µs
3.3 Control section
Description Symbol Condition Value Unit High-side offset voltage VS 600 V Repetitive peak reverse voltage of bootstrap diode VRRM 600 V Module control supply voltage VDD Applied between VDD - VSS -1 ~ 20 V High-side floating supply voltage (VB reference to VS) VBS Applied between VB - VS -1 ~ 20 V Input voltage (LIN, HIN, ITRIP) VIN -1 ~ VDD + 0.3 V Fault-output voltage VFO -1 ~ VDD + 0.3 V 1The maximum junction temperature rating of built in power chips is 175℃ under condition: max. 10 sec, every 10 min, max. 1 hrs cumulative over lifetime. 2Limited by junction temperature.
Datasheet 9 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Thermal characteristics
4 Thermal characteristics
Description Symbol Condition Value Unit Min. Typ. Max. Single IGBT thermal resistance, junction-case RthJC Low-side U-phase (See Figure 7 for TC measurement point) - - 4.7 K/W Single diode thermal resistance, junction-case RthJC, D - - 7.4 K/W
Datasheet 10 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Recommended operation conditions
5 Recommended operation conditions
All voltages are absolute voltages referenced to VSS -potential unless otherwise specified. Description Symbol Value Unit Min. Typ. Max. DC link supply voltage of P - N VPN 0 300 450 V Low-side supply voltage VDD 13 15 17.5 V High-side floating supply voltage (VB vs. VS) VBS 13 17.5 V Logic input voltages LIN, HIN, ITRIP VIN VITRIP 0 - 5 V Inverter PWM carrier frequency fPWM - - 20 kHz External dead time between HIN & LIN DT 1 - - µs Voltage between VSS - N (including surge) VCOMP -5 - 5 V Minimum input pulse width PWIN(ON), PWIN(OFF) 0.7 - - µs Control supply variation ΔVBS ΔVDD
1 V/µs
Datasheet 11 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Static parameters
6 Static parameters
(VDD = 15 V and TJ = 25° C, if not stated otherwise)
6.1 Inverter section
Description Symbol Condition Value Unit Min. Typ. Max. Collector-emitter saturation voltage VCE(Sat) IC = 12 A, TJ = 25° C IC = 12 A, TJ = 150° C 2.00 2.35 2.40 - V Collector-emitter leakage current ICES VCE = 600 V - - 1 mA Diode forward voltage VF IC = 12 A, TJ = 25° C IC = 12 A, TJ = 150° C 1.95 2.00 2.30 - V
6.2 Control section
Description Symbol Condition Value Unit Min. Typ. Max. Logic "1" input voltage (LIN, HIN) VIH 1.7 2.0 2.3 V Logic "0" input voltage (LIN, HIN) VIL 0.7 0.9 1.1 V ITRIP positive going threshold VIT, TH+ 475 525 570 mV ITRIP input hysteresis VIT, HYS 45 70 - mV VDD and VBS supply under-voltage positive going threshold VDD and VBS supply under-voltage negative going threshold VDD and VBS supply under-voltage lockout hysteresis VDDUVH, VBSUVH 0.5 0.9 - V Quiescent VBSx supply current (VBSx only) IQBS VHIN = 0 V - - 300 µA Quiescent VDD supply current (VDD only) IQDD VLIN = 0 V, VHINX = 5 V - - 1.1 mA Input bias current for LIN, HIN IIN+ VIN = 5 V - 1.1 1.7 mA Input bias current for ITRIP IITRIP+ VITRIP = 5 V - 68 185 µA Input bias current for VFO IFO VFO = 5 V, VITRIP = 0 V - 60 - µA VFO output voltage VFO IFO = 10 mA, VITRIP = 1 V - 0.35 - V Bootstrap diode forward voltage VF, BSD IF = 0.3 mA - 1.0 - V Bootstrap diode resistance RBSD Between VF = 4 V and VF = 5 V - 37 - Ω
Datasheet 12 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Dynamic parameters
7 Dynamic parameters
(VDD = 15V and TJ = 25° C, if not stated otherwise)
7.1 Inverter section
Description Symbol Condition Value Unit Min. Typ. Max. Turn-on propagation delay time ton VLIN, HIN = 5 V, IC = 15 A, VDC = 300 V - 720 - ns Turn-on rise time tr - 40 - ns Turn-on switching time tc(on) - 130 - ns Reverse recovery time trr - 135 - ns Turn-off propagation delay time toff VLIN, HIN = 5 V, IC = 15 A, VDC = 300 V - 805 - ns Turn-off fall time tf - 25 - ns Turn-off switching time tc(off) - 60 - ns Short circuit propagation delay time tSCP From VIT, TH+ to 10% ISC - 1250 - ns IGBT turn-on energy (includes reverse recovery of diode) Eon VDC = 300 V, IC = 15 A TJ = 25° C 150° C 365 515 µJ IGBT turn-off energy Eoff VDC = 300 V, IC = 15 A TJ = 25° C 150° C 170 230 µJ Diode recovery energy Erec VDC = 300 V, IC = 15 A TJ = 25° C 150° C 120 µJ
7.2 Control section
Description Symbol Condition Value Unit Min. Typ. Max. Input filter time ITRIP tITRIP VITRIP = 1 V - 530 - ns Input filter time at LIN, HIN for turn on and off tFIL, IN VLIN, HIN = 0 V or 5 V - 290 - ns Fault clear time after ITRIP-fault tFLT, CLR VITRIP = 1 V, Vpull-up = 5 V (R = 1 MΩ, C = 2 nF) 100 280 - µs ITRIP to fault propagation delay tFLT VLIN, HIN = 0 or 5 V, VITRIP = 1 V - 680 1000 ns Internal deadtime DTIC VIN = 0 or VIN = 5 V - 360 - ns Matching propagation delay time (On & Off) all channels MT External dead time > 500 ns - 20 - ns
Datasheet 13 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Thermistor characteristics
8 Thermistor characteristics
Description Symbol Condition Value Unit Min. Typ. Max. Resistance RNTC TNTC = 25° C - 85 - kΩ B-constant of NTC (Negative Temperature Coefficient) thermistor B (25/100) - 4092 - K Temp. [° C] RMin. [kΩ] RTyp. [kΩ] RMax. [kΩ] 50 29.151 30.157 31.178 60 20.018 20.669 21.329 70 13.994 14.424 14.858 80 9.946 10.234 10.523 90 7.177 7.373 7.569 100 5.253 5.388 5.523 110 3.884 3.99 4.096 120 2.908 2.991 3.075 125 2.527 2.601 2.676 Figure 6 Thermistor resistance – temperature curve and table (For more information, please refer to application note ‘AN2021-04 CIPOSTM Tiny IM323 application note’.) 500 1000 1500 2000 2500 3000 3500 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Thermistor resistance [kΩ] Thermistor temperature [°C] Min. Typ. Max. 50 60 70 80 90 100 110 120 130 Thermistor resistance [kΩ] Thermistor temperature [°C] Min. Typ. Max.
Datasheet 14 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Mechanical characteristics and ratings
9 Mechanical characteristics and ratings
Description Condition Value Unit Min. Typ. Max. Mounting torque M3 screw and washer 0.59 0.69 0.78 N∙m Terminal strength pull Control terminal: Load 5 N Power terminal: Load 10 N JEITA-ED-4701 10 - - s Terminal strength bending Control terminal: Load 2.5 N Power terminal: Load 5 N 90degree bend JEITA-ED-4701 2 - - times Backside curvature Refer to Figure 8 0 - 110 µm Weight - 5.6 - g
Datasheet 15 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Qualification information
10 Qualification information
UL certification File number: E314539 Moisture sensitivity level - RoHS compliant Yes (Lead-free terminal plating) ESD (Electrostatic Discharge) HBM (Human body model) 2000 V CDM (Charged device model) 500 V
Datasheet 16 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Diagrams and tables
11 Diagrams and tables
11.1 TC measurement point
Figure 7 TC measurement point1
11.2 Backside curvature measurement point
Figure 8 Backside curvature measurement position 1Any measurement except for the specified point in Figure 7 is not relevant for the temperature verification and brings wrong or different information.
Datasheet 17 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Diagrams and tables
11.3 Switching time definition
0.9V 2.1V 90% 10%10% 10% 90% toff tf ton tr tc(off) tc(on ) 10% trr 10% Figure 9 Switching times definition
11.4 Sleep function timing diagram
Figure 10 Sleep function timing diagram
Datasheet 18 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Application guide
12.1 Typical application schematic
5 or 3.3V line U-phase current sensing <Signal for protection> Temperature monitor Micro Controller #8 #9 3-ph AC Motor V-phase current sensing W-phase current sensing <Signal for protection> Power GND line Control GND line #3 #4 5 or 3.3V line #4.1 NW (20) NV (21) W (23) V (2 4) U (25) P (26) (2) VB(U) (17) ITRIP (16) VFO (12) LIN(U) (13) LIN(V) (14) LIN(W) (18) VSS2 (15) VD D2 (4) VB(V) (6) VB(W) (7) HIN(U) (8) HIN(V) (9) HIN(W) (1) VS(U) (3) VS(V) (5) VS(W) NU (22) LI N 3 LI N 2 LI N 1 VFO ITRIP LO 3 LO 2 LO 1 HO 1 HO 2 HO 3 VB 1 VS 1 VS 2 VS 3 HI N 3 HI N 2 HI N 1 (10) VD D1 (11) VSS1 RBS 1 RC-IGBT RC-IGBT VB 2 RBS 2 RBS 3 VB 3 RC-IGBT (19) VOT RC-IGBT RC-IGBT RC-IGBT VDD VSS Figure 11 Typical application circuit 1. VB-VS circuit - Capacitor and Zener diode for high-side floating supply voltage should be placed as close to V B and VS pins as possible. 2. Input circuit - To reduce input signal noise by high speed switching, the RIN and CIN filter circuit should be mounted. (100 Ω, 1 nF) - CIN should be placed as close to VSS pin as possible. 3. VFO circuit - VFO pin is open drain configuration. This terminal should be pulled up to the bias voltage of the 5 V/3.3 V through a proper resistor. - It is recommended that RC filter is placed close to the controller. 4. VDD-VSS circuit - Capacitor and Zener diode for control supply voltage should be placed as close to VDD2 and VSS2 pins as possible. 5. ITRIP circuit - To prevent protection function errors, CITRIP should be placed as close to ITRIP and VSS2 pins as possible. 6. VOT circuit Capacitor should be placed as close to VOT and VSS pins as possible due to VOT voltage is analog voltage. 7. Snubber capacitor - The wiring between IPM and snubber capacitor including shunt resistor should be as short as possible. 8. Shunt resistor - The shunt resistor of SMD type should be used for reducing its stray inductance. 9. Ground pattern - Ground pattern should be separated at only one point of shunt resistor as short as possible.
Datasheet 19 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Package outline Figure 12 IM323-L6G
Datasheet 20 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2 Package outline Figure 13 IM323-L6G2
Datasheet 21 of 22 V 2.1 2022-01-28 CIPOS™ Tiny IM323 IM323-L6G/IM323-L6G2
Revision history
version Date of release Description of changes V 2.0 2021-12-09 Initial release V 2.1 2022-01-28 UL certification updated
81726 München, Germany
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