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Technical content
Features
Integrated gate drivers and bootstrap functionality Overcurrent protection & fault reporting Low 0.063Ω RDS(on), 250V OptiMOS™ Under-voltage lockout for both channels Shoot through protection Matched propagation delay for all channels Optimized dv/dt for loss and EMI trade offs Advanced input filter 3.3V input logic compatible Motor power range 80-200W 1500VRMS min isolation Potential Applications Linear refrigerator compressors High efficiency single-phase motor drives DC-AC inverters Product Validation Qualified for industrial applications according to the relevant tests of JEDEC47/20/22. Table 1 Part Ordering Table Base Part Number Package Type Standard Pack Orderable Part Number Form Quantity IM111-X3Q1B QFN 12x10mm Tape and Reel 2000 IM111-X3Q1BAUMA1
CIPOS™ Nano IM111-X3Q1B Final Datasheet 2 Revision 1.0 2019-12-12 Table of contents 2.1 2.2 3.1 3.2 3.3 6.1 6.2 7.1 7.2 10.1 10.2 11.1 11.2 11.3
CIPOS™ Nano IM111-X3Q1B Final Datasheet 3 Revision 1.0 2019-12-12
1 Internal Electrical Schematic
13 ITRIP1
9 VB1
10 VDD1
11 HIN1
12 LIN1
14 RFE1
15, 39 COM1
16 NTC
36 VB2
37 VDD2
1 HIN2
2 LIN2
5, 38 COM2 6~8, 32~35 V+ 19~25 VS1 17~18 VR1 29~30 VR2 26~28, 31 VS2 Integrated in HVIC
3 ITRIP2
4 RFE2
Figure 1 Internal electrical schematic.
CIPOS™ Nano IM111-X3Q1B Final Datasheet 4 Revision 1.0 2019-12-12
2 Pin Configuration
2.1 Pin Assignment
1 HIN2 Logic Input for High Side Gate Driver (Active High)
2 LIN2 Logic Input for Low Side Gate Driver (Active High)
3 ITRIP2 Over Current Protection
4 RFE2 Fault Clear, Fault Reporting & Enable
5 COM2 Logic Ground
6-8 V+ DC Bus Voltage Positive
9 VB1 High Side Floating Supply (Bootstrap Cap Connection +)
10 VDD1 Low Side Control Supply
11 HIN1 Logic Input for High Side Gate Driver (Active High)
12 LIN1 Logic Input for Low Side Gate Driver (Active High)
13 ITRIP1 Over Current Protection
14 RFE1 Fault Clear, Fault Reporting & Enable
15 COM1 Logic Ground
16 NTC Negative Temperature Coeffient Thermistor
31 VS2 Phase Output (Bootstrap Cap Connection -)
32-35 V+ DC Bus Voltage Positive
36 VB2 High Side Floating Supply (Bootstrap Cap Connection +)
37 VDD2 Low Side Control Supply
38 COM2 Logic Ground
39 COM1 Logic Ground
CIPOS™ Nano IM111-X3Q1B Final Datasheet 5 Revision 1.0 2019-12-12
2.2 Pin Descriptions
LIN and HIN (Low side and high side control pins) These pins are positive logic and they are responsible for the control of the integrated OptiMOS. The Schmitt -trigger input threshold s of them are such to guarantee LSTTL and CMOS compatibility down to 3.3V controller outputs. Pull - down resistor of about 800k is internally provided to pre-bias inputs during supply start-up and an ESD diode is provided for pin protection purposes. Input Schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses. The noise filter suppresses control pulses which are below the filter time tFILIN. The filter acts according to Figure 4. CIPOSTM INPUT NOISE FILTER M8.0 Schmitt-Trigger SWITCH LEVEL VIH; VILCOM HINx LINx Figure 3 Input pin structure HIN LIN HO LOlow high tFILIN tFILINa) b) HIN LIN HO LO Figure 4 Input filter timing diagram The integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on-state of the high-side and low- side switch of the same inverter phas e. A minimum deadtime insertion of typically 3 00ns is also provided by driver IC, in order to reduce cross - conduction of the external power switches. VDD, COM (Low side control supply and reference) VDD is the control supply and it provides power both to input logic and to output power stage. Input logic is referenced to COM ground. The under -voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 8.9V is present. The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below VDDUV- = 7.7 V. This prevents the external power switches from critically low gate voltage levels during on - state and therefore from excessive power dissipation. VB and VS (High side supplies) VB to VS is the high side supply voltage. The high side circuit can float with respect to COM following the external high side power device source voltage. Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. The under-voltage detection operates with a rising supply threshold of typical VBSUV+ = 8.9V and a falling threshold of VBSUV- = 7.7V. VS provide a h igh robustness against negative voltage in respect of COM. This ensures very stable designs even under rough conditions. VR (Low side source) The low side source is available for current measurements of each phase leg. It is recommended to keep the connection to pin COM as short as possible in order to avoid unnecessary inductive voltage drops. VS (High side source and low side drain) This pin is motor input pin. V+ (Positive bus input voltage) The high side OptiMOS devices are connected to the bus voltage. It is noted that the bus voltage does not exceed 200V. ITRIP (Over current protection) Analog input for over-current shutdown. When active, ITRIP shuts down outputs and activates RFE low. RFE (Fault clear, fault reporting and enable) Integrated fault reporting function, fault clear timer and external enable pin. This pin has negative logic and an open-drain output.
CIPOS™ Nano IM111-X3Q1B Final Datasheet 6 Revision 1.0 2019-12-12
3 Absolute Maximum Ratings
3.1 Module
Parameter Symbol Condition Units Storage temperature TSTG -40 ~ 150 °C Operating case temperature TC -40 ~ 125 °C Operating junction temperature TJ -40 ~ 150 °C Isolation voltage1 VISO 1min, RMS, f = 60Hz 1500 V 1. Characterized, not tested at production
3.2 Inverter
Parameter Symbol Condition Units Max. blocking voltage VDSS/VRRM 250 V Output current based on RTH(J-C)B 1 IO TC = 25°C, DC 12 A Peak output current IOP TC = 25°C, pulsed current 38 A Output current based on RTH(J-A) IOA TA = 25°C, DC 4 A Peak power dissipation per MOSFET P TC = 25°C 150 W 1. Limited by wire bonding current capability inside the package
3.3 Control
Parameter Symbol Condition Units Low side control supply voltage VDD -0.3 ~ 20 V Input voltage LIN, HIN VIN -0.3 ~ VDD V High side floating supply voltage (VB reference to VS) VBS -0.3 ~ 20 V
CIPOS™ Nano IM111-X3Q1B Final Datasheet 7 Revision 1.0 2019-12-12
4 Thermal Characteristics
Parameter Symbol Conditions Min. Typ. Max. Units Single MOSFET thermal resistance, junction-case (bottom) RTH(J-C)B Measures either high side or low side device - 0.7 - °C/W Thermal resistance, junction-ambient(1) RTH(J-A) - 12 - °C/W (1) The junction to ambient thermal resistance is simulated based on standard JESD51-5/7 using a FR4 2s2p board with device mounted and power evenly distributed to four power MOSFETs.
CIPOS™ Nano IM111-X3Q1B Final Datasheet 8 Revision 1.0 2019-12-12
5 Recommended Operating Conditions
Parameter Symbol Min. Typ. Max. Units Positive DC bus input voltage V+ - - 200 V Low side control supply voltage VDD 13.5 - 16.5 V High side floating supply voltage VBS 12.5 - 17.5 V Input voltage VIN 0 - 5 V PWM carrier frequency FPWM - 6 - kHz External dead time between HIN & LIN DT 1 - - µs Voltage between COM and VR VCOMR -5 - 5 V Minimum input pulse width PWIN(ON), PWIN(OFF) 0.5 - - µs
CIPOS™ Nano IM111-X3Q1B Final Datasheet 9 Revision 1.0 2019-12-12
6 Static Parameters
6.1 Inverter
(VDD-COM) = (VB - VS) = 15 V. TC = 25°C unless otherwise specified. Table 8 Parameter Symbol Conditions Min. Typ. Max. Units Drain to Source ON Resistance RDS(on) ID = 1A - 0.063 0.073 Ω ID= 1A, TJ = 150℃ - 0.12 - Ω Drain source leakage current IDSS VIN = 0V, V+ = 250V - 15 - µA VIN = 0V, V+ = 250V, TJ = 150°C - 40 - µA Diode forward voltage VF IF = 1A - 0.71 - V IF = 1A, TJ = 150℃ - 0.48 - V
6.2 Control
(VDD-COM) = (VB - VS) = 15 V. TC = 25°C unless otherwise specified. The VIN and IIN are referenced to COM and are applicable to all six channels. The VDDUV is referenced to COM. The VBSUV is referenced to VS. Table 9 Parameter Symbol Min. Typ. Max. Units Logic “1” input voltage (LIN, HIN) VIN,TH+ 2.2 - - V Logic “0” input voltage (LIN, HIN) VIN,TH- - - 0.8 V RFE positive going threshold VRFE+ - - 2.5 V RFE negative going threshold VRFE- 0.8 - - V VDD/VBS supply undervoltage, positive going threshold VDD,UV+, VBS,UV+ 8 8.9 9.8 V VDD/VBS supply undervoltage, negative going threshold VDD,UV-, VBS,UV- 6.9 7.7 8.5 V VDD/VBS supply undervoltage lock-out hysteresis VDDUVH, VBSUVH - 1.2 - V Quiescent VBS supply current IQBS - 45 70 µA Quiescent VDD supply current IQCC 1.0 1.7 3.0 mA Input bias current VIN=4V for LIN,HIN IIN+ - 5 20 µA Input bias current VIN=0V for LIN, HIN IIN- - - 2 µA Input bias current VIN = 4V for RFE IIN,RFE+ - 0 1 µA Input bias current VIN = 4V for ITRIP ITRIP+ - 5 20 µA ITRIP positive going threshold VIT,TH+ 0.475 0.500 0.525 V ITRIP negative going threshold VIT,TH- - 0.43 - V ITRIP input hysteresis VIT,HYS - 0.07 - V Bootstrap resistance RBS - 200 - Ω RFE low on resistance RRFE - 50 100 Ω
CIPOS™ Nano IM111-X3Q1B Final Datasheet 10 Revision 1.0 2019-12-12
7 Dynamic Parameters
7.1 Inverter
(VDD-COM) = (VB - VS) = 15 V. TC = 25°C unless otherwise specified. Table 10 Parameter Symbol Conditions Min. Typ. Max. Units Input to output turn-on propagation delay TON ID = 1A, V+ = 150V - 0.6 - µs Turn-on rise time TR - 11 - ns Turn-on switching time TC(on) - 42 - ns Input to output turn-off propagation delay TOFF ID = 1A, V+ = 150V - 0.7 - µs Turn-off fall time TF - 106 - ns Turn-off switching time TC(off) - 96 - ns RFE low to six switch turn-off propagation delay TEN VIN = 0 or VIN = 5V, VEN = - 0.44 - µs ITRIP to six switch turn-off propagation delay TITRIP - 920 - ns Turn-on switching energy EON ID = 1A, V+ = 150V, VDD = 15V, L = 9mH - 12 - µJ Turn-off switching energy EOFF - 5 - Diode reverse recovery energy EREC - 10 - Diode reverse recovery time TRR - 35 - ns Turn-on switching energy EON ID = 1A, V+ = 150V, VDD = 15V, L = 9mH, TJ = 150°C - 24 - µJ Turn-off switching energy EOFF - 5 - Diode reverse recovery energy EREC - 13 - Diode reverse recovery time TRR - 55 - ns
7.2 Control
(VDD-COM) = (VB - VS) = 15V. TC = 25°C unless otherwise specified. Table 11 Parameter Symbol Conditions Min. Typ. Max. Units Input filter time (HIN, LIN, ITRIP) TFIL,IN VIN = 0 or VIN = 5V - 300 - ns Input filter time (RFE) TFIL,EN VRFE = 0 or VRFE = 5V - 500 - ns ITRIP to Fault propagation delay TFLT VIN = 0 or VIN = 5V, VITRIP = 5V - 660 - ns Internal injected dead time TDT,GD VIN = 0 or VIN = 5V - 300 - ns Matching propagation delay time (on and off) for same phase high-side and low-side MT External dead time > 1µs - - 50 ns
CIPOS™ Nano IM111-X3Q1B Final Datasheet 11 Revision 1.0 2019-12-12
8 Thermistor Characteristics
Parameter Symbol Conditions Min. Typ. Max. Units Resistance R25 TC = 25°C, ±5% tolerance 44.65 47 49.35 kΩ Resistance R125 TC = 125°C 1.27 1.39 1.51 kΩ B-constant (25/100) B ±1% tolerance - 4006 - K Temperature Range -20 - 150 °C Figure 5 Thermistor resistance – temperature curve, for REXT=9.76kΩ, and thermistor resistance variation with temperature. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 Thermistor Pin Readout Voltage VTH (V) Thermistor Temperature TTH (°C) max typ min TTH [℃] Rmin [kΩ] Rtyp [kΩ] Rmax [kΩ] 50 15.448 16.432 17.436 60 10.483 11.194 11.924 70 7.245 7.765 8.302 80 5.092 5.477 5.876 90 3.648 3.937 4.237 100 2.653 2.872 3.101 110 1.957 2.125 2.301 120 1.462 1.592 1.729 125 1.269 1.384 1.505 +3.3V REX T R VTH
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9 Qualification Information
Moisture sensitivity level MSL3 RoHS Compliant Yes ESD CDM ±2kV, Class C3, per ANSI/ESDA/JEDEC JS-002 standard HBM ±2kV, Class 2, per ANSI/ESDA/JEDEC JESD22-A114F standard
CIPOS™ Nano IM111-X3Q1B Final Datasheet 13 Revision 1.0 2019-12-12
10 Diagrams & Tables
10.1 Input-Output Logic Table
Figure 6 Module block diagram Table 14 RFE ITRIP HIN LIN U,V,W 1 0 1 0 V+ 1 0 0 1 0 1 0 0 0 ‡ 1 0 1 1 ‡ 1 1 x x ‡ 0 x x x ‡ ‡ Voltage depends on direction of phase current
10.2 Switching Time Definitions
0.9V 2.1V 90% 10%10% 10% 90% toff tf ton tr tc(off) tc(on) 10% trr 10% Figure 7 Switching times definition
CIPOS™ Nano IM111-X3Q1B Final Datasheet 14 Revision 1.0 2019-12-12
11.1 Typical Application Schematic
Figure 8 Application schematic
11.2 Performance Charts
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 Max Motor Current [Arms] PCB Ambient Temperature [℃] V+ = 170V, VDD=VBS=15V, TJ≤150°C, MI=0.8, PF=0.8, Bipolar SPWM, RTH(J-A)=12°C/W FPWM=6kHz FPWM=16kHz
CIPOS™ Nano IM111-X3Q1B Final Datasheet 15 Revision 1.0 2019-12-12 11.3 –Vs Immunity Figure 10 –Vs immunity
CIPOS™ Nano IM111-X3Q1B Final Datasheet 16 Revision 1.0 2019-12-12 Dimensions in mm
CIPOS™ Nano IM111-X3Q1B Final Datasheet 17 Revision 1.0 2019-12-12 Note: Exposed tie bars on side of the module. T1 is internally connected to pin 37 T2 is internally connected to pin 15 T3 is internally connected to pin 12 T4 is internally connected to pin 31 T5 is internally connected to pin 5
CIPOS™ Nano IM111-X3Q1B Final Datasheet 18 Revision 1.0 2019-12-12
Revision History
Major changes since the last revision Page or Reference Description of change
All referenced product or service names and trademarks are the property of their respective owners. Edition 2019-12-12 Published by Infineon Technologies AG
81726 München, Germany
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