ILC7083 FAIRCHILD | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 16

Technical content

Features

  • Ultra low 1mV dropout per 1mA load
  • 3% output voltage accuracy
  • Only 40µV RMS noise
  • Uses low ESR ceramic output capacitor to minimize noise and output ripple
  • Only 100µA ground current at 100mA load
  • Ripple rejection up to 85dB at 1kHz, 60dB at 1MHz
  • Excellent line and load transient response
  • Over current / over temperature protection
  • Guaranteed to 150mA output current
  • Industry standard five lead SOT-23 package voltage for ILC7083 and adjustable output voltage for ILC7083/ILC7084
  • Metal mask option available for custom voltages between 2.5V and 5.1V

Applications

  • Cellular phones
  • Wireless communicators
  • PDAs / palmtops / organizers
  • Battery powered portable electronics

Description

The ILC7083/ILC7084 is a 150mA low dropout (LDO) voltage regulator designed to provide a high performance solution to low power systems. The device offers a typical combination of low dropout and low quiescent current expected of CMOS parts, while uniquely providing the low noise and high ripple rejection characteristics usually only associated with bipolar LDO regulators. The device has been optimized to meet the needs of modern wireless communications design; Low noise, low dropout, small size, high peak current, high noise immunity. The ILC7083/ILC7084 is designed to make use of low cost ceramic capacitors while outperforming other devices that require tantalum capacitors. As opposed to ILC7084, the ILC7083 has a built in output capacitor discharge circuit active in shutdown mode. This feature is necessary in applications where the output voltage must decrease quickly to zero volt in shutdown mode. Typical Applications ILC7083 12 3 ON OFF SOT-23-5 VOUT VIN CIN COUT CNOISE ILC7083/ILC7084 150mA SOT-23 Low Noise CMOS RF-LDO™ Regulator

REV. 1.0.9 1/28/03 Pin Assignments Pin Description ILC7083-xx (Fixed voltage version) Pin Description ILC7083-ADJ (Adjustable voltage version) Pin Number Pin Name Pin DescriptionSOIC-8 SOT-23-5 3 and 4 1 V IN Connect directly to supply 1 2 GND Ground pin. Local ground for C NOISE and C OUT 2 3 ON/OFF By applying less than 0.6V to this pin the device will be turned off. 84 C NOISE Optional noise bypass capacitor may be connected between this pin and GND. Do not connect C NOISE directly to the main power ground plane. 5 and 6 5 V OUT Output Voltage. Connect C OUT between this pin and GND. 7 – N/C Not Connected Pin Number Pin Name Pin DescriptionSOIC-8 SOT-23-5 3 and 4 1 V IN Connect directly to supply 1 2 GND Ground pin. Local ground for C NOISE and C OUT 2 3 ON/OFF By applying less than 0.6V to this pin the device will be turned off. 84 V ADJ Voltage feedback pin to set the adjustable output voltage. Do not connect a capacitor to this pin. 5 and 6 5 V OUT Output Voltage. Connect C OUT between this pin and GND. 7 – N/C Not Connected 5 4 GND ON/OFF VIN VIN CNOISE N/C V OUT VOUT 2 3 5 4 1 2 3 VOUT CNOISE VIN GND ON/OFF VIN GND ON/OFF SOT-23-5SOIC-8 SOT-23-5 VOUT VADJ ILC7083-xxILC7083-xx ILC7083ADJ or ILC7084ADJ GND ON/OFF VIN VIN VADJ N/C V OUT VOUT SOIC-8 ILC7083ADJ Fixed Voltage Option Adjustable Voltage Option

REV. 1.0.9 1/28/03 Internal Block Diagram Absolute Maximum Ratings Recommended Operating Conditions Parameter Symbol Ratings Units Input Voltage On/Off Input Voltage V IN V ON/OFF -0.3 to +13.5 -0.3 to V IN V Output Current I OUT Short circuit protected mA Output Voltage V OUT -0.3 to V IN + 0.3 V Package Power Dissipation (SOT-23-5) P D 250 (Internally Limited) mW Maximum Junction Temp Range T J(max) -40 to +150 °C Storage Temperature T STG -40 to +125 °C Package Thermal Resistance θ JA 333 °C/W Parameter Min. Typ. Max. Units Input Voltage V OUT + V DO V OUT + 1 13 V Operating Ambient Temperature –40 +85 °C ON/OFF GND VOUT VIN CNOISE FEEDBACK BANDGAP REFERENCE VREFD ERROR AMPLIFIER TRANS- CONDUCTANCE AMPLIFIER INTERNAL VDD

REV. 1.0.9 1/28/03 Unless otherwise specified, all limits are at T A =25°C; V IN = V OUT(NOM) +1V, I OUT = 1mA, C OUT = 1µF, V ON/OFF = 2V. Boldface type denotes specifications which apply over the specified operating temperature range. Notes: 1. Absolute maximum ratings indicate limits which when exceeded may result in damage to the component. Electrical specifications do not apply when operating the device outside of its rated operating conditions. 2. Speci fied Min/Max limits are production tested or guaranteed through correlation based on statistical control methods. Measurements are taken at constant junction temperature as close to ambient as possible using low duty pulse testing. 3. Dropout voltage is de fined as the input to output differential voltage at which the output voltage drops 2% below the nominal value measured with an IV differential. 4. Guaranteed by design. Parameter Symbol Conditions Min Typ Max Units Input Voltage Range V IN 21 3 V Output Voltage V OUT 1mA < I OUT < 150mA -3 V OUT(NOM) +3 %V OUT (NOM)1mA < I OUT < 150mA V OUT(NOM) Feedback Voltage (ADJ version) V ADJ 1.217 1.204 1.255 1.292 1.305 V Line Regulation V OUT OUT V IN V OUT(NOM) +1V < V IN < 12V 0.007 0.014 0.032 %/V Dropout Voltage (Note 3) V IN – V OUT I OUT = 0mA (Note 4) 0.1 1 mV I OUT = 10mA 10 25 I OUT = 50mA 50 75 100 I OUT = 100mA 100 150 200 I OUT = 150mA 150 225 300 Ground Pin Current I GND I OUT = 0mA 95 200 220 µA I OUT = 10mA 100 220 240 I OUT = 50mA 100 220 240 I OUT = 100mA 100 240 260 I OUT = 150mA 115 260 280 Shutdown (OFF) Current I ON/OFF V ON/OFF = 0V 0.1 µA ON/OFF Input Voltage V ON/OFF High = Regulator On Low = Regulator Off 1.5 0.6 ON/OFF Pin Input Current I IN( ON/OFF) V ON/OFF = 0.6V, regulator OFF V ON/OFF = 2V, regulator ON 0.3 µA Peak Output Current (Note 4) I OUT(peak) V OUT > 0.95V OUT(NOM) tpw = 2ms 400 500 mA Output Noise Voltage (RMS) eN BW = 300Hz to 50kHz, C IN = 1µF C NOISE = 0.01µF, C OUT = 2.2µF, I OUT = 10mA 40 µV RMS Ripple Rejection V OUT V IN C OUT = 4.7µF, I OUT = 100mA Freq. = 1kHz 85 dB Freq. = 10kHz 70 Freq. = 1MHz 60 Dynamic Line Regulation V OUT(line) V IN : VOUT(NOM) + 1V to VOUT(NOM) + 2V, tr/tf = 2µs; IOUT = 150mA 14 mV Dynamic Load Regulation ∆VOUT(load) IOUT: 1mA to 150mA; tr < 5µS 40 mV Short Circuit Current I SC VOUT = 0V 600 mA

reactive impedance of the load resistance and capacitance. complex interactions between the output and the load occur. ripple rejection and excellent line transient response. Figure 1. ILC7083/ILC7084 RF LDO Frequency Response the pole-zero scheme outlined above. systems that require short burst mode operation.

is applied to the ON/OFF pin. short circuit current capability. high ambient temperature or a combination of all three. conditions and is a necessary requirement in today’s designs. Figure 3. Application Circuit for Adjustable Output Voltage ity and lead to oscillations.

45 VADJ

Figure 2. ILC7083 RF LDO Regulator Block Diagram

ture and θJA = 333°C/W is the package thermal resistance. thermal protection circuit to be enabled. Figure 4. Basic Application Circuit for be used at the input of the LDO regulator. VOUT when the LDO is powered off. a tantalum capacitor may be used at the output. (www.kemet.com) may be used. consider omitting the noise bypass capacitor altogether.

45 CNOISE

the leads and the internal connections of the component. added ESR resistances are present in the typical LDO circuit. Figure 5. ESR Present in COUT and CNOISE voltage fluctuations at the input will be filtered by the LDO. ILC7083/ILC7084 will yield outstanding performance. Figure 6. Inherent PCB resistance the accumulation of current flows. will degrade performance of the LDO. rent and noise bypass current return of the LDO regulator. and returned to a single point system ground.

10 REV. 1.0.9 1/28/03 Evaluation Board Parts List (for Figure 9) Label Part Number Manufacturer Description U1 ILC7083AIM5-30 Fairchild Semiconductor 150mA RF LDO ™ regulator J1 69190-405 Berg Connector, four position header Cin GRM40 Y5V 105Z16 muRata Ceramic capacitor, 1 µF,16V, SMT (size 0805) Cnoise ECU-V1H103KBV Panasonic Ceramic capacitor, 0.01 µF,16V, SMT (size 0603) Cout GRM42-6X5R475K10 muRata Ceramic capacitor, 4.7 µF,16V, SMT (size 1206) Grounding Recommendations 1. Connect C IN between VIN of the ILC7083 and the “GROUND PLANE”. 2. Keep the ground side of C OUT and CNOISE connected to the “LOCAL GROUND” and not directly to the “GROUND PLANE”. 3. On multilayer boards use component side copper for grounding around the ILC7083 and connect back to a “GROUND PLANE” using vias. 4. If using a DC-DC converter in your design, use a star grounding system with separate traces for the power ground and the control signals. The star should radiate from where the power supply enters the PCB. Layout Considerations 1. Place all RF LDO related components; ILC7083, input capacitor CIN, noise bypass capacitor CNOISE and output capacitor COUT as close together as possible. 2. Keep the output capacitor C OUT as close to the ILC7083 as possible with very short traces to the VOUT and GND pins. 3. The traces for the related components; ILC7083, input capacitor CIN, noise bypass capacitor CNOISE and output capacitor COUT can be run with minimum trace widths close to the LDO. 4. Maintain a separate “LOCAL GROUND” remote from the “GROUND PLANE” to ensure a quiet ground near the LDO. Figure 9 shows how this circuit can be translated into a PCB layout. Recommended Ceramic Output Capacitors COUT Capacitor Size I OUT Dielectric Part Number Capacitor Vendor 1µF 0805 0 to 150mA X5R C2012X5R1A105KT TDK

0805 X7R GRM40X7R105K010 muRata

0805 X7R LMK212BJ105KG Taiyo-Yuden

1206 X7R GRM42-6X7R105K016 muRata

1206 X7R EMK316BJ105KL Taiyo-Yuden

1206 X5R TMK316BJ105KL Taiyo-Yuden

2.2µF 0805 0 to 150mA X5R GRM40X5R225K 6.3 muRata

0805 X5R C2012X5R0J225KT TDK

1206 X5R EMK316BJ225ML Taiyo-Yuden

4.7µF 1206 0 to 150mA X5R GRM42-6X5R475K010 muRata

1206 X7R LMK316BJ475ML Taiyo-Yuden

REV. 1.0.9 1/28/03 11 Typical Performance Characteristics ILC7083/ILC7084 Unless otherwise specified: TA = 25°C, VIN = VOUT(NOM) + 1V, ON/OFF pin tied to VIN Output Voltage vs Temperature 3.015 3.01 3.005 2.995 2.99 Output voltage (V) COUT = 1µF (Ceramic) VOUT = 3.0V 2.985 Temperature (°C) 0 50 100 150-50 Dropout Characteristics VIN (V) 3.4 3.3 3.2 3.1 VOUT (V) COUT = 1µF (Ceramic) VOUT = 3.3V 3 3.2 3.4 3.6 IOUT = 0mA IOUT = 10mA IOUT = 50mA Dropout Voltage vs Temperature Dropout voltage (mV) Temperature (°C) 250 200 150 100 –40 85 25 VOUT = 3.0V IOUT = 150mA IOUT = 100mA IOUT = 50mA IOUT = 0mA 250 200 150 100 0 50 100 150 Dropout Voltage vs IOUT Dropout voltage (mV) Output Current (mA) TA = –40°C TA = 85°C TA = 25°C VOUT = 3.0V 150 125 100 2 4 6 8 10 12 14 Ground Current vs Input Voltage VOUT = 3.0 V COUT = 1µF (Ceramic) IOUT = 150mA IOUT = 100mA IOUT = 50mA IOUT = 10mA IOUT = 0mA VIN (V) IGND (µA) Line Transient Response 5µs/div VIN (V)VOUT (V) 3.01 3.00 2.99 2.98 VIN: tr/tf < 1 µs VOUT = 3.0V COUT = 2.2 µF (Ceramic) IOUT = 100 mA IOUT = 100mA IOUT = 150mA

12 REV. 1.0.9 1/28/03 Typical Performance Characteristics ILC7083/ILC7084 Unless otherwise specified: TA = 25°C, VIN = VOUT(NOM) + 1V, ON/OFF pin tied to VIN Load Transient Response 100µs/div 3.15 3.10 3.05 3.00 2.95 100 VOUT (V)IOUT (mA) COUT = 1 µF || 0.47 µF (Ceramic) VOUT = 3.0V Short Circuit Current 5ms/div ISC (A) 1.5 1.0 VIN = 4V 0.5 Output Shorted to Gnd at time, t = 0 t = 0 Thermal Cycling On/Off Transient Response 100µS/div VOUT (V) VOUT = 2.8V IOUT = 10mA COUT = 1µF Without CNOISE Capacitor VON/OFF (V) On/Off Transient Response 100µS/div VOUT (V) VOUT = 2.8V IOUT = 150mA COUT = 1µF Without CNOISE Capacitor VON/OFF (V) On/Off Transient Response 5mS/div VOUT (V) VON/OFF (V) VOUT = 2.8V IOUT = 150mA CNOISE = 0.01µF , COUT = 1µFCNOISE = 0.01µF , COUT = 1µF On/Off Transient Response 5mS/div VOUT (V) VOUT = 2.8V IOUT = 10mA VON/OFF (V)

REV. 1.0.9 1/28/03 13 Typical Performance Characteristics ILC7083/ILC7084 Unless otherwise specified: TA = 25°C, VIN = VOUT(NOM) + 1V, ON/OFF pin tied to VIN 120 100 Spectral Noise Density Frequency (Hz) 0.1 Noise (µV/Rt Hz) 10K 1M1K10010 0.01 0.001 VOUT = 2.8V 10M IOUT = 50mA CNOISE = 0.01µF COUT = 10µF (Ceramic) COUT = 2.2µF or 4.7µF (Ceramic) COUT = 1µF (Ceramic) 100K Spectral Noise Density Frequency (Hz) 0.1Noise (µV/Rt Hz) 10K 100K1K10010 0.01 0.001 VOUT = 2.8V COUT = 2.2µF CNOISE = 0.01µF IOUT = 1 mA IOUT = 50mA, 100mA or 150 mA Output Noise Voltage vs. CNOISE Freq Band Noise (µVrms)

100 Hz–

50 KHz

100 KHz

300 Hz–

VOUT = 3V IOUT = 10mA COUT = 2.2µF(Ceramic) CNOISE = 1.2nF 5.6nF 0.047µF 0.039µF 8.2nF 0.022µF 0.01µF Output Noise Voltage vs. CNOISE Freq Band Noise (µVrms) VOUT = 3V IOUT = 10mA COUT = 4.7µF(Ceramic) CNOISE = 1.2nF 5.6nF 0.047µF 0.039µF 0.022µF 0.016µF 8.2nF Ripple Rejection vs. Frequency Frequency (Hz) 40Ripple Rejection (dB) 10K 1M1K10010 VOUT = 2.8V 10M IOUT = 150mA 100K Ripple Rejection vs. Frequency Ripple Rejection (dB) 10K 1M1K10010 VOUT = 3V 10M IOUT = 10mA COUT = 1µF 100K COUT = 10µF COUT = 4.7µF COUT = 2.2µF COUT = 1µF COUT = 2.2µF COUT = 4.7µF COUT = 10µF Frequency (Hz)

14 REV. 1.0.9 1/28/03 Mechanical Dimensions 8-Lead Plastic Surface Mount (SOIC) D A – C – ccc C LEAD COPLANARITY SEATING PLANEe B L h x 45° C α EH A .053 .069 1.35 1.75 Symbol Inches Min. Max. Min. Max. Millimeters Notes A1 .004 .010 0.10 0.25 .020 0.51B .013 0.33 C .0075 .010 0.20 0.25 E .150 .158 3.81 4.01 e .228 .244 5.79 6.20 .010 .020 0.25 0.50 H .050 BSC 1.27 BSC h L .016 .050 0.40 1.27 0° 8° 0° 8° N8 8 α ccc .004 0.10—— D .189 .197 4.80 5.00 Notes: Dimensioning and tolerancing per ANSI Y14.5M-1982. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). "L" is the length of terminal for soldering to a substrate. Terminal numbers are shown for reference only. "C" dimension does not include solder finish thickness. Symbol "N" is the maximum number of terminals.

REV. 1.0.9 1/28/03 15 5-Lead Plastic Surface Mount (SOT-23-5) eB D A L c E H A .035 .057 Symbol Inches Min. Max. Min. Max. Millimeters Notes A1 .000 .006 .020B .008 c .003 .010 E .059 .071 e H .087 .126 .037 BSC .075 BSC 0° 10° L α D .106 .122 .90 1.45 .00 .15 .50.20 .08 .25 1.50 1.80 2.20 3.20 .004 .024 .10 .60 .95 BSC

1.90 BSC

0° 10° 2.70 3.10 Notes: Package outline exclusive of mold flash & metal burr. Package outline exclusive of solder plating. EIAJ Ref Number SC-74A.

1/28/03 0.0m 001 Stock#DS30007083 2003 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. Ordering Information (TA = -40°C to +85°C) Part Number Output Voltage (V) Package Package Marking ILC7083AIM525X 2.5 SOT -23-5 BM ILC7083AIM527X 2.7 SOT -23-5 BN ILC7083AIM5285X 2.85 SOT -23-5 BJ ILC7083AIM530X 3.0 SOT -23-5 BB ILC7083AIM533X 3.3 SOT -23-5 BC ILC7083AIM536X 3.6 SOT -23-5 BD ILC7083AIM550X 5.0 SOT -23-5 BE ILC7083AIM5ADJX Adjustable SOT -23-5 BF ILC7083AIK30X 3.0 SOIC-8 7083A1K3 ILC7083AIKADJ Adjustable SOIC-8 7083A1K ILC7084AIM5ADJX Adjustable SOT -23-5 DF