ILA8138A ETC1 | Alldatasheet

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Technical content

5.1V +12V REGULATOR WITH DISABLE AND RESET The ILA8138A is a monolithic dual positive voltage regulator de signed to provide fixed precision output voltages of 5.1V and 12V at currents up to 1A. Output 2 can be disabled by TTL input. Short circuit and thermal protections are included in all the versions.

  • Output currents up to 1 A
  • Fixed precision OUTPUT 1 voltages 5.1 V ± 2%
  • Fixed precision OUTPUT 2 voltages 12 V ± 2%
  • OUTPUT 1 with RESET facility
  • OUTPUT 2 with DISABLE by TTL input
  • Short circuit protection at both outputs
  • Thermal protection
  • Low drop output voltage ILA8138A TO-220AB/7 HEPTAWAT (Plastic Package)

ORDERING INFORMATION

TJ = -0° to 130°C PIN ASSIGNMENT BLOCK DIAGRAM DISABLE REFERENCE OUT 1 OUT 1 INPUT 1 INPUT 2 OUT 2 OUT 2DISABLE3 PROTECTION

1 INPUT 1

N.C. OUTPUT 1 OUTPUT 2

MAXIMUM RATINGS* Symbol Parameter Min Max Unit VIN1 DC Input Voltage Pin 1 0 20 V VIN2 DC Input Voltage Pin 2 0 20 V VDIS Disable Input Voltage Pin 3 0 20 V IO1,2 Output Currents 0 1.6 A Tstg Storage Temperature -65 150 °C TJ Junction Temperature 0 150 °C *Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VIN1 DC Input Voltage Pin 1 7.0 16 V VIN2 DC Input Voltage Pin 2 14 18 V VDIS Disable Input Voltage Pin 3 0 7.0 V IO1,2 Output Currents 0 1.6 A TJ Junction Temperature 0 130 °C THERMAL DATA Symbol Parameter Vlalue Unit Rth (j-c) Maximum Thermal Resistance Junction-case 6 oC/W Rth (j-a) Maximum Thermal Resistance Junction -ambient 60 oC/W

ELECTRICAL CHRACTERISTICS (VIN1 = 7 V, VIN2 = 14 V, TJ = 25°C, unless otherwise specified) Guaranteed Limit Symbol Parameter Test Conditions Min Max Unit VO1 Output Voltage VIN1 = 7 V, IO1= -10 mA 5.0 5.2 V VO2 VIN1 = 7 V, VIN2 = 14 V, IO2= -10 mA 11.76 12.24 V VO1 -5 mA ≤ IO2 ≤ -750 mA,

7 V ≤ VIN1 ≤ 14 V

4.9 5.3 V VO2 -5 mA ≤ IO2 ≤ -750 mA,

14 V ≤ VIN2 ≤ 18 V, VIN1 = 7 V

11.5 12.5 V Δ VO1 LI Line Regulation 7 V ≤ VIN2 ≤ 14 V, IO1 = -200 mA 50 mV Δ VO2 LI 14 V ≤ VIN2 ≤ 18 V, IO1 = -200 mA, VIN1 = 7 V 120 Δ VO1 LO Load Regulation VIN1 = 7 V, -5 mA ≤ IO1 ≤ -0.6 mA 100 mV Δ VO2 LO VIN1 = 7 V, VIN2 = 14 V, -5 mA ≤ IO2 ≤ -0.6 mA 250 VIO1 Dropout Voltage VIN1 = 7 V, IO1 = -750 mA 1.4 V VIN1 = 7 V, IO1 = -1.0 mA 2.0 VIO2 Dropout Voltage VIN1 = 7 V, VIN2 = 14 V, IO1 = -750 mA 1.4 V VIN1 = 7 V, VIN2 = 14 V, IO1 = -1.0 mA 2.0 IQ Quiescent Current VIN1 = 7 V, VIN2 = 14 V, VDIS = 0.8 V, IO1= -10 mA 2.0 mA VIN1 = 7 V, VIN2 = 14 V 1.6 IO1,2 SC Short Circuit Output Current VIN1 = 16 V, VIN2 = 16 V 1.0 A IDIS Disable Bias Current 0 V ≤ VDIS ≤ 7 V, VIN1 = 7 V, VIN2 = 14 V -100 2.0 µA VDISH Disable Voltage High (out 2 active) VIN1 = 7 V, VIN2 = 14 V 2 V VDISL Disable Voltage Low (out 2 disabled) VIN1 = 7 V, VIN2 = 14 V 0.8 V TYPICAL APPLICATION C1 to C4 = 10 µF INPUT 1 (01) OUTPUT 1 (07) OUTPUT 2 (06) NC (05) DISABLE (03) GROUND (04) C4C2 ILA8138A INPUT 2 (02)

Location of marking (mm): left lower corner x=0.100, y=1.854. Chip thickness: 0.35 ± 0.02 mm. PAD LOCATION Location (left lower corner), mm Pad No Symbol X Y Pad size, mm 01 GND 0.105 0.740 0.18 x 0.18 02 - 0.105 0.425 0.18 x 0.18 03 - 0.105 0.110 0.18 x 0.18 04 OUTPUT 2 0.825 0.110 0.18 x 0.18 05 OUTPUT 1 2.110 0.110 0.18 x 0.18 06 INPUT 1 2.110 1.675 0.18 x 0.18 07 INPUT 2 0.795 1.635 0.18 x 0.18 08 - 0.505 1.605 0.18 x 0.18 09 DISABLE 0.110 1.605 0.18 x 0.18 10 - 0.105 1.385 0.10 x 0.10 11 - 0.105 1.205 0.10 x 0.10 12 - 0.105 1.025 0.10 x 0.10 Note: Pad location is given as per passivation layer (0,0) X Y Chip marking 8138 20 03 04 05 060708 2.4 + 0.03 2.0 + 0.03 11