IHCS22R60CE INFINEON | Alldatasheet
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Power Management & Drives Never stop thinking. Control integrated Power System (CIPOS™) IHCS22R60CE Two Phase Switched Reluctance Drives Data sheet, May 2009
CIPOS™ IHCS22R60CE Datasheet 2/16 Rev. 2.3, May 2009 Control integrated Power System (CIPOS™) Revision History: 2009-05 V 2.3 Previous Version: 2.2 Page Subjects (major changes since last revision)
6 Corrected section “Pin assignment”
Author(s): O. Hellmund, W. Scholz, W. Frank, W. Brunnbauer Edition 2006-07 Published by Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 5/5/09. All Rights Reserved. Attention please! The information given in this data sheet shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
CIPOS™ IHCS22R60CE Datasheet 3/16 Rev. 2.3, May 2009 Table of contents:
CIPOS™ IHCS22R60CE Datasheet 4/16 Rev. 2.3, May 2009 Control integrated Power System Two Phase switched Reluctance 600V / 15A @ 80°C
Features
- fully isolated package
- Infineon Trenchstop IGBTs with lowest VCE(sat)
- optimal adapted Emcon diode for low EMI
- SOI gate driver with boot strap diode and capacitor (4.4 µF)
- rugged SOI gate driver technology with stability against transient and negative voltage
- temperature monitor and over temperature shutdown
- undervoltage lockout at all channels
- matched propagation delay for all channels
- shunt for current measurement integrated
- lead-free terminal plating; RoHS compliant
- qualified according to JEDEC 1 (high temperature stress tests for 1000h) for target applications System configuration
- 2 Phases in asymmetric halfbridge topology IGBT + FW-diodes,
- SOI gate driver
- Shunt resistor for current measurement
- Bootstrap diodes for high side supply
- Integrated 4.4 µF bootstrap capacitance
- temp.sensor
- Isolated heatsink
- creepage distances typ. 3.2 mm Typical Application
- Two Phase Switched Reluctance Drives
1 J-STD-020 and JESD-022
Description
CIPOS™ module family offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs. This module is designed to control two phase switched reluctance motors in variable speed drives for applications like vacuum cleaners. The package concept is specially adapted to power applications, which need good thermal conduction and electrical isolation, but also EMI-save control and overload protection. The features of Infineon TrenchStop® IGBTs and diodes are combined with a new optimized Infineon SOI gate driver for excellent electrical performance. Certification UL 1577 (UL file E314539)
CIPOS™ IHCS22R60CE Datasheet 5/16 Rev. 2.3, May 2009 Internal Electrical Schematic RH1 RL1 see section „integrated components“ for further specification TAh DAI DAh TAI Rsh VSS (21) Driver-IC/HIN1 /HIN2 /HIN3 /LIN2 /LIN1 /LIN3 VDD Vb (5) GND_Rsh1 (15) RH2 RL2 TBh DBI DBh TBI LB1 (11) LA2 (9) LA1 (7) LB2 (13) Rbs1 Rbs2 Dbs1 Dbs2 CbsA1 CbsA2 CbsB1 CbsB2 COM-Rsh2 (16) EN (23) /AHIN (18) /BLIN (20) /ALIN (17) /BHIN (19) VDD (22) CVCC RRCin RTS Rt(24) nc. nc. Figure 1: Internal Schematic
CIPOS™ IHCS22R60CE Datasheet 6/16 Rev. 2.3, May 2009 Pin Assignment Pin Name Description 1 n.c. 2 n.c. 3 n.c. 4 n.c.
5 V+ Positive Bus Input Voltage
6 n.c.
7 LA1 Output Terminal 1 Phase A
8 n.c.
9 LA2 Output Terminal 2 Phase A
10 n.c.
11 LB1 Output Terminal 1 Phase B
12 n.c.
13 LB2 Output Terminal 2 Phase B
14 n.c.
15 GND-sh1 Negative Bus Input Voltage / Connection of internal Shunt
16 Rsh2-COM Current measurement Signal, Reference of Low Side Gate Drive
17 /ALIN Control Signal for Low Side Transistor of Phase A 18 /AHIN Control Signal for High Side Transistor of Phase A 19 /BHIN Control Signal for High Side Transistor of Phase B 20 /BLIN Control Signal for Low Side Transistor of Phase B
21 VSS Control Reference Signal
22 VDD Control supply terminal
23 EN Enable Control Terminal
24 Rt Temperature read-out Terminal
/AHIN, /ALIN, /BHIN a nd /BLIN (low side and high side control pins, Pin 17 - 20) These pins are active low and they are responsible for the control of the integrated IGBT. The Schmitt-trigger input threshold of them are such to guarantee LSTTL and CMOS compatibility down to 3.3V controller outputs. Pull-up resistor of about 75 kOhm is internally provided to pre-bias inputs during supply start-up and a zener clamp is provided for pin protection purposes. Input schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses. The noise filter suppresses control pulses which are below the filter time t FILIN. The filter acts according to Figure E for other short signals ranges t FILIN1 and tFILIN2. It is recommended for proper work of CiPoS™ not Figure 2: Input pin structure
CIPOS™ IHCS22R60CE Datasheet 7/16 Rev. 2.3, May 2009 to provide input pulse-width lower than 1us. The integrated gate drive provides shoot through prevention capability which avoids the simultaneous on-state of a pair of gate outputs of the same number (i.e. HO1 and LO1, HO2 and LO2 of driver IC). A minimum deadtime insertion of typ 380ns is also provided in these pairs, in order to reduce cross- conduction of the external power switches. EN (enable, Pin 23) The signal applied to pin EN controls directly the output stages. All outputs are set to LOW, if EN is at LOW logic level. The internal structure of the pin is the same as Figure 2 made exception of the switching levels of the Schmitt-Trigger, which are here V EN,TH+ = 2.1 V and VEN,TH- = 1.3 V. The typical propagation delay time is tEN = 900 ns. VDD, VSS (control side supply and reference, Pin 22, 23) VDD is the low side supply and it provides power both to input logic and to low side output power stage. Input logic is referenced to VSS ground as well as the under-voltage detection circuit. The under-voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of V DDUV+ = 12.1 V is at least present. The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below V DDUV- = 10.4 V according to Figure 3. This prevents the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. VB to VS is the high side supply voltage. The high side circuit can float with respect to VSS following the external high side power device emitter/source voltage. Due to the low power consumption, the floating driver stage is supplied by an integrated bootstrap circuit connected to VDD. This includes integrated bootstrap capacitors of 4.4µF at each floating supply, which are located very close to the gate drive circuit. VS1,2,3 provide a high robustness against negative voltage in respect of VSS of -50 V. This ensures very stable designs even under rough conditions. GND_Rsh1 (low side anode - Shunt reference, Pin 15) and COM_Rsh2 (Shunt signal) The emitters of the low side IGBT are connected to the shunt resistor. They are also connected to pin GND_Rsh2, which is the shunt signal. The low side anodes of the integrated diodes are connected directly to GND_ Rsh1, so that only the transistor current of TAl and TBl contribute to the voltage drop over the shunt. V+ (positive bus input voltage, Pin 10) The high side IGBT are connected to the bus voltage. It is recommended, that the bus voltage does not exceed 500 V. Rt (Temperature sense output) A NTC-resistor is integrated with a resistance of 100kOhm at 25°C and a B-constant of B = 4250 K Figure 3: Operation modes
CIPOS™ IHCS22R60CE Datasheet 8/16 Rev. 2.3, May 2009 Absolute Maximum Ratings (TJ = 25°C, VDD = 15V Unless Otherwise Specified): Module section Description Condition Symbol Value Unit Storage temperature range T stg -40 … 125 Operating temperature Control PCB1 T PCB 125°C Solder temperature wavesoldering, 1.6 mm (0.063 in.) from case for 10s Tsol 260 Insulation test voltage RMS, f = 50Hz, t = 1 min V ISOL 2500 V Mounting torque M3 screw M S 0.6 Nm IGBT and Diode Section Description Condition Symbol Value Unit Max. Blocking Voltage V CES 600 V DC Output current IGBT T c = 25 °C, TvJ<150°C Tc = 80 °C, TvJ<150°C IC 21.6 A DC Output current Diode T c = 25 °C, TvJ<150°C Tc = 80 °C, TvJ<150°C IF 17 A Repetitive IGBT peak collector current T p limited by TvJmax. I CRM 45 A Repetitive Diode peak collector current T p limited by TvJmax. I FRM 30 A Short circuit withstand time VDC = 400V, TvJ =150°C tsc 5 µs Power dissipation per IGBT T c = 25°C P tot 65 W Operating junction temperature range T vjI ,TvjD -40 … 150 °C Single thermal resistance, junction- case IGBT Diode RthJC RthJCD 2.1 3.6 K/W Control section Value Unit Description Condition Symbol Min max Module supply voltage V DD -1 20 V high side floating IC supply offset voltage tp < 500 ns VS1,2,3 VDD-VBS-6 VDD-VBS-50 600 V Input Voltage /ALIN, /AHIN, /BLIN, /BHIN, EN Vin -1 10 V Operating junction temperature2 T J,IC - 125 Max. switching frequency f PWM 10 kHz
1 Monitored by pin 24
2 Monitored by pin 24
CIPOS™ IHCS22R60CE Datasheet 9/16 Rev. 2.3, May 2009 Recommended Operation Conditions All voltages are absolute voltages referenced to VSS -Potential unless otherwise specified. Parameter Symbol min. max. Unit High side floating supply offset voltage V S -3 500 High side floating supply voltage (VB vs. VS) V BS 12.5 17.5 High side output voltage (VHO vs. VS) V HO 0 V BS Low side power supply V DD 12.5 17.5 Logic input voltages LIN,HIN,EN,ITRIP V IN 0 5 V Static Characteristics (Tc = 25°C, VDD = 15V, if not stated otherwise) Description Condition Symbol min Typ max Unit Collector-Emitter breakdown voltage V GE = 0V, IC=0.25mA V (BR)CES 600 - - V Collector-emitter saturation voltage Iout = +/-15A TvJ = 25°C TvJ = 150°C VCE(sat) 1.65 1.9 2.15 V Diode forward voltage VIN = 5V, Iout = +/-10A TvJ = 25°C TvJ = 150°C VF 1.65 1.6 2.05 V Logic "0" input voltage /ALIN, /AHIN, /BLIN, /BHIN VIH 1.7 2.1 2.4 V Logic "1" input voltage /ALIN, /AHIN, /BLIN, /BHIN VIL 0.7 0.9 1.1 V EN positive going threshold V EN,TH+ 1.9 2.1 2.3 V EN negative going threshold V EN,TH- 1.1 1.3 1.5 V VDD and VBS supply undervoltage positive going threshold VDDUV+ VBSUV+ 11.0 12.1 12.8 V VDD and VBS supply undervoltage negative going threshold VDDUV- VBSUV- 9.5 10.4 11.0 V VCC and VBS supply undervoltage lockout hysteresis VDDUVH VBSUVH 1.2 1.7 - V Input clamp voltage IIN = 4mA; /ALIN, /AHIN, /BLIN, /BHIN, EN VINCLAMP 9.0 10.1 13 V Input bias current VIN = 5V I LIN+ IHIN+ - 55 100 µA Input bias current VIN = 0V I LIN- IHIN- - 110 200 µA EN Input bias current V EN = 5V I EN+ - 62 120 µA
CIPOS™ IHCS22R60CE Datasheet 10/16 Rev. 2.3, May 2009 Dynamic Characteristics (Tc = 25°C, VDD = 15V, if not stated otherwise) Description Condition Symbol min typ max Uni t Turn-on propagation delay High side or low side VLIN,HIN = 0V; Iout = 15A, VDC = 300V td(on) - 656 - ns Turn-on rise time High side or low side Iout = 15A, VDC = 300V VLIN,HIN = 5V tr - 40 - ns Turn-off propagation delay High side or low side VLIN,HIN = 5V; Iout = 15A, VDC = 300V td(off) - 1051 - ns Turn-off fall time High side or low side Iout = 15A, VDC = 300V VLIN,HIN = 0V tf - 32.4 - ns Shutdown propagation delay ENABLE VEN = 0V t EN - 900 - ns Input filter time at LIN for turn on and off and input filter time at HIN for turn on only V LIN,HIN= 0 V & 5V t FILIN 120 270 - ns Input filter time 1 at /AHIN, /BHIN for turn off VHIN = 5V t FILIN1 - 220 - ns Input filter time 2 at /AHIN, /BHIN for turn off VHIN = 5 V t FILIN2 - 400 - ns Input filter time EN t FILEN 300 430 - ns IGBT Turn-on Energy I out = 15A, VDC=300V Tvj = 25°C Tvj = 150°C Eon 0.70 0.85 mJ IGBT Turn-off Energy I out = 15A, VDC=300V Tvj = 25°C Tvj = 150°C Eoff 0.36 0.43 mJ Diode recovery Energy I out = 10A, VDC=300V Tvj = 25°C Tvj = 150°C Erec 0.05 0.12 mJ
CIPOS™ IHCS22R60CE Datasheet 11/16 Rev. 2.3, May 2009 Integrated Components Description Condition Symbol min typ max Unit Integrated Resistor Rbs1, Rbs2 - 10 - Ω Shunt Resistor Rsh - 5 mΩ Integrated Capacitor CVCC - 0.1 - Integrated Bootstrap Capacitor CbsA1, CbsA2, CbsB1, CbsB2 - 2.2 - µF Resistance of NTC TNTC = 25°C RTS - 100 - kΩ B-constant of NTC B - 4250 - K Forward Voltage of Bootstrap Diode Tj = 25°C, IF = 1 A VFbs - 1.3 - V Reverse Recovery of Bootsstrap Diode Tj = 25°C, IF = 1 A trrbs 50 ns
CIPOS™ IHCS22R60CE Datasheet 14/16 Rev. 2.3, May 2009 Test Circuits Figure A: Dynamic test circuit Leakage inductance Lσ =180nH Stray capacitance Cσ =39pF ∫ ⋅= Erect FD dtivErec Figure B: Definition of diodes switching characteristics Figure C: Definition of Enable propagation delay ∫ ⋅= Eofft CxCEx dtivEoff 0 ∫ ⋅= Eont CxCEx dtivEon Figure D: Switching times definition and switching energy definition
CIPOS™ IHCS22R60CE Datasheet 15/16 Rev. 2.3, May 2009 Figure E: Short Pulse suppression LIN HIN LIN HO LO high low on tFILIN tFILIN off on off LO
CIPOS™ IHCS22R60CE Datasheet 16/16 Rev. 2.3, May 2009 Package Outline: Package data Description Condition Symbol min typ max Unit Mounting Torque M3 screw MS 0.5 0.6 Nm Mounting pressure on surface Package flat on mounting surface NMC 150 N/mm²