IFRI820G IRF | Alldatasheet

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HEXFET® Power MOSFET © Isolated Package © High Voltage Isolation= 2.5KVRMS © D Vee = 500V © Sink to Lead Creepage Dist.= 4.8mm. Dss = © Dynamic dv/dt Rating © Low Thermal Resistance 6 Rps(on) = 302 s Ip =2.1A

Description

Third Generation HEXFETs trom International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220 Fullpak eliminates the need for additional insulating hardware in EE ‘commercial-industrial applications. The moulding compound used provides a &3 high isolation capability and a low thermal resistance between the tab and Wa external heatsink. This isolation is equivalent to using a 100 micron mica QQ. barrier with standard TO-220 product. The Fullpak is mounted to a heatsink NS using a single clip or by a single screw fixing. 70.220 FULLPAK Absolute Maximum Ratings Parameter [Max Units lp@Tc=25°C |Continuous Drain Current, Vos@10V | |} lo @ To= 100°C _| Continuous Drain Current, Vos @10V__ 13. O«dCA tow {Pulsed Drain Current © | 84 i I Pp @ Tc = 25°C _| Power Dissipation 30 Ww Linear Derating Factor 0.24 wre Ves | Gate-to-Source Voltage +20 v (Eas ____|Single Pulse Avalanche Energy @ | 10 m™_| (aa Avalanche Current © ___ if 2A ta Ean ‘Repetitive Avalanche Energy © 3.0 md dvidt Peak Diode Recovery dvidt © ee ee 7 Ts | Operating Junction and “55 to +150 sre _____|Storage TemperatureRango | °c [ ________ Soldering Temperature, for 10 seconds 300 (1.6mm from case) _ i “| Mounting Torque, 6-32 or M3 screw 10 Tein (1.1 Nem) Thermal Resistance. Parameter Min. | Typ. | Mex. | Units Rac | dunetion-to-Case | = 41 | cow | Raa Junetion-to-Ambient = = 65 J 647

Electrical Characteristics @ Ty = 25°C (unless otherwise specified) [Parameter | Min. [ Typ. [ Max. [Units [Test Conditions | [Mienoss | Drain-to-Source Breakdown Voltage [600 [ — | — | V_|Vas=0V,lo=250vA | AViemoss/ATs| Breakdown Voltage Temp. Coetficient_ | — | 0.59 | — | VPC | Reference to 25°C, lo= 1mA_/ |Rosiy | Static Drain-to-Source OnResistance [ — [ — [30 | Q [Vas=10V,to=1.9A @ [Wes | Gate Threshold Voltage | 2.0 | — | 40 TV |Vos=Ves, n= 250A igs | Forward Transconductance [1.5 [| — | — |S [Vos=50V, io=1.3A @ i _— a fe ___[Painissmcetatar core [=] Taso] [ie Ve Ea jews __(SeseSau eee =| Ty eee [ Gate-to-Souree Reverse Leakage | — | — | “100 [Qo | TotalGate Charge | | Tt lo=2.1A eh ee [Gy: | Gate-o-Drain (Miler) Gharge | —[ = |_19 Veer 10V 00 Fig. 6 and 19 [taxon _[Tum-OnDolayTime [= | 8.0 | Voo=250V fu [RiseTime 8 lo=2.1A [tom | Tum-Off Delay Time | = | 88 Rg=180 [vy fFatime Tt | Rip=1200_See Figure 10 ® ee | from ska a 4 ee er [Ces input Capacitance | — | 960 | — Ves=0V ——a ed [Cus (| Reverse Transfer Capacitance | — | 37_ | — f=1.0MHz See Figure 5 [c______|Drainto Sink Capacitance | — [12 | =F pF [fetoMHz Source-Drain Ratings and Characteristics [Parameter TT min. [ Typ. [ Max. [Units [Test Conditions) : ere a a (Body Diode) Tq. | showing the - See eee, Ge (Body Diode) © p-n junction diode. ‘s [Veo [Diode Forward Voltage | — | — [1.6 [V1 T525°C, igx2.1A, Vas-0V [tu | Reverse RecoveryTime | — [260 | 620 [ns |T1R25°C, in=2.t [Q, | Reverse Recovery Charge | — [070] 1.4 | uc |difdtet00Aus © Trina tron tne is naglogible (turn is dominated by Leva) Notes: ® Repetitive rating; pulse width limited by @ Isp<2.1A, di/dts50A/us, VoosVieA)oss, © t=60s, f=60Hz max. junction temperature (See Figure 11) Tys150°C ® Vpp=50V, starting Ty=25°C, L=44mH_ @ Pulse width < 300 1s; duty cycle <2%. Re=250, las=2.1A (See Figure 12) 648

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rs ee 2 | -— a o 4 —a ry 108 308 ro Sh Vos, Drain-to-Source Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Fig 2. Typical Output Characteristics, To=25°C. Tc=150°C FS-SSzEeEee] 8 Poa eee ge at PP Blo ¢ EEEEPooeA € LLY & oe z —=====——— ee

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~ NX 4 Fe SS ne 2 i of Nite 8 BRREREDY E05 @ ALN M4 os HA LY § > Nowy os HEE rose? Ae Fa ra = ——— Vps, Drain-to-Source Voltage (volts) Qa, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage es eal el | 10) a SS ere Sas err Ao 7 et i [/IZ | | < sit er ett enema 3 / g 2| i LS INH Po a Sc ee il g Ad cee PA TP ft foo of ea i ee oe 06 1 oa? Ste S40 8 yee 8 go 5 104 Vsp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage

Ves DUT. 2s a Coo D wee Brew PSC ane =f TT ASAE TC § TTTTTENI TT] Fig 10a. Switching Time Test Circuit

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8, mm | Hep EAE \\ - To, Case Temperature (°C) gon ten Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature id SBE easel ees meee See Sees Pe YT | | 3 aii axa = AAT

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required las Dut. 260 acc CoE] @ as & LAL ETT TT Fig 12a. Unclamped Inductive Test Circuit 3 LN RT| | | wo | A Veanoss 8 EN PAL / Yoo 2 SNS es val eat DPSS yf \\\\ Pe 7 \\ Starting Ty, Junction Temperature(°C) hs ——— a: Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current = unt Regulator fr Same Type as DUT i wovfo a 8s b-Eebateteeeest Mog put 7. | Qgs -4-— Aad (<3) Ves ie crane > conan Saopng Rasa Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing - See page 1510 Appendix C: Part Marking information — See page 1517 International Rectifier 652