IDT101494S8C

IDT101494 IDT | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 9

Technical content

Spry ® . 1DT10494 a HIGH-SPEED BiCMOS 1DT100494 Ra ECL STATIC RAM 1DT101494 “ 64K (16K x 4-BIT) SRAM Integrated Device Technology, Inc. FEATURES: DESCRIPTION: * 16,384-words x 4-bil organization The 1DT10494, 1DT100494 and 101494 are 65,536-bit * Address access time: 7/8/10/15 high-speed BICEMOS™ ECL static random access memo- + Low power dissipation: 700mW (typ.) ries organized as 16K x 4, with separate data inputs and + Guaranteed Output Hold time outputs. All /Os are fully compatible with ECL levels. + Fully compatible with ECL logic levels These devices are part of a family of asynchronous four- + Separate data input and output bit-wide ECL SRAMs. The devices have been configured to + JEDEC standard through-hole and surface mount follow the standard ECL SRAM JEDEC pinout. Because they packages are manufactured in BICEMOS™ technology, however, power dissipation is greatly reduced over equivalent bipolar devices. The asynchronous SRAMs are the most straightforward to use because no additional clocks or controls are required: Dataout is available an access time after the last change of address. To write data into the device requires the creation of a Write Pulse, and the write cycle disables the output pins in conventional fashion. The fast access time and guaranteed Output Hold time allow greater margin for systemtiming variation. Datain setup time specified with respect to the trailing edge of Write Pulse eases write timing allowing balanced Read and Write cycle times. FUNCTIONAL BLOCK DIAGRAM AO . DECODER 65,596-BIT ~— vec : MEMORY ARRAY << Vcc A13 [oe eo el = R PR D1 ae SENSE AMPS. = ai m FR] mionesoware [so Se es =, 03 1? t|> as 2764 dew OF BICEMOS fs a radorark of Integrated Device Technology, In. COMMERCIAL TEMPERATURE RANGE AUGUST 1990 ; ‘© 1900, integrated Device Technology, Inc. 54-1 Dsc-sona

IDT10494, IDT100494, 1DT101494 HIGH SPEED BICMOS ECL STATIC RAM 64K (16K x 4-BIT) COMMERCIAL TEMPERATURE RANGE FST Oe Oe eC ie ei ee ee PIN CONFIGURATION Do qi 2 O1 Ge 27 WE y D2 qs 26) NG LO» Al Ds Lo >A ods d= CDW > Qos 24 Ar2 SN Ah > Qi Ge 26 An Ail LA & Vec 7 21 Ato Lo 4 eg Voc Ge 216 Vee INS LAN KC Q2 Ce 20 As Nt Sa Q3 C10 19 As 2764 dw 09 2764 dew 04 Ao Qu 181) Az Ar O12 1710 As A2 C19 16D As 400-Mil-Wide 300-Mil-Wide Asu 15P As CERAMIC PACKAGE PLASTIC SOJ PACKAGE 2764 cow c28 Y28 DIP/SOJ TOP VIEW . PIN DESCRIPTIONS LOGIC SYMBOL Ao through A13 Address Inputs DotioughDs [stamps Door bes Co through Go ta [We | WiteEnabie opt a [CS______| Chip Select Input (Internal pull down) as 5 More Negative Supply Voltage AS Qo Less Negative Supply Voltage As Qi BeeBo1 Ar Qe As Qs As Axo 4 AN AC OPERATING RANGES") Ar Ais [voT vee [Temperature | 1K] -S.2vs5% | 0 TO 75°C, air flow exceeding 2 m/sec WE CS [ 100K] 4.5V25% [0 TO 85°C, air flow exceeding 2 m/sec rv 2764 dow 05

0 TO 75°C, air flow exceeding 2 m/sec 16K x4

NOTE: area bee SRAM 1. Referenced to Voc CAPACITANCE (Ta-+25°C, f=1.0MH2) TRUTH TABLE") ow | pat | (| a | Ramoata [Read | Capacitance 3 + A ee =e jor | Capacitance 1. H=High, L=Low, X=Don't Care (2764 103 ee EEEEED 54-2 2

IDT10494, IDT100494, 1DT101494 HIGH SPEED BICMOS ECL STATIC RAM 64K (16K x 4-BIT) COMMERCIAL TEMPERATURE RANGE =C_haG{jpepeeEEEe™NjN]{_T ECE ECL-10K ABSOLUTE MAXIMUM RATINGS”) [Symbol [Rating | Vatue [Unit | VrermM | Terminal Voltage +0.5 to -7.0 Vv With Respect to GND Operating Temperature Tste —_| Storage Ceramic -65t0 +150 | °C Temperature | Plastic. -55 to +125 Power Dissipation [sf w | DC Output Currant (Output High) NOTE: 2764 B08 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ECL-10K DC ELECTRICAL CHARACTERISTICS (VEE = -5.2V, RL=50Q to -2.0V, TA = 0 to +75°C, air flow exceeding 2 m/sec) symbol Test Condiions | Win (B) | Typ [Max (@)| Unk [Te] VOH Output HIGH Voltage VIN= ViHAor ViLB -1000 +840 mv orc -960 -885 -810 25°C -900 -720 75°C Vot Output LOW Voltage Vin= ViIKAor ViLB -1870 -1665 | mV | oc -1850 -1650 25°C 71830 “1625 75°C VoHc Output Threshold HIGH Voltage VIN = VIHB or VILA 1020 mV orc -980 25°C -920 75°C Vote Output Threshold LOW Voltage Vin= Vip or VILA 1645 | mV | oc -1630 25°C 71605 75°C Vin Input HIGH Voitage Guaranteed Input Voltage 1145 -840 mv orc High for All Inputs “1105, -810 25°C 1045 -720 75°C Vi Input LOW Voltage Guaranteed Input Voltage -1870 -1490 | mv | 0°C Low for All Inputs 1850 1475 25°C “1830 -1450 75°C a [omer | sof - | so | a | lee ‘Supply Current All Inputs and Outputs mA Open NOTE: 2764 108 1. Typical parameters are specified at Vee = -5.2V, Ta = +25°C and maximum loading i EEE . 54-3 3

1DT10494, IDT100494, IDT101494 HIGH SPEED BICMOS ECL STATIC RAM 64K (16K x 4-BiT) COMMERCIAL TEMPERATURE RANGE ECL-100K ABSOLUTE MAXIMUM RATINGS”) VTERM Terminal Voltage +0.5 to -7.0 Vv With Respect to GND Operating Temperature Oto +85 Temperature Under Bias “5510 +125 Tsta ‘Storage Ceramic -6510+150 | °C Temperature _| Plastic -55 to 4125 [Pr [Power Dissipation | 15 | w| DC Out mput Current (Output mA High) NOTE: 2762 107 1, Stresses greater than those listod under ABSOLUTE MAX! IMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these oF any other conditions ‘above those indicated in the operational sections of this specifications not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ECL-100K DC ELECTRICAL CHARACTERISTICS (VEE = -4.5V, RL =502 to -2.0V, TA =0 to +85°C, air flow exceeding 2 m/sec) [Symbol [| __Paramotor [| Test Condxions [| _win-(@) [ Tp | Wax.(a) | Unt | Sapa Wal Votage [WnnVeworves {toa | oss 000 | nv | Output LOW Volage [v= Vewor vas | ta10_| aris 1620 [nv | OuipurTiveshoid LOW Votage | Viv=Vinwor Vea | _- | - | 1610 | _mv_| Ii Vi Input HIGH Voltage Guaranteed Input Voltage “880 mV High for All Inputs Vie Input LOW Voltage Guaranteed Input Voltage “1475 mV Low for All Inputs a [ones [sof To Supply Current All Inputs and Outputs 170 “110 mA Open NOTE: 2762 0108 1. Typical parameters are specified at VEE = -4.5V, Ta = 425°C and maximum loading. a 54-4 4

1DT10494, 1IDT100494, IDT101494 HIGH SPEED BICMOS ECL STATIC RAM 64K (16K x 4-BIT) COMMERCIAL TEMPERATURE RANGE HIGH SPEED BICMOS ECL STATIC RAM OAK (EKx 48) Eller ll lel ee ECL-101K ABSOLUTE MAXIMUM RATINGS") VTeRM =] Terminal Voltage +0.5 to -7.0 v With Respect to GND Operating Temperature Temperature Under Bias TsTG Storage Ceramic 65to +150 | °C Temperature _| Plastic -55 to #125 [Pr [Power Dissipation [ts | Ww | DC Out mput Current (Output High) NOTE: 2769 B1 09 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage 19 the device. This is a stress rating ‘only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating Conditions for extonded, periods may affect reliability ECL-101K DC ELECTRICAL CHARACTERISTICS (VEE = -5.2V, RL=502 to -2.0V, TA = 0 to +75°C, air flow exceeding 2 m/sec) Output HIGH Voltage [Viv=VeworVes | -to2s | -955_ | geo | mv | Ouiput LOW Vatage =reo_| -17is_| 1620 | nw | Output Threshold HIGH Voltage [VN=VeBorvua | 1095 [Tv | Output Threshold LOWVokage |Vw=VeworVua | | | te10 mv | Vie Input HIGH Voltage Guaranteed Input Voltage “1165 ~880 mV High for All inputs Vit Input LOW Voltage Guaranteed Input Vohage “1475 mV Low for All Inputs . [oes | = TO Ttt0 [others [so [| - [90 | ‘Supply Current All Inputs and Outputs Open NOE Tea 1. Typical parameters are specified at Vee = -5.2V, Ta = +25°C and maximum loading. ee . 54-5 5

1DT10494, IDT100494, 1DT101494 HIGH SPEED BICMOS ECL STATIC RAM 64K (16K x 4-BIT) COMMERCIAL TEMPERATURE RANGE AC TEST LOAD CONDITION AC TEST INPUT PULSE Vee (GND) pat OV -mnnnmmnnmmn 80% AV 20% 500 30pF* tr tf L 1 = tF = 2.0ns typ. = Note: All timing measurements are 0.01nF r Vee -2.0V referenced to 50% input levels. as “Includes probe and = jig capacitance 2704 dow 08 204 dew 07 RISE/FALL TIME [symbol | Parameter__[ TeatGondtion [win [Typ [Max Unit ] [tm __[OupaRisetime | - ~ it - it 2 it - | | ['= [output Fall Tine ee Teen FUNCTIONAL DESCRIPTION The IDT10494, IDT100494 and IDT101494 BICMOS ECL WRITE TIMING static RAMs (SRAM) provide high speed with low power To write data to the device, a Write Pulse need be formed 5 dissipation typical of BICMOS ECL. These devices followthe on the Write Enable input (WE) to control the write to the conventional pinout and functionality for 16Kx4ECLSRAMs. SRAM array. While CS and ADDR must be set-up when WE The ECL-101K meets electrical specifications that combine goes low, Datain cansettle afterthe talling edge of WE, giving the ECL-100K temperature and voltage compensated output the datapath extra margin. Data is written to the memory cell levels with the high-speed of ECL-10K VEE compatibility at the end of the Write Pulse, and addresses and Chip Select (-5.2V). must be held after the rising edge of the Write Pulse to ensure Satisfactory completion of the cycle. _ READ TIMING DataouTis disabled (held low) during the Write Cycle. #CS The read timingon these asynchronous devicesis straight- is held low (active) and addresses remain unchanged, the forward. Dataour is held low until the device is selected by DataOUT pins will output the written data after “Write Chip Select (CS). Then Address (ADDR) settles and data Recovery Time” (twa). appears on the output aftertime taa. Note that Dataouris held Because of the very short Write Pulse requirement, these fora shorttime (tox) afterthe address beginstochangeforthe devices can be cycled as quickly for Writes as for Reads. next access, then ambiguous data is on the bus untila new Balanced cycles mean simpler timing in cache applications. time tAA. UTE EEE EEE EES SEE EEE | 54-6 6

1DT10494, 1DT100494, 1DT101494 HIGH SPEED BICMOS ECL STATIC RAM 64K (16K x 4-BIT) COMMERCIAL TEMPERATURE RANGE AC ELECTRICAL CHARACTERISTICS (Over the AC Operating Range) 40049487 | 10049488 | 100494810 | 100494815 Test 101494S7 10149488 101494510 101494515 ae | meen | at, [eee | BE |B | fet amen [ines [Grip SooaReoove Time | - | -fe[-}s{-]s|-|=s] | [wa [AddvessAccassTime [| — | 7 | - | e | - | wo | - [is [ons | fm [espero ee et ee Change NOTE: Rae 1. Input and Output reference level is 50% point of waveform: READ CYCLE GATED BY CHIP SELECT cts tacs tRcs OATAuT 2704 dew 08 READ CYCLE GATED BY ADDRESS ADDR tA tOH VWVVVVVVVVVVVVVY DATAout KAA AAA AY) 2764 orw 09 SAL? 7

1DT10494, 1DT100494, IDT101494 HIGH SPEED BICMOS ECL STATIC RAM 64K (16K x 4-BIT) COMMERCIAL TEMPERATURE RANGE AC ELECTRICAL CHARACTERISTICS (Over the AC Operating Range) tooasas7 | 10040488 | 100404510 | 100404815 Test 10149487 | 10149488 | 101494510 | 101494515 [tw [Write Pulse width twsa= minimus [ - [ ¢ [ - |e [ - [10 [ - [ons | [two [DataserupTime | | oT - To [ - To TT - [2 fT - Tie | [ven [oat Setup Tew WEVign] = Js [-[s]-[s]-[s]-|~ | |twsa [Address Setup Time [twsa= minimum o [| - [ o | - | o [| - [2 | - [ns | |twscs | ChipSelect SetupTime [| - | o | - | o | - [oo | - [2 | - [ins | [twin [OataHoldTime Tt PK ce - P e - T = [s | [twin [AddressHod Time Tt PT - Poe eT a PR Tis | |twics [ChipSolectHod Timo [= Ts fT - [2 [ - [2 [ - [os [ - [ons | [ts [Write DisableTime | - | - | 5 | - [os [| - fs | - [os [ins | [twa [Write Recoveytime T= dT - Fs TP - Ps PT - fs | - Ts [ns | : aT i irotand Output reference level is 50% point of waveform. 2. twso is specified with respect to the falling edge of WE for compatibility with bipolar part specifications, but this device actually only requires twsoe with respect to rising edge of 3. twa is defined as the time to reflect the newly written data on the Data Outputs (Qo to Qa) when no new Address Transition occurs. WRITE CYCLE TIMING DIAGRAM VWVVVWVVVVV 5 oS XXXXXXXXXXXXXXXXXXX) KXCXXXXXAKAXAAXA 5 | ee a VWWYVVYVVVVVVVVVYVV TVVVVVVVVVVVVVY oor AXA AANA) (a AAA AAA AAA i es WWWWWWWVVYVVVVVVVVY" TWVVVVVVVVVVVVY DATAN KAA XXX tt t wSD i twsoe i'WHD We tw. ‘tws” ‘twR" UT AVATANATAYAVANAYATAVATAYATAVATAYATAVAYAVATAVATAVAVATAYAVAYAYAV VVVVVVV aTacur _AAXXAAXA AAA AAA AY) AXA e410 —_— . 5A ¥ 8

1DT10404, 1DT 100494, IDT101494 HIGH SPEED BICMOS ECL STATIC RAM 64K (16K x 4-BiT) COMMERCIAL TEMPERATURE RANGE

ORDERING INFORMATION

Device Type Architecture Speed Package —_Process/ Temp. Range _—__ Blank Commercial Cc Sidebraze DIP Y Plastic SOJ § ‘Speed in Nanoseconds s Standard Architecture 64K (16K x 4-bits) BICMOS ECL-10K

10494 Static RAM

64K (16K x 4-bits) BICMOS ECL-100K

100494 Static RAM

64K (16K x 4-bits) BICMOS ECL-101K

101494 Static RAM

54-4 9 :