HVLED815PFTR STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 36
Technical content
Datasheet sections
- 1 Principle application circuit and block diagram
- 1.1 Principle application circuit
- 1.2 Block diagram
- 2 Pin description and connection diagrams
- 2.1 Pin description
- 2.2 Thermal data
- 3 Electrical specifications
- 3.1 Absolute maximum ratings
- 3.2 Electrical characteristics
- 4 Device description
- 4.1 Application information
- 4.2 Power section and gate driver
- 4.3 High voltage startup generator
- 4.4 Secondary side demagnetization detection and triggering block
- 4.5 Constant current operation
- 4.6 Constant voltage operation
- 4.7 Voltage feed-forward block
- 4.8 Burst-mode operation at no load or very light load
- 4.9 Soft-start and starter block
- 4.10 Hiccup mode OCP
- 4.11 High Power Factor implementation
- 4.12 Layout recommendations
- 5 Package information
- 6 Revision history
Features
■ High power factor capability (> 0.9) ■ 800 V, avalanche rugged internal 6 Ω Power MOSFET ■ Internal high-voltage startup ■ Primary sensing regulation (PSR) ■ +/- 5% accuracy on constant LED output current ■ Quasi-resonant (QR) operation ■ Optocoupler not needed ■ Open or short LED string management ■ Automatic self supply
Applications
■ AC-DC LED driver bulb replacement lamps up to 15 W, with high power factor ■ AC-DC LED drivers up to 15 W
Description
The HVLED815PF is a high-voltage primary switcher intended for operating directly from the rectified mains with minimum external parts and enabling high power factor (> 0.90) to provide an efficient, compact and cost effective solution for LED driving. It combines a high-performance low- voltage PWM controller chip and an 800 V, avalanche-rugged Power MOSFET, in the same package. There is no need for the optocoupler thanks to the patented primary sensing regulation (PSR) technique. The device assures protection against LED string fault (open or short). Table 1. Device summary
1 Principle application circuit and block diagram
1.1 Principle application circuit
Figure 1. Application circuit for high powe r factor LED driver - single range input
Figure 2. Application circuit for standard LED driver
1.2 Block diagram
Figure 3. Block diagram
2 Pin description and connection diagrams
Figure 4. Pin connection (top view)
2.1 Pin description
Table 2. Pin description 1 SOURCE Source connection of the internal power section. current flowing in the MOSFET through an RSENSE resistor connected to GND. factor. See dedicated section for more details.
2.2 Thermal data
Supply voltage of the device. for the signal part of the IC. pin and kept separate from any pulsed current return. Constant current (CC) regulation loop reference voltage. adjusted to keep the average output current constant. operation (zero voltage switching). must not exceed ± 2 mA (AMR) in all the Vin range conditions. No capacitor is allowed between the pin and the auxiliary transformer. dynamic performance of the voltage control loop. 8 N.a. Not available. These pins must be connected to GND. 9-11 N.a. Not available. These pins must be left not connected.
16 DRAIN
Drain connection of the internal power section. The internal high-voltage startup generator sinks current from this pin as well. Pins connected to the internal metal frame to facilitate heat dissipation. Table 2. Pin description (continued) Table 3. Thermal data
Table 3. Thermal data (continued)
3 Electrical specifications
3.1 Absolute maximum ratings
3.2 Electrical characteristics
Table 4. Absolute maximum ratings
- Limited by maximum temperature allowed.
Table 5. Electrical characteristics (1) (2)
Table 5. Electrical characteristics (1) (2) (continued)
Figure 5. OFF-state drain and source current test circuit effective MOSFET’s OFF-state drain current.
- V CC=14 V (unless otherwise specified).
- Limits are production tested at Tj=Ta=25 °C, and are guaranteed by statistical characterization in the range
- Not production tested, guaranteed st atistical characterization only.
- Parameters tracking each other (in the same section).
Figure 6. COSS output capacitance variation Figure 7. Startup current test circuit Figure 8. Quiescent current test circuit
11.8 VAIccstart-up
HVLED815PF Device description Doc ID 023409 Rev 4 15/36
4 Device description
The HVLED815PF is a high-voltage primary switcher intended for operating directly from the rectified mains with minimum external parts to provide high power factor (> 0.90) and an efficient, compact and cost effective solution for LED driving. It combines a high- performance low-voltage PWM controller chip and an 800 V, avalanche-rugged Power MOSFET, in the same package. The PWM is a current-mode controller IC specifically designed for ZVS (Zero Voltage Switching) flyback LED drivers, with constant output current (CC) regulation using primary sensing feedback (PSR). This eliminates the need for the optocoupler, the secondary voltage reference, as well as the current sense on the secondary side, while still maintaining a good LED current accuracy. Moreover, it guarantees a safe operation when short-circuit of one or more LEDs occurs. The device can also provide a constant output voltage regulation (CV): it allows the application to be able to work safely when the LED string opens due to a failure. In addition, the device offers the shorted secondary rectifier (i.e. LED string shorted due to a failure) or transformer saturation detection. Quasi-resonant operation is achieved by means of a transformer demagnetization sensing input that triggers MOSFET turn-on. This input serves also as both output voltage monitor, to perform CV regulation, and input voltage monitor, to achieve mains-independent CC regulation (line voltage feedforward). The maximum switching frequency is top-limited below 166 kHz, so that at medium-light load a special function automatically lowers the operating frequency while still maintaining the operation as close to ZVS as possible. At very light load, the device enters a controlled burst-mode operation that, along with the built-in high-voltage startup circuit and the low operating current of the device, helps minimize the residual input consumption. Although an auxiliary winding is required in the transformer to correctly perform CV/CC regulation, the chip is able to power itself directly from the rectified mains. This is useful especially during CC regulation, where the flyback voltage generated by the winding drops.
4.1 Application information
The device is an off-line led driver with all-primary sensing, based on quasi-resonant flyback topology, with high power factor capability. In particular, using different application schematic the device is able to provide a compact, efficient and cost-effective led driver solution with high power factor (PF>0.9 - see application schematic on Figure 1) or with standard power factor (PF>0.5/0.6 - see application schematic on Figure 2), based on the specific application requirements. Referring to the application schematic on Figure 1, the IC modulates the input current in according to the input voltage providing the high power factor capability (PF>0.9) keeping a good line regulation. This application schematic is intended for a single range input voltage. For wide range application a different reference schematic can be used; refer to the dedicated application note for further details. Moreover, the device is able to work in different modes depending on the LED's driver load condition (see Figure 11):
- QR mode at heavy load. Quasi-resonant operation lies in synchronizing MOSFET's
main benefits of this kind of operation.
- Valley-skipping mode at medium/ light load. Depending on voltage on COMP pin, the
- Burst-mode with no or very light load. When the load is extremely light or disconnected,
the converter enters a controlled on/off operation with constant peak current. very low, no issue of audible noise arises. Figure 11. Multi-mode operation of HVLE D815PF (constant voltage operation)
4.2 Power section and gate driver
power MOSFET cannot be turned on accidentally.
4.3 High voltage startup generator
compensated current generator connected to its source. Figure 12. High-voltage start-up generator: internal schematic IC is powered by the energy stored in the VCC capacitor.
Figure 13. Timing diagram: normal power-up and power-down sequences
4.4 Secondary side demagnetization detection and triggering
triggering block must be previously armed by a positive-going edge exceeding 100 mV. Figure 14. DMG block, triggering block
frequency tends to increase excessively at light load and high input voltage. kHz if this voltage exceed this value. high enough to allow the DMG triggering. be prevented from exceeding 1/TBLANK. Figure 15. Drain ringing cycle skipping as the load is progressively reduced the converter or on its output voltage.
4.5 Constant current operation
The flip-flop's output is high as long as the transformer delivers current on secondary side. Figure 16. Current control principle Figure 17. Constant current operation: switching cycle waveforms
HVLED815PF Device description Doc ID 023409 Rev 4 21/36 The capacitor CLED has to be chosen so that its voltage VILED can be considered as a constant. Since it is charged and discharged by currents in the range of some ten µA (IREF=20 µA typ.) at the switching frequency rate, a capacitance value in the range 4.7-10 nF is suited for switching frequencies in the ten kHz. When high power factor schematic is implemented, a higher capacitor value should be used (i.e. 1 µF-10 µF). The average output current I OUT can be expressed as: Equation 1 Where ISEC is the secondary peak current, TONSEC is the conduction time of the secondary side and T is the switching period. Taking into account the transformer ratio N between primary and secondary side, ISEC can also be expressed as a function of the primary peak current IPRIM: Equation 2 As in steady state the average current ICLED: Equation 3 Which can be solved for VILED: Equation 4 where VCLED=R* IREF and it is internally defined (0.2 V typical - see Table 5: Electrical characteristics). The VILED pin voltage is internally compared with the CS pin voltage (constant current comparator): Equation 5 Combining (1), (2) (4) and (5) the average output current results:
Device description HVLED815PF 22/36 Doc ID 023409 Rev 4 Equation 6 This formula shows that the average output current IOUT does not depend anymore on the input voltage VIN or the output voltage VOUT, neither on transformer inductance values. The external parameters defining the output current are the transformer ratio n and the sense resistor R SENSE. The previous formula (Equation 6) is valid for both standard and high power factor implementation.
4.6 Constant voltage operation
The IC is specifically designed to work in primary regulation and the output voltage is sensed through a voltage partition of the auxiliary winding, just before the auxiliary rectifier diode. Figure 18 shows the internal schematic of the constant voltage mode and the external connections. Due to the parasitic wires resistance, the auxiliary voltage is representative of the output just when the secondary current becomes zero. For this purpose, the signal on DMG pin is sampled-and-held at the end of transformer's demagnetization to get an accurate image of the output voltage and it is compared with the error amplifier internal reference voltage V REF (2.51 V typ - see Table 5: Electrical characteristics). During the MOSFET's OFF-time the leakage inductance resonates with the drain capacitance and a damped oscillation is superimposed on the reflected voltage. The S/H logic is able to discriminate such oscillations from the real transformer's demagnetization. When the DMG logic detects the transformer's demagnetization, the sampling process stops, the information is frozen and compared with the error amplifier internal reference. The internal error amplifier is a transconductance type and delivers an output current proportional to the voltage unbalance of the two outputs: the output generates the control voltage that is compared with the voltage across the sense resistor, thus modulating the cycle-by-cycle peak drain current. The COMP pin is used for the frequency compensation: usually, an RC network, which stabilizes the overall voltage control loop, is connected between this pin and ground. As a result, the output voltage V OUT at zero-load (i.e. no led on the led driver output) can be selected trough the RFB resistor in according to the following formula: Equation 7 Where NAUX and NSEC are the auxiliary and secondary turn's number respectively. The RDMG resistor value can be defined depending on the application parameters (see "Section 4.7: Voltage feed-forward block).
Figure 18. Voltage control principle: internal schematic
4.7 Voltage feed-forward block
point, depending on the input voltage. the cycle-by-cycle current limitation.
Figure 19. Feed-forward compensation: internal schematic forward Logic" block in order to provide a feed-forward current, IFF. Where m is the primary-to-auxiliary turns ratio.
HVLED815PF Device description Doc ID 023409 Rev 4 25/36 Equation 13 Finally, the Rdmg resistor can be calculated as follows: Equation 14 In this case the peak drain current does not depend on input voltage anymore, and as a consequence the average output current IOUT do not depend from the VIN input voltage. When high power factor is implemented (see Section 4.11), the feed-forward current has to be minimized because the line regulation is assured by the external offset circuitry (see Figure 1: Application circuit for high power factor LED driver - single range input). The maximum value is limited by the minimum Idmg internal current needed to guarantee the correct functionality of the internal circuitry: Equation 15
4.8 Burst-mode operation at no load or very light load
When the voltage at the COMP pin falls 65 mV is below the internally fixed threshold VCOMPBM, the IC is disabled with the MOSFET kept in OFF state and its consumption reduced at a lower value to minimize VCC capacitor discharge. In this condition the converter operates in burst-mode (one pulse train every TSTART=500 µs), with minimum energy transfer. As a result of the energy delivery stop, the output voltage decreases: after 500 µs the controller switches-on the MOSFET again and the sampled voltage on the DMG pin is compared with the internal reference V REF. If the voltage on the EA output, as a result of the comparison, exceeds the VCOMPL threshold, the device restarts switching, otherwise it stays OFF for another 500 µs period. In this way the converter will work in burst-mode with a nearly constant peak current defined by the internal disable level. A load decrease will then cause a frequency reduction, which can go down even to few hundred hertz, thus minimizing all frequency-related losses and making it easier to comply with energy saving regulations. This kind of operation, shown in the timing diagrams of Figure 20 along with the others previously described, is noise-free since the peak current is low.
Figure 20. Load-dependent operating modes: timing diagrams
4.9 Soft-start and starter block
primary peak current will be limited from the voltage on the CLED capacitor. increase slowly and the soft-start feature will be ensured. load. The user will define the best appropriate value by experiments.
4.10 Hiccup mode OCP
tripped again a real malfunction is assumed and the device will be stopped. before the VCC capacitor is charged again and the device restarted.
Figure 21. Hiccup-mode OCP: timing diagram
4.11 High Power Factor implementation
schematic can be used; refer to the dedicated application note for further details. input voltage is added on the CS pin in order to keep a good line-regulation. resistor is suggested to avoid the discharge of COS capacitor in any condition. contribution proportional the output current trough the RSENSE resistor.
Figure 22. High power factor implemen tation connection - single range input order to minimize the internal feed-forward effect. is the internal reference voltage (VREF =2.51 V typ - see Table 5: Electrical characteristics).
HVLED815PF Device description Doc ID 023409 Rev 4 29/36 Equation 18 Where VOS_TYP is the desired voltage across COS capacitor applying the VIN_TYP typical input voltage (i.e. VIN_TYP=220 V for 176/264 Vac input range); Fsw is the switching frequency and can be estimated using the following formula, where fT and fR are the transition and resonant frequency respectively: Equation 19 Equation 20 Equation 21 where CD is the total equivalent capacitor afferent at the drain node. Based on the desired voltage across COS capacitor and calculated ROS resistor, then the sum of RA and RB can then calculated as a results of partitioning divider: Equation 22 Using the previous ROS resistor value the RPF resistor can be estimated using the following formula: Equation 23 Finally the current sense resistor RSENSE can be estimated in order to select the desiderated average output current value: π
Device description HVLED815PF 30/36 Doc ID 023409 Rev 4 Equation 24 where VCLED is internally defined (0.2 V typical - see Table 5: Electrical characteristics). System design tips Starting from the estimated value using the previous formulas, further fine-tuning on the real led driver board could be necessary and it can be easily done considering that: – Decreasing/increasing the R PF resistor value, the power factor effect increase/decrease – Decreasing/increasing the R OS resistor value, the line-regulation effect increase/decrease – Decreasing/increasing the R OS resistor value, the RA+RB resistors value should be increase/decrease to keep the desiderated voltage across the COS capacitor (Equation 22). – Decreasing/increasing the R SENSE resistor value the average output current increase/decrease (Equation 24).
4.12 Layout recommendations
A proper printed circuit board layout is essential for correct operation of any switch-mode converter and this is true for the HVLED815PF as well. Careful component placing, correct traces routing, appropriate traces widths and compliance with isolation distances are the major issues. In particular:
- Current sense resistor (RSENSE) should be connected as close as possible to the SOURCE pin, maintaining the trace for the GND as short as possible.
- Resistor connected on CS pin (ROS, RPF, R1) should be connected as close as possible to the pin.
- Compensation network (RCOMP, CCOMP) should be connected as close as possible to the COMP pin, maintaining the trace for the GND as short as possible.
- Signal ground should be routed separately from power ground, as well from the sense resistor trace.
- DMG partition resistors (RDMG, RFB) should be connected as close as possible to the DMG pin, minimizing the equivalent parasitic capacitor on DMG pin.
Figure 23. Suggested routing for the led driver
5 Package information
specifications, grade definitions and product status are available at: www.st.com. Figure 24. SO16N mechanical data
Figure 25. SO16N drawing
Figure 26. SO16N recommended footprint (dimensions are in mm)
6 Revision history
Table 6. Document revision history 26-Jul-2012 1 Initial release. 29-Aug-2012 2 Added Table 2: Pin description on page 7. Modified TJ value on Table 3: Thermal data. Updated TJ value in note 2 (below Table 5: Electrical characteristics). Added sections from 4.1 to 4.12.