Logic IC

HVDA551QDRQ1

Texas Instruments

5-V CAN TRANSCEIVER

Manufacturer: Texas Instruments

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www.ti.com SLLSEC4 –JUNE 2013 5-VCANTRANSCEIVER WITHI/OLEVELADAPTINGANDLOW-POWER-MODESUPPLYOPTIMIZATION Check forSamples: HVDA551-Q1 ,HVDA553-Q1 1FEATURES – RXD Wake Up Request Lock Out on CAN Bus Stuck Dominant Fault(HVDA551)• QualifiedforAutomotive Applications – DigitalInputsCompatible With 5-V• Meets or Exceeds theRequirements of Microprocessors(HVDA553)ISO 11898-2and ISO 11898-5 – Thermal Shutdown Protection• GIFT/ICTCompliant – Power-Up and -Down Glitch-FreeBus I/O• ESD Protectionup to±12 kV (Human-Body – High Bus InputImpedance WhenModel) on Bus Pins Unpowered (No Bus Load)• I/OVoltageLevelAdapting APPLICATIONS– HVDA551: AdaptableI/OVoltageRange

SAE J2284 High-Speed CAN forAutomotive(VIO)From 3 V to5.33V Applications• SPLIT VoltageSource
SAE J1939 Standard Data Bus Interface– HVDA553: Common-Mode Bus Stabilization
GMW3122 Dual-WireCAN PhysicalLayer• OperatingModes:
ISO 11783 Standard Data Bus Interface– Normal Mode
NMEA 2000 Standard Data Bus Interface– Low-Power Standby Mode withRXD Wake- Up Request DESCRIPTION• High ElectromagneticCompliance (EMC) The device is designed and qualifiedfor use in
Supports CAN FlexibleData-Rate(FD) automotiveapplicationsand meets or exceeds the specificationsof the ISO 11898 High Speed CAN• Protection (ControllerArea Network) PhysicalLayer standard– UndervoltageProtectionon VIO and VCC (transceiver).– Bus-FaultProtectionof–27 V to40 V – TXD Dominant StateTime-Out Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SLLSEC4 –JUNE 2013 www.ti.com FUNCTIONAL BLOCK DIAGRAMS Figure1.HVDA551 Figure2.HVDA553

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www.ti.com SLLSEC4 –JUNE 2013 These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. Table1.TERMINAL FUNCTIONS TERMINAL CANH 7 I/O HighlevelCAN bus line CANL 6 I/O Low levelCAN bus line GND 2 GND Ground connection RXD 4 O CAN receivedataoutput(lowindominantbus state,highinrecessivebus state) STB 8 I Standbymode selectpin(activehigh) TXD 1 I CAN transmitdatainput(lowfordominantbus state,highforrecessivebus state) VCC 3 Supply Transceiver5V supplyvoltage VIO / VIO (HVDA551):Transceiverlogiclevel(IO)supplyvoltage5 Supply/OSPLIT SPLIT (HVDA553):Common mode stabilizationoutput Table2.ORDERING INFORMATION (1) TA PACKAGE (2) ORDERABLE PART NUMBER TOP-SIDE MARKING HVDA551QDRQ1 H551Q –40°C to125°C SOIC – D Reelof2500 HVDA553QDRQ1 H553Q (1) Forthemost-currentpackage and orderinginformation,see thePackage OptionAddendum attheend ofthisdocument,orsee theTI Web siteatwww.ti.com. (2) Package drawings,thermaldata,and symbolizationareavailableatwww.ti.com/packaging. FUNCTIONAL DESCRIPTION GeneralDescription The devicemeets or exceeds thespecificationsoftheISO 11898 High Speed CAN (ControllerArea Network) PhysicalLayer standard(transceiver).This deviceprovidesCAN transceiverfunctions:differentialtransmit capabilityto the bus and differentialreceivecapabilityat data ratesup to 1 megabitper second (Mbps).The deviceincludesmany protectionfeaturesprovidingdeviceand CAN networkrobustness. OperatingModes These deviceshave two main operatingmodes: normalmode and standbymode. Operatingmode selectionis made viatheSTB inputpin. Copyright© 2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

Recessive Dominant Recessive Time, t Typical Bus Voltage Low Power Standby Mode CANL CANH Vdiff Vdiff Normal & Silent Mode RXD V /2CC A B A: Normal Mode B: Low Power Standby Mode CANH CANL HVDA551-Q1 HVDA553-Q1 SLLSEC4 –JUNE 2013 www.ti.com Table3.OperatingModes DEVICE STB MODE DRIVER RECEIVER RXD Pin LOW Normal Mode Enabled(On) Enabled(On) Mirrorsbus state(1) Standbymode Low-power wake-upAllDevices HIGH (RXD wake-up Disabled(Off) receiverand bus Mirrorsbus stateviawake-up filter(2) request) monitorenabled (1) Mirrorsbus state:LOW ifCAN bus isdominant,HIGH ifCAN bus isrecessive. (2) See Figure5 and Figure6 foroperationofthelow-powerwake-up receiverand bus monitorforRXD wake-up requestbehaviorand Table5 forthewake -upreceiverthresholdlevels. Bus Statesby Mode The CAN bus has threevalidstatesduringpowered operation,dependingon themode ofthedevice.Innormal mode the bus may be dominant(logicLOW), where the bus linesare drivendifferentiallyapart,or recessive (logicHIGH), where the bus linesare biasedto VCC / 2 viathe high-ohmicinternalinputresistorsR IN of the receiver.The thirdstateislow-powerstandbymode where thebus linesare biasedtoGND viathehigh-ohmic internalinputresistorsR IN ofthereceiver. Figure3.Bus States(PhysicalBitRepresentation) Figure4.SimplifiedCommon-Mode Bias and ReceiverImplementation Normal Mode Thisisthenormaloperatingmode ofthedevice.Normal mode isselectedby settingSTB low.The CAN driver and receiverarefullyoperationaland CAN communicationisbidirectional.The driveristranslatinga digitalinput on TXD toa differentialoutputon CANH and CANL. The receiveristranslatingthedifferentialsignalfromCANH and CANL toa digitaloutputon RXD. Inrecessivestate,theCAN bus pins(CANH and CANL) arebiasedto0.5 × VCC .Indominantstate,thebus pinsaredrivendifferentiallyapart.Logichighisequivalenttorecessiveon the bus,and logiclowisequivalenttoa dominant(differential)signalon thebus. Standby Mode With RXD Wake-Up Request Thisisthelow-powermode ofthedevice.Standby mode isselectedby settingSTB high.The CAN driverand main receiverare turnedoffand bidirectionalCAN communicationisnotpossible.The low-powerreceiverand bus monitor,bothsuppliedviatheVIO supply,areenabledtoallowforRXD wake-up requestsviatheCAN bus. The VCC (5-V)supplymay be turnedoffforadditionalpower savingsatthesystem level.A wake-up requestis outputtoRXD (drivenlow)forany dominantbus transmissionslongerthanthefiltertimetBUS .The localprotocol controller(MCU) shouldmonitorRXD fortransitionsand thenreactivatethedevicetonormalmode based on the wake-up request.The 5-V (VCC ) supplymust be reactivatedby the localprotocolcontrollerto resume normal mode ifithas been turnedoffforlow-powerstandbyoperation.The CAN bus pinsareweaklypulledtoGND, see Figure3 and Figure4.

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Standby Mode, STB = High <tClear <tBUS tBUS tBUS tClear tBUS tBUS STB Bus VDiff RXD Standby Mode, STB = High <tBUS <tBUS <tBUStBUS tBUS HVDA551-Q1 HVDA553-Q1 www.ti.com SLLSEC4 –JUNE 2013 RXD Wake-Up Request Lockout forBus-Stuck Dominant Fault(HVDA551) Ifthebus has a faultconditionwhere itisstuckdominantwhiletheHVDA551 isplacedintostandbymode viathe STB pin,thedevicelocksouttheRXD wake-up requestuntilthefaulthas been removed topreventfalsewake- up signalsinthesystem. Figure5. HVDA551 RXD Wake-Up Request With No Bus FaultCondition Figure6. HVDA551 RXD Wake-Up Request Lockout During Bus Dominant FaultCondition Copyright© 2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

SLLSEC4 –JUNE 2013 www.ti.com Driverand ReceiverFunctionTables Table4.DriverFunctionTable INPUTS OUTPUTS DRIVEN BUS STATEDEVICE STB /S (1) TXD (1) CANH (1) CANL (1) BothDevices L L H L Dominant L H Z Z Recessive L Open Z Z Recessive HVDA551, HVDA553 (2) H X Y Y Recessive (1) H = highlevel,L = lowlevel,X = irrelevant,Y = common-mode biastoGND, Z = common mode bias toVCC /2.See Figure3 and Figure4 forcommon mode biasinformation. (2) HVDA551 and HVDA553 have internalpulluptoVIO on theSTB pin.IftheSTB pinisopen,thepinis pulledhighand thedeviceisinstandbymode. Table5.ReceiverFunctionTable CAN DIFFERENTIAL INPUTSDEVICE MODE BUS STATE RXD PIN(1) VID = V(CANH) – V(CANL) StandbywithRXD VID ≥ 1.15V DOMINANT L wake-up request 0.4V < VID < 1.15V ? ?(HVDA551, VID ≤ 0.4V RECESSIVE HHVDA553) (2) NORMAL VID ≥ 0.9V DOMINANT L VID ≤ 0.5V RECESSIVE H ANY Open N/A H (1) H = highlevel,L = lowlevel,X = irrelevant,? = indeterminate. (2) WhileSTB ishigh(standbymode) theRXD outputoftheHVDA551 functionsaccordingtothelevels above and thewake-up conditionsshown inFigure5 and Figure6. DigitalInputsand Outputs The HVDA551 devicehas an I/Osupplyvoltageinputpin(VIO)toratiometricallylevelshiftthedigitallogicinput and outputlevelswithrespecttoVIO forcompatibilitywithprotocolcontrollershavingI/Osupplyvoltagesbetween 3 V and 5.33V. The HVDA553 deviceshave a singleVCC supply(5V).The digitallogicinputand outputlevelsforthesedevices arewithrespecttoVCC forcompatibilitywithprotocolcontrollershavingI/Osupplyvoltagesbetween 4.68V and 5.33V. Using theHVDA553 With SplitTermination The SPLIT pinvoltageoutputprovides0.5× VCC innormalmode. The circuitmay be used by theapplicationto stabilizethecommon-mode voltageofthebus by connectingittothecentertapofsplitterminationfortheCAN network(seeFigure7 and Figure20).Thispinprovidesa stabilizingrecessivevoltagedrivetooffsetleakage currentsofunpowered transceiversorotherbiasimbalancesthatmightbringthenetworkcommon-mode voltage away from 0.5× VCC .Using thisfeatureina CAN networkimproveselectromagneticemissionsbehaviorofthe network by eliminatingfluctuationsin the bus common-mode voltagelevelsat the startof message transmissions.

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SLLSEC4 –JUNE 2013 www.ti.com ProtectionFeatures TXD Dominant StateTime Out Duringnormalmode, theonlymode where theCAN driverisactive,theTXD dominanttime-outcircuitprevents thetransceiverfromblockingnetworkcommunicationintheeventofa hardwareorsoftwarefailurewhere TXD is helddominantlongerthanthetime-outperiodt(DOM) .The dominanttime-outcircuitistriggeredby a fallingedge on TXD. Ifno risingedge isseen beforethetime-outconstantofthecircuitexpires(t(DOM) )theCAN bus driveris disabled,freeingthebus forcommunicationbetween othernetworknodes.The CAN driverisre-activatedwhen a recessivesignalisseen on the TXD pin,thusclearingthe dominant-statetime-out.The CAN bus pinsare biasedtotherecessivelevelduringa TXD dominant-statetime-out. APPLICATION NOTE: The maximum dominantTXD timeallowedby theTXD dominant-statetime-outlimitsthe minimum possibledatarateofthedevices.The CAN protocolallowsa maximum ofelevensuccessivedominant bits(on TXD) forthe worstcase,where fivesuccessivedominant bitsare followedimmediatelyby an error frame.This,alongwiththet(DOM) minimum, limitstheminimum bitrate.The minimum bitratemay be calculated by:Minimum BitRate = 11 /t(DOM) . Thermal Shutdown Ifthejunctiontemperatureofthedeviceexceeds thethermalshutdown threshold,thedeviceturnsofftheCAN drivercircuits.Thisconditionisclearedonce thetemperaturedropsbelow thethermalshutdown temperatureof thedevice.The CAN bus pinsarebiasedtotherecessivelevelduringa thermalshutdown. UndervoltageLockout or Unpowered Device Both ofthesupplypinshave undervoltagedetection,whichplacesthedeviceinforcedstandbymode toprotect thebus duringan undervoltageeventon eithertheVCC orVIO supplypins.IfVIO isundervoltage,theRXD pinis forcedtothehigh-impedancestateand thedevicedoes notpass any wake-up signalsfromthebus totheRXD pin.Because thedeviceisplacedintoforcedstandbymode, theCAN bus pinshave a common-mode biasto ground,protectingtheCAN network;see Figure3 and Figure4. The deviceisdesignedto be an idealpassiveloadto the CAN bus ifitisunpowered.The bus pins(CANH, CANL) have extremelylow leakagecurrentswhen thedeviceisunpowered,so theydo notloaddown thebus butratherbe a no-load.Thisiscritical,especiallyifsome nodes ofthenetworkareunpowered whiletherestof thenetworkremainsinoperation. APPLICATION NOTE: Once an undervoltageconditionisclearedand VCC and VIO have returnedtovalidlevels, thedevicetypicallyrequires300 µs totransitiontonormaloperation. Table6.UndervoltageProtection DEVICE VCC VIO DEVICE STATE BUS RXD Common mode Mirrorsbus stateviawake-upBad Good ForcedStandbyMode biastoGND (1) filter(2) Bothdevices Common modeGood Bad ForcedStandbyMode (3) HighZbiastoGND (1) Unpowered Unpowered No load HighZ (1) See Figure3 and Figure4 forcommon-mode biasinformation. (2) See Figure5 and Figure6 foroperationofthelow-powerwake-up receiverand bus monitorforRXD wake-up requestbehaviorand Table5 forthewake-up receiverthresholdlevels. (3) When VIO isundervoltage,thedeviceisforcedintostandbymode withrespecttotheCAN bus,because thereisnota validdigital referencetodeterminethedigitalI/Ostatesorpower thewake-up receiver. FloatingPins The devicehas integratedpullupsand pulldownson criticalpinstoplacethedeviceintoknown statesifthepins float.The TXD and STB pinson theHVDA551 arepulledup toVIO.Thisforcesa recessiveinputlevelon TXD in thecase ofa floatingTXD pinand preventsthedevicefromenteringintothelow-powerstandbymode iftheSTB pinfloats.Inthecase oftheHVDA553 boththeTXD and STB pinsare pulledup toVCC ,which has thesame effect.

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www.ti.com SLLSEC4 –JUNE 2013 CAN Bus Short-CircuitCurrentLimiting The devicehas severalprotectionfeaturesthatlimitthe short-circuitcurrentwhen a CAN bus lineisshorted. These includeCAN driver-currentlimiting(dominantand recessive)and TXD dominant-statetime-outtoprevent continuouslydrivingdominant.DuringCAN communication,thebus switchesbetween dominantand recessive states;thus,the short-circuitcurrentmay be viewed eitheras the currentduringeach bus stateor as a dc average current.For system currentand power considerationsin terminationresistanceand common-mode choke ratings,the average short-circuitcurrentshouldbe used.The devicehas TXD dominant-statetime-out, whichpreventspermanentlyhavingthehighershort-circuitcurrentofdominantstate.The CAN protocolalsohas forcedstatechanges and recessivebitssuch as bitstuffing,controlfields,and interframespace.These ensure thereisa minimum recessiveamount of timeon the bus even ifthe data fieldcontainsa highpercentageof dominantbits. APPLICATION NOTE: The short-circuitcurrentofthebus depends on theratioofrecessivetodominantbitsand theirrespectiveshort-circuitcurrents.The average short-circuitcurrentmay be calculatedwiththe following formula: IOS(AVG) = %Transmit× [(%REC_Bits× IOS(SS)_REC )+ (%DOM_Bits × IOS(SS)_DOM )]+ [%Receive× IOS(SS)_REC ] where IOS(AVG) istheaverageshort-circuitcurrent,%Transmitisthepercentagethenode istransmittingCAN messages, %Receive isthepercentagethenode isreceivingCAN messages, %REC_Bits isthepercentage ofrecessivebitsinthetransmittedCAN messages, %DOM_Bits isthepercentageofdominantbitsinthe transmittedCAN messages, IOS(SS)_REC istherecessivesteady-stateshort-circuitcurrentand IOS(SS)_DOM is thedominantsteady-stateshort-circuitcurrent. Copyright© 2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

SLLSEC4 –JUNE 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS (1)(2) 1.1 VCC Supplyvoltagerange –0.3V to6 V 1.2 VIO I/Osupplyvoltagerange –0.3V to6 V Voltagerangeatbus terminals(CANH,1.3 –27 V to40 VCANL)

1.4 IO Receiveroutputcurrent(RXD) 20 mA

HVDA55x –0.3V to6 V and VI≤ VIO + 0.3V

1.5 VI Voltageinputrange(TXD,STB, S)

HVDA553 –0.3V to6 V Operatingvirtual-junctiontemperature1.6 TJ –40°C to150°Crange (1) Stressesbeyond thoselistedunderAbsoluteMaximum Ratingsmay cause permanentdamage tothedevice.These arestressratings only,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thoseindicatedunderRecommended Operating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmay affectdevicereliability. (2) Allvoltagevalues,exceptdifferentialI/Obus voltages,arewithrespecttothegroundterminal. ELECTROSTATIC DISCHARGE AND TRANSIENT PROTECTION (1) PARAMETER TEST CONDITIONS VALUE

2.1 CANH and CANL (3) ±12 kV

Human-body model(2)

2.2 Allpins ±4 kV

Electrostaticdischarge2.3 Charged-devicemodel(4) Allpins ±1 kV IEC 61000-4-2accordingtoIBEE CAN ±7 kV2.4 CANH and CANL pinstoGNDEMC TestSpecification(5)

2.5 Pulse1 –100 V

2.6 Pulse2a 75 VISO7637 transientsaccordingtoIBEEISO 7637 transients CAN EMC TestSpecification(6)

2.7 Pulse3a –150 V

2.8 Pulse3b 100 V

(1) Stressesbeyond thoselistedunderElectrostaticDischargeand TransientProtectionmay cause permanentdamage tothedevice. These arestressratingsonly,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thoseindicatedunder Recommended OperatingConditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmay affect devicereliability. (2) HBM testedinaccordancewithAEC-Q100-002. (3) HBM testmethod based on AEC-Q100-002, CANH and CANL bus pinsstressedwithrespecttoeach otherand GND. (4) CDM testedinaccordancewithAEC-Q100-011. (5) IEC 61000-4-2isa system-levelESD test.ResultsgivenherearespecifictotheIBEE CAN EMC Testspecificationconditions.Different system-levelconfigurationsleadtodifferentresults. (6) ISO 7637 isa systemleveltransienttest.ResultsgivenherearespecifictotheIBEE CAN EMC Testspecificationconditions.Different systemlevelconfigurationsleadtodifferentresults. RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT 3.1 VCC Supplyvoltage 4.68 5.33 V 3.2 VIO I/Osupplyvoltage 3 5.33 V

3.3 VIorVIC Voltageatany bus terminal(separatelyorcommon mode) –12 12 V

3.4 VIH High-levelinputvoltage TXD, STB (forHVD553: VIO = VCC ) 0.7× VIO VIO V 3.5 VIL Low-levelinputvoltage TXD, STB (forHVD553: VIO = VCC ) 0 0.3× VIO V

3.6 VID Differentialinputvoltage,bus Between CANH and CANL –6 6 V

3.7 IOH High-leveloutputcurrent RXD –2 mA

3.8 IOL Low-leveloutputcurrent RXD 2 mA

Operatingambientfree-air3.9 TA See ThermalCharacteristicstable –40 125 °Ctemperature

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ELECTRICAL CHARACTERISTICS

overrecommended operatingconditions,TJ = –40°C to150°C (unlessotherwisenoted),HVDA553 VIO = VCC PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT Supply Characteristics(HVDA551) Standby mode STB atVIO,VCC = 5.33V,VIO = 3 V,4.1 5 µA(HVDA551 TXD atVIO (2) only) ICC 5-V supplycurrent Normal mode4.2 TXD at0 V,60-Ω load,STB at0 V 50 70(dominant) mA4.3 Normal mode TXD atVIO,no load,STB at0 V 6.75 10(recessive)4.4 Standby STB atVIO ,VCC = 5.33V or0 V,mode4.5 RXD floating,TXD atVIO 6.5 15(HVDA551 TA = -40°C, 25°C, 125°C (3) Only) IIO I/Osupplycurrent µANormal mode VCC = 5.33V,RXD floating,TXD at04.6 85 300(dominant) V Normal mode VCC = 5.33V,RXD floating,TXD at 70 300(recessive) VIO Undervoltagedetectionon VCC for4.7 UV VCC 3.2 3.6 4 Vforcedstandbymode Hysteresisvoltagefor

4.8 VHYS(UVVCC) undervoltagedetectionon UV VCC 200 mV

Undervoltagedetectionon VIO for4.9 UV VIO 1.9 2.45 2.95 Vforcedstandbymode Hysteresisvoltagefor

4.10 VHYS(UVVIO) undervoltagedetectionon UV VIO 130 mV

Supply Characteristics(HVDA553) Standby mode STB atVCC ,VCC = 5.33V,4.1-5 12 µA(HVDA553 TXD atVCC (2) only) ICC 5-V supplycurrent Normal mode4.2-5 TXD at0 V,60-Ω load,STB at0 V 50 70(dominant) mA4.3-5 Normal mode TXD atVCC ,No load,STB at0 V 6.75 10(recessive)4.4-5 Undervoltagedetectionon VCC for4.7-5 UV VCC 3.2 3.6 4 Vforcedstandbymode Hysteresisvoltagefor 4.8-5 VHYS(UVVCC) undervoltagedetectionon UV VCC 200 mV forstandbymode (1) Alltypicalvaluesareat25°C and supplyvoltagesofVCC = 5 V and VIO = 3.3V. (2) The VCC supplyisnotneeded duringstandbymode so intheapplicationICC instandbymode may be zero.IftheVCC supplyremains, thenICC isperspecificationwithVCC . (3) See HVDA55x Errata,Literaturenumber SLLZ073 . Copyright© 2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

SLLSEC4 –JUNE 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) overrecommended operatingconditions,TJ = –40°C to150°C (unlessotherwisenoted),HVDA553 VIO = VCC PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT Device SwitchingCharacteristics:PropagationTime (Loop Time TXD toRXD) Totalloopdelay,driverinput 5.1 tPROP(LOOP1) (TXD) toreceiveroutput(RXD), 70 230 recessivetodominant Figure15,STB at0 V ns Totalloopdelay,driverinput 5.2 tPROP(LOOP2) (TXD) toreceiveroutput(RXD), 70 230 dominanttorecessive DriverElectricalCharacteristics VI= VIO,VIO = 3 V,STB at0 V, 6.3 VO ® ) Bus outputvoltage(recessive) R L = 60 Ω,See Figure8 and 2 2.5 3 V Figure3 Bus outputvoltage,standbymode STB atVIO,R L = 60 Ω,6.4 VO(STBY) –0.1 0.1 V(HVDA551 only) See Figure8 and Figure3 VI= 0 V,R L = 60 Ω,STB at0 V,6.5 1.5 3See Figure8,Figure3,and Figure9DifferentialoutputvoltageVOD(D) V(dominant) VI= 0 V,R L = 45 Ω,STB at0 V,6.6 1.4 3See Figure8,Figure3,and Figure9 VI= 3 V,STB at0 V,R L = 60 Ω,See6.7 –0.012 0.012Differentialoutputvoltage Figure8 and Figure3VOD ® ) V(recessive) 6.8 VI= 3 V,STB at0 V,No load –0.5 0.05 Outputsymmetry (dominantor STB at0 V,R L = 60 Ω,6.9 VSYM 0.9VCC VCC 1.1VCC Vrecessive)(VO(CANH) + VO(CANL) ) See Figure18 Steady-statecommon-mode STB at0 V,R L = 60 Ω,6.10 VOC(SS) 2 2.5 3 Voutputvoltage See Figure14 Change insteady-statecommon- STB at0 V,R L = 60 Ω,6.11 ΔVOC(SS) 50 mVmode outputvoltage See Figure14 VCANH = 0 V,CANL open,TXD = 6.12 low, –100 Short-circuitsteady-stateoutput See Figure17IOS(SS)_DOM mAcurrent,dominant VCANL = 32 V,CANH open,TXD =6.13 100low,See Figure17 –20 V ≤ VCANH ≤ 32 V,CANL open,6.14 –10 10TXD = high,See Figure17Short-circuitsteady-stateoutputIOS(SS)_REC mAcurrent,recessive –20 V ≤ VCANL ≤ 32 V,CANH open,6.15 –10 10TXD = high,See Figure17

6.16 C O Outputcapacitance See receiverinputcapacitance

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www.ti.com SLLSEC4 –JUNE 2013 ELECTRICAL CHARACTERISTICS (continued) overrecommended operatingconditions,TJ = –40°C to150°C (unlessotherwisenoted),HVDA553 VIO = VCC PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT DriverSwitchingCharacteristics Propagationdelaytime,low-to-7.1 tPLH STB at0 V,See Figure10 65 nshighleveloutput Propagationdelaytime,high-to-7.2 tPHL STB at0 V,See Figure10 50 nslowleveloutput 7.3 tR Differentialoutputsignalrisetime STB at0 V,See Figure10 25 ns 7.4 tF Differentialoutputsignalfalltime STB at0 V,See Figure10 55 ns Enabletimefromstandbyorsilent7.5 tEN See Figure13 30 µsmode tonormalmode, dominant 7.6 t(DOM) (4) Dominanttime-out See Figure16 1200 2000 2800 µs ReceiverElectricalCharacteristics Positive-goinginputthreshold8.1 VIT+ STB at0 V,See Table7 800 900 mVvoltage,normalmode Negative-goinginputthreshold8.2 VIT– STB at0 V,See Table7 500 650 mVvoltage,normalmode

8.3 Vhys Hysteresisvoltage(VIT+ – VIT–) 125 mV

Inputthresholdvoltage,8.4 VIT(STBY) STB atVIO 400 1150 mVstandbymode (HVDA551 only) Power-off(unpowered)bus input CANH = CANL = 5 V,VCC at0 V,8.5 II(OFF_LKG) 3 µAleakagecurrent VIO at0 V,TXD at0 V HVDA551: TXD atVIO,VIO at3.3V.

8.7 C ID Differentialinputcapacitance HVDA553: TXD atVCC 5 pF

VI= 0.4sin(4E6πt) 8.8 R ID Differentialinputresistance HVDA551: TXD atVIO,VIO = 3.3V, 29 80 kΩ STB at0 V 8.9 R IN Inputresistance(CANH orCANL) 14.5 25 40 kΩHVDA553: TXD atVCC ,STB at0 V Inputresistancematching8.10 R I(M) V(CANH) = V(CANL) –3% 0% 3%[1– R IN(CANH) /R IN(CANL))]× 100% ReceiverSwitchingCharacteristics Propagationdelaytime,low-to-9.1 tPLH STB at0 V ,See Figure12 95 nshigh-leveloutput Propagationdelaytime,high-to-9.2 tPHL STB at0 V ,See Figure12 60 nslow-leveloutput 9.3 tR Outputsignalrisetime STB at0 V ,See Figure12 13 ns 9.4 tF Outputsignalfalltime STB at0 V ,See Figure12 10 ns Dominanttimerequiredon bus for 9.5 tBUS wake-up fromstandby(HVDA551 1.5 5 µs only) STB atVIO,See Figure5 andRecessivetimeon thebus toclear Figure6thestandbymode receiveroutput 9.6 tCLEAR (RXD) ifstandbymode isentered 1.5 5 µs whilebus isdominant(HVDA551 only) (4) The TXD dominanttimeout(t(DOM) )disablesthedriverofthetransceiveronce theTXD has been dominantlongerthant(DOM) ,which releasesthebus linestorecessive,preventinga localfailurefromlockingthebus dominant.The drivermay onlytransmitdominant againafterTXD has been returnedHIGH (recessive).Whilethisprotectsthebus fromlocalfaults,lockingthebus dominant,itlimitsthe minimum dataratepossible.The CAN protocolallowsa maximum ofelevensuccessivedominantbits(onTXD) fortheworstcase, where fivesuccessivedominantbitsarefollowedimmediatelyby an errorframe.This,alongwiththet(DOM) minimum, limitsthe minimum bitrate.The minimum bitratemay be calculatedby:Minimum BitRate = 11 /t(DOM) = 11 bits/300 µs = 37 kbps Copyright© 2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

SLLSEC4 –JUNE 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) overrecommended operatingconditions,TJ = –40°C to150°C (unlessotherwisenoted),HVDA553 VIO = VCC PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT TXD Pin Characteristics 10.1 VIH High-levelinputvoltage HVD553: VIO = VCC 0.7× VIO V 10.2 VIL Low-levelinputvoltage HVD553: VIO = VCC 0.3× VIO V HVDA551: TXD atVIO HVDA553:10.3 IIH High-levelinputcurrent -2 2 µATXD atVCC

10.4 IIL Low-levelinputcurrent TXD at0 V –100 -7 µA

IO = –2 mA, See Figure12 HVD553:11.1 VOH High-leveloutputvoltage 0.8× VIO VVIO = VCC IO = 2 mA, See Figure12 HVD553:11.2 VOL Low-leveloutputvoltage 0.2× VIO VVIO = VCC STB Pin Characteristics 12.1 VIH High-levelinputvoltage HVD553: VIO = VCC 0.7× VIO V 12.2 VIL Low-levelinputvoltage HVD553: VIO = VCC 0.3× VIO V HVDA551: STB atVIO HVDA553:12.3 IIH High-levelinputcurrent –2 2 µASTB atVCC

12.4 IIL Low-levelinputcurrent STB at0 V –20 µA

SPLIT Pin (HVDA553 Only) 14.1 VO OutputVoltage –500 µA < IO < 500 µA 0.3VCC 0.5VCC 0.7VCC V

14.2 IO(STB) Leakage current,standbymode STB atVCC ,–12 V ≤ IO ≤ 12 V –5 5 µA

14 SubmitDocumentationFeedback Copyright© 2013,Texas InstrumentsIncorporated

ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

www.ti.com SLLSEC4 –JUNE 2013 THERMAL CHARACTERISTICS overrecommended operatingconditions,TJ = –40°C to150°C (unlessotherwisenoted),HVDA553 VIO = VCC THERMAL METRIC (1)(2) TEST CONDITIONS MIN TYP MAX UNIT THERMAL METRIC -SOIC D PACKAGE 14.1-D Low-K thermalresistance(3) 140Junction-to-airthermalθJA resistance14.2-D High-Kthermalresistance(4) 112 Junction-to-boardthermal14.3-D θJB 50resistance(5) Junction-to-case(top)thermal14.4-D θJC(TOP) 56resistance(6) °C/W Junction-to-case(bottom)14.5-D θJC(BOTTOM) N/Athermalresistance(7) Junction-to-top14.6-D ΨJT 13characterizationparameter(8) Junction-to-board14.7-D ΨJB 55characterizationparameter(9) AVERAGE POWER DISSIPATION AND THERMAL SHUTDOWN VCC = 5 V,VIO = VCC ,TJ = 27°C, R L = 60

14.8 STB at0 V,InputtoTXD at500 kHz, 140

50% dutycyclesquarewave, C L atRXD = 15 pF PD Averagepower dissipation mW VCC = 5.33V,VIO = VCC ,TJ = 130°C, R L = 60 Ω,STB at0 V,

14.9 InputtoTXD at500 kHz, 215

50% dutycyclesquarewave, C L atRXD = 15 pF Thermalshutdown 18514.10 °Ctemperature (1) Formore informationabouttraditionaland new thermalmetrics,see theIC Package ThermalMetricsapplicationreport,SPRA953 . (2) The junctiontemperature(TJ)iscalculatedusingthefollowingTJ = TA + (PD × θJA).θJAisPCB-dependent;bothJEDEC-standardlow-K and high-Kvaluesaregivenas referencepointstostandardizedreferenceboards. (3) The junction-to-ambientthermalresistanceundernaturalconvectionisobtainedina simulationon a JEDEC-standard,low-Kboard,as specifiedinJESD51-3,inan environmentdescribedinJESD51-2a. (4) The junction-to-ambientthermalresistanceundernaturalconvectionisobtainedina simulationon a JEDEC-standard,high-Kboard,as specifiedinJESD51-7,inan environmentdescribedinJESD51-2a. (5) The junction-to-boardthermalresistanceisobtainedby simulatinginan environmentwitha ringcold-platefixturetocontrolthePCB temperature,as describedinJESD51-8. (6) The junction-to-case(top)thermalresistanceisobtainedby simulatinga cold-plateteston thepackage top.No specificJEDEC- standardtestexists,buta closedescriptioncan be foundintheANSI SEMI standardG30-88. (7) The junction-to-case(bottom)thermalresistanceisobtainedby simulatinga cold-plateteston theexposed (power)pad.No specific JEDEC standardtestexists,buta closedescriptioncan be foundintheANSI SEMI standardG30-88. (8) The junction-to-topcharacterizationparameter,ΨJT,estimatesthejunctiontemperatureofa deviceina realsystemand isextracted fromthesimulationdataforobtainingθJA,usinga proceduredescribedinJESD51-2a (sections6 and 7). (9) The junction-to-boardcharacterizationparameter,ΨJB estimatesthejunctiontemperatureofa deviceina realsystemand isextracted fromthesimulationdataforobtainingθJA ,usinga proceduredescribedinJESD51-2a (sections6 and 7). Copyright© 2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

SLLSEC4 –JUNE 2013 www.ti.com PARAMETER MEASUREMENT INFORMATION Figure8. DriverVoltage,Current,and TestDefinition Figure9. DriverVOD TestCircuit A. The inputpulseissuppliedby a generatorhavingthe followingcharacteristics:PRR ≤ 125 kHz, 50% dutycycle, tr ≤ 6 ns,tf≤ 6 ns,ZO = 50 Ω. B. C L includesinstrumentationand fixturecapacitancewithin±20%. C. ForHVDA553 deviceversions,VIO = VCC . Figure10. DriverTestCircuitand VoltageWaveforms

ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

www.ti.com SLLSEC4 –JUNE 2013 PARAMETER MEASUREMENT INFORMATION (continued) Figure11. ReceiverVoltageand CurrentDefinitions A. The inputpulseissuppliedby a generatorhavingthe followingcharacteristics:PRR ≤ 125 kHz, 50% dutycycle, tr ≤ 6 ns,tf≤ 6 ns,ZO = 50 Ω. B. C L includesinstrumentationand fixturecapacitancewithin±20%. C. C. ForHVDA553 deviceversionsVIO = VCC . Figure12. ReceiverTestCircuitand VoltageWaveforms Table7.DifferentialInputVoltageThresholdTest INPUT OUTPUT VCANH VCANL |VID| R –11.1V –12 V 900 mV L 12 V 11.1V 900 mV L VOL –6 V –12 V 6 V L

12 V 6 V 6 V L

–11.5V –12 V 500 mV H 12 V 11.5V 500 mV H –12 V –6 V 6 V H VOH

6 V 12 V 6 V H

SLLSEC4 –JUNE 2013 www.ti.com A. C L = 100 pF includesinstrumentationand fixturecapacitancewithin±20%. B. AllVI inputpulsesarefrom0 V toVIO and suppliedby a generatorhavingthefollowingcharacteristics:tr ortf ≤ 6 ns. Pulserepetitionrate(PRR) = 25 kHz,50% dutycycle. C. C. ForHVDA553 deviceversions,VIO = VCC . Figure13. tEN TestCircuitand Waveforms A. AllVI inputpulsesarefrom0 V toVIO and suppliedby a generatorhavingthefollowingcharacteristics:tr ortf ≤ 6 ns. Pulserepetitionrate(PRR) = 125 kHz,50% dutycycle. Figure14. Common-Mode Output VoltageTestand Waveforms

ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

www.ti.com SLLSEC4 –JUNE 2013 A. C L = 100 pF includesinstrumentationand fixturecapacitancewithin±20%. B. AllVI inputpulsesarefrom0 V toVIO and suppliedby a generatorhavingthefollowingcharacteristics:tr ortf ≤ 6 ns. Pulserepetitionrate(PRR) = 125 kHz,50% dutycycle. C. ForHVDA553 deviceversions,VIO = VCC . Figure15. tPROP(LOOP) TestCircuitand Waveform A. C L = 100 pF includesinstrumentationand fixturecapacitancewithin±20%. B. AllVI inputpulsesarefrom0 V toVIO and suppliedby a generatorhavingthefollowingcharacteristics:tr ortf ≤ 6 ns. Pulserepetitionrate(PRR) = 500 Hz,50% dutycycle. C. ForHVDA553 deviceversions,VIO = VCC . Figure16. TXD Dominant Time-Out TestCircuitand Waveforms Copyright© 2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

SLLSEC4 –JUNE 2013 www.ti.com A. ForHVDA553 deviceversionsVIO = VCC . Figure17. DriverShort-CircuitCurrentTestand Waveforms A. AllVI inputpulsesare from 0 V to VIO and suppliedby a generatorhavingthe followingcharacteristics:tr and tf≤ 6 ns,pulserepetitionrate(PRR) = 250 kHz,50% dutycycle. Figure18. DriverOutput Symmetry TestCircuit

ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

www.ti.com SLLSEC4 –JUNE 2013

APPLICATION INFORMATION

Figure19. TypicalApplicationUsing theHVDA551 With 3.3-VI/OVoltageLevelinLow-Power Mode (5-VVCC Not Needed inLow-Power Mode) Figure20. TypicalApplicationUsing theHVDA553 With SPLIT Termination Copyright© 2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:HVDA551-Q1 HVDA553-Q1

www.ti.com 28-Jun-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples HVDA551QDRQ1 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 H551Q HVDA553QDRQ1 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 H553Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) HVDA551QDRQ1 SOIC D 8 2500 367.0 367.0 35.0 HVDA553QDRQ1 SOIC D 8 2500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2013 Pack Materials-Page 2

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Product Information

HVDA551QDRQ1 specifications and overview.

Summary

5-V CAN TRANSCEIVER

Description

5-V CAN TRANSCEIVER

Source title HVDA551QDRQ1 Datasheet(PDF) - Texas Instruments

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HVDA551QDRQ1

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HVDA551-Q1 TI1 | Alldatasheet

Document overview

Technical content

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1.4 IO Receiveroutputcurrent(RXD) 20 mA

1.5 VI Voltageinputrange(TXD,STB, S)

2.1 CANH and CANL (3) ±12 kV

2.2 Allpins ±4 kV

2.5 Pulse1 –100 V

2.6 Pulse2a 75 VISO7637 transientsaccordingtoIBEEISO 7637 transients CAN EMC TestSpecification(6)

2.7 Pulse3a –150 V

2.8 Pulse3b 100 V

3.3 VIorVIC Voltageatany bus terminal(separatelyorcommon mode) –12 12 V

3.6 VID Differentialinputvoltage,bus Between CANH and CANL –6 6 V

3.7 IOH High-leveloutputcurrent RXD –2 mA

3.8 IOL Low-leveloutputcurrent RXD 2 mA

10 SubmitDocumentationFeedback Copyright© 2013,Texas InstrumentsIncorporated

ELECTRICAL CHARACTERISTICS

4.8 VHYS(UVVCC) undervoltagedetectionon UV VCC 200 mV

4.10 VHYS(UVVIO) undervoltagedetectionon UV VIO 130 mV

6.16 C O Outputcapacitance See receiverinputcapacitance

12 SubmitDocumentationFeedback Copyright© 2013,Texas InstrumentsIncorporated

8.3 Vhys Hysteresisvoltage(VIT+ – VIT–) 125 mV

8.7 C ID Differentialinputcapacitance HVDA553: TXD atVCC 5 pF

10.4 IIL Low-levelinputcurrent TXD at0 V –100 -7 µA

12.4 IIL Low-levelinputcurrent STB at0 V –20 µA

14.2 IO(STB) Leakage current,standbymode STB atVCC ,–12 V ≤ IO ≤ 12 V –5 5 µA

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14.8 STB at0 V,InputtoTXD at500 kHz, 140

14.9 InputtoTXD at500 kHz, 215

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12 V 6 V 6 V L

6 V 12 V 6 V H

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APPLICATION INFORMATION

HVDA551QDRQ1 specifications and overview.

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