Logic IC

HVDA1040AQDSJRQ1

Texas Instruments

EMC-OPTIMIZED HIGH SPEED CAN TRANSCEIVER

Manufacturer: Texas Instruments

Document: 24 Pages / 764Kb

Request Quote Download Datasheet Read online HTML view

More from Texas Instruments Browse H parts

Online Datasheet

Read HVDA1040AQDSJRQ1 online.

SN65HVDA1040A-Q1 TI1 | Alldatasheet

Document overview

Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 24

Technical content

www.ti.com SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 EMC-OPTIMIZEDHIGHSPEEDCANTRANSCEIVER Check forSamples: SN65HVDA1040A-Q1 1FEATURES APPLICATIONS

GMW3122 Dual-WireCAN PhysicalLayer• QualifiedforAutomotive Applications
SAE J2284 High-Speed CAN forAutomotive• Meets or Exceeds theRequirements of ApplicationsISO 11898-2and -5
SAE J1939 Standard Data Bus Interface• GIFT/ICTCompliant
ISO 11783 Standard Data Bus Interface• ESD Protectionup to±12 kV (Human-Body
NMEA 2000 Standard Data Bus InterfaceModel) on Bus Pins
Low-CurrentStandby Mode With Bus DESCRIPTIONWake-Up, <12 µA Max The SN65HVDA1040A meets or exceeds the• High ElectromagneticCompliance (EMC) specificationsof the ISO 11898 standardforuse in• SPLIT VoltageSource forCommon-Mode applicationsemploying a ControllerArea NetworkStabilizationofBus ViaSplitTermination (CAN). The deviceisqualifiedforuse inautomotive applications.As a CAN transceiver,this device• DigitalInputsCompatible with3.3Vand 5V providesdifferentialtransmitcapabilitytothebus andMicroprocessors differentialreceivecapabilityto a CAN controllerat• Package Options:SOIC and VSON signalingratesup to1 megabitpersecond (Mbps)(1).• ProtectionFeatures – Bus-FaultProtectionof–27 V to40 V – TXD Dominant Time-Out – Thermal Shutdown Protection – Power-Up/Down Glitch-FreeBus Inputsand Outputs – High Bus InputImpedance With Low VCC (1) The signalingrateofa lineisthenumber ofvoltage(IdealPassiveBehavioron Bus When transitionsthataremade persecond,expressedintheunits Unpowered) bps (bitspersecond). FUNCTIONAL BLOCK DIAGRAM Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. PRODUCTION DATA informationiscurrentas ofpublicationdate. © 2010–2011,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

(TOP VIEW) D PACKAGE (TOP VIEW) STB STB1 8 CANHCANH2 7 CANL CANL3 6 SPLIT SPLIT4 5 NC NC TXD TXD GNDGND VCC VCC RXD RXD NC NC SN65HVDA1040A-Q1 SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 www.ti.com This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications. DESCRIPTION (CONTINUED) The deviceisdesignedforoperationin especiallyharsh environmentsand includesmany deviceprotection featuressuch as undervoltagelockout,overtemperaturethermalshutdown,wide common-mode rangeand loss ofgroundprotection.The bus pinsarealsoprotectedagainstexternalcross-wiring,shortsto-27V to40 V and voltagetransientsaccordingtoISO 7637. TERMINAL FUNCTIONS TERMINAL TYPE DESCRIPTIONSOIC VSONNAME NO. NO. TXD 1 1 I CAN transmitdatainput(lowfordominantbus state,highforrecessivebus state) GND 2 2 GND Ground connection VCC 3 3 Supply Transceiver5V supplyvoltageinput RXD 4 4 O CAN receivedataoutput(lowindominantbus state,highinrecessivebus state) SPLIT 5 9 O Common mode stabilizationoutput CANL 6 10 I/O LOW-levelCAN bus line CANH 7 11 I/O HIGH-levelCAN bus line STB 8 12 I Standbymode selectpin(activehigh) NC NA 5,6,7,8 NC No connect ORDERING INFORMATION (1) TA PACKAGE (2) ORDERABLE PART NUMBER TOP-SIDE MARKING –40°C to125°C SOIC – D Reelof2500 SN65HVDA1040AQDRQ1 A1040A –40°C to125°C VSON – DSJ Reelof3000 HVDA1040AQDSJRQ1 A1040A (1) Forthemost currentpackage and orderinginformation,see thePackage OptionAddendum attheend ofthisdocument,orsee theTI web siteatwww.ti.com. (2) Package drawings,thermaldata,and symbolizationareavailableatwww.ti.com/packaging.

2 SubmitDocumentationFeedback © 2010–2011,Texas InstrumentsIncorporated

ProductFolderLink(s):SN65HVDA1040A-Q1

B A: Normal Mode B: Low Power Standby Mode CANH CANL Recessive Dominant Recessive Time, t Typical Bus Voltage Low Power Standby Mode CANL CANH Vdiff Vdiff Normal & Silent Mode SN65HVDA1040A-Q1 www.ti.com SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 FUNCTIONAL DESCRIPTION OperatingModes The devicehas two main operatingmodes: normalmode and standbymode. Operatingmode selectionismade viatheSTB inputpin. Table1.OperatingModes STB PIN MODE DRIVER RECEIVER RXD PIN LOW NORMAL Enabled(On) Enabled(On) MirrorsCAN bus Low-power wake-up receiverand bus Low = wake-up requestreceivedHIGH STANDBY Disabled(Off) monitorenabled(On) High= no wake-up requestreceived Bus Statesby Mode The CAN bus has threevalidstatesduringpowered operationdependingon themode ofthedevice.Innormal mode thebus may be dominant(logicLOW) where thebus linesaredrivendifferentiallyapartorrecessive(logic HIGH) where thebus linesarebiasedtoVCC /2viathehigh-ohmicinternalinputresistorsR IN ofthereceiver.The thirdstateislowpower standbymode where thebus lineswillbe biasedtoGND viathehigh-ohmicinternalinput resistorsR IN ofthereceiver. Figure1.Bus States(PhysicalBitRepresentation) Figure2.SimplifiedCommon Mode Bias and ReceiverImplementation Normal Mode Thisisthenormaloperatingmode ofthedevice.Itisselectedby settingSTB low.The CAN driverand receiver arefullyoperationaland CAN communicationisbi-directional.The driveristranslatinga digitalinputon TXD toa differentialoutputon CANH and CANL. The receiveristranslatingthedifferentialsignalfromCANH and CANL to a digitaloutputon RXD. Inrecessivestatethebus pinsarebiasedto0.5× VCC .Indominantstatethebus pins (CANH and CANL) aredrivendifferentiallyapart.Logichighisequivalenttorecessiveon thebus and logiclowis equivalenttoa dominant(differential)signalon thebus. The SPLIT pinisbiasedto0.5× VCC forbus common mode bus voltagebiasstabilizationinsplittermination networkapplications(seeapplicationinformation). © 2010–2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):SN65HVDA1040A-Q1

Low Power Standby Mode, STB = high RXD Bus VDiff STB tBUS <tBUS tBUStBUS<tBUS <tBUS SN65HVDA1040A-Q1 SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 www.ti.com Standby Mode and RXD Wake-Up Request Thisisthelow power mode ofthedevice.Itisselectedby settingSTB high.The CAN driverand main receiver areturnedoffand bi-directionalCAN communicationisnotpossible.The lowpower receiverand bus monitorare enabledtoallowforwake up requestsviathebus.A wake up requestwillbe outputtoRXD (drivenlow)forany dominantbus transmissionslongerthanthefiltertimetBUS .The localprotocolcontroller(MCU) shouldmonitor RXD fortransitionsand thenreactivatethedevicetonormalmode based on thewake up request.The CAN bus pinsareweaklypulledtoGND and theSPLIT pinisoff(floating). Figure3. Standby Mode Low Power Receiverand Bus MonitorBehavior Driverand ReceiverFunctionTables Table2.DriverFunctionTable(1) INPUTS OUTPUTS BUS STATE TXD STB CANH CANL L L H L Dominant H L Z Z Recessive Open L Z Z Recessive X H orOpen Y Y Recessive (1) H = highlevel,L = lowlevel,X = irrelevant,Y = weak pulldown toGND, ? = indeterminate,Z = high impedance Table3.ReceiverFunctionTable DIFFERENTIAL INPUTS OUTPUTSTB BUS STATEVID = V(CANH) – V(CANL) RXD VID ≥ 0.9V L L Dominant VID ≥ 1.15V H orOpen L Dominant 0.5V < VID < 0.9V X ? ? VID ≤ 0.5V X H Recessive Open X H Recessive

4 SubmitDocumentationFeedback © 2010–2011,Texas InstrumentsIncorporated

ProductFolderLink(s):SN65HVDA1040A-Q1

www.ti.com SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 ProtectionFeatures TXD Dominant StateTimeout Duringnormal mode (onlymode where CAN driverisactive)the TXD dominanttime-outcircuitpreventsthe transceiverfrom blockingnetworkcommunicationineventofa hardwareor softwarefailurewhere TXD isheld dominantlongerthan the timeout periodtDST . The dominanttimeout circuitistriggeredby a fallingedge on TXD. Ifno risingedge isseen beforethe time-outconstantof the circuitexpires(tDST ) the CAN bus driveris disabledfreeingthebus forcommunicationbetween othernetworknodes.The CAN driverisre-activatedwhen a recessivesignalisseen on TXD pin,thusclearingthedominantstatetimeout.The CAN bus pinswillbe biased torecessivelevelduringa TXD dominantstatetime-outand SPLIT willremainon. APPLICATION NOTE: The maximum dominantTXD timeallowedby theTXD Dominant statetimeoutlimitsthe minimum possibledatarateofthedevice.The CAN protocolallowsa maximum ofelevensuccessivedominant bits(on TXD) forthe worstcase,where fivesuccessivedominant bitsare followedimmediatelyby an error frame.This,alongwiththet(dom)minimum, limitstheminimum bitrate.The minimum bitratemay be calculated by: Minimum BitRate = 11/t(dom) Thermal Shutdown Ifthe junctiontemperatureof the deviceexceeds the thermalshutdown thresholdthe devicewillturnoffthe CAN drivercircuits,includingSPLIT pin.Thisconditionisclearedonce thetemperaturedropsbelow thethermal shutdown temperatureofthedevice. UndervoltageLockout /Unpowered Device The devicehas undervoltagedetectionand lockouton theVCC supply.Ifan undervoltageconditionisdetected on VCC ,thedeviceprotectsthebus. The TXD pinispulledup toVCC toforcea recessiveinputlevelifthepinfloats.The STB ispulledup toVCC to forcethedeviceinstandbymode (lowpower)ifthepinfloats. The bus pins(CANH, CANL, and SPLIT)allhave extremelylow leakagecurrentswhen thedeviceisun-powered so itwillnotloaddown thebus butbe an “idealpassive” loadtothebus.Thisiscritical,especiallyifsome nodes ofthenetworkwillbe unpowered whiletherestofthenetworkremainsinoperation. © 2010–2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):SN65HVDA1040A-Q1

V = ½V in normal mode, floating in other modes SPLIT CC VCC SN65HVDA1040A-Q1 SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 www.ti.com ApplicationHints Using With 3.3-VMicrocontrollers The inputlevelthresholdforthedigitalinputpinsofthisdeviceare3.3V compatible,however a few application considerationsmust be takenifusingthisdevicewith3.3-Vmicrocontrollers.Both TXD and STB inputpinshave internalpullup sourcestoVCC .Some microcontrollervendorsrecommend usingan open drainconfigurationon theirI/Opinsinthiscase even thoughthepulluplimitsthecurrent.As such caremust be takenattheapplication levelthatTXD and STB have sufficientpullup tomeet system timingrequirementsforCAN. The internalpullup on TXD especiallymay not be sufficientto overcome the parasiticcapacitancesand allowforadequate CAN timing;thus,an additionalexternalpullupmay be required.Care shouldalsobe takenwiththeRXD pinofthe microcontrolleras thisdevice's RXD outputdrivesthefullVCC range(5V).IfthemicrocontrollerRXD inputpinis not5-V tolerant,thismust be addressedattheapplicationlevel.Otheroptionsincludeusinga CAN transceiver fromTexas InstrumentswithI/Oleveladaptingora 3.3-VCAN transceiver. Using SPLIT With SplitTermination The SPLIT pinvoltageoutputprovides0.5× VCC innormalmode. The circuitmay be used by theapplicationto stabilizedthecommon-mode voltageofthebus by connectingittothecentertapofsplitterminationfortheCAN network(seeFigure17 and Figure4).Thispinprovidesa stabilizingrecessivevoltagedrivetooffsetleakage currentsof un-powered transceiversor otherbias imbalancesthatmight bringthe network common mode voltageaway from 0.5 × VCC . Utilizingthisfeaturein a CAN network improves electromagneticemissions behaviorof the network by eliminatingfluctuationsin the bus common mode voltagelevelsat the startof message transmissions. Figure4. SplitPin StabilizationCircuitryand Application PCB and Thermal ConsiderationsforVSON Package The VSON package versonofthisdevicehas an exposed thermalpad whichshouldbe connectedwithviastoa thermalplane.Even thoughthispad isnotelectricallyconnectedinternallyitisrecommended thattheexposed pad be connectedtotheGND plane.Pleaserefertothemechanicalinformationon thepackage attheend of thisdatasheetand applicationreportSLUA271 "QFN/SON PCB Attachement" formore informationon proper use ofthispackage.

6 SubmitDocumentationFeedback © 2010–2011,Texas InstrumentsIncorporated

ProductFolderLink(s):SN65HVDA1040A-Q1

www.ti.com SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 ABSOLUTE MAXIMUM RATINGS (1)(2) 1.1 VCC Supplyvoltagerange –0.3V to6 V

1.2 Voltagerangeatbus terminals(CANH, CANL, SPLIT) –27 V to40 V

1.3 IO Receiveroutputcurrent 20 mA

1.4 VI Voltageinputrange,ISO 7637 transientpulse(3)(CANH, CANL) –150 V to100 V

1.5 VI Voltageinputrange(TXD,STB) –0.3V to6 V

1.6 TJ Junctiontemperaturerange –40°C to150°C

(1) Stressesbeyond thoselistedunder"absolutemaximum ratings" may cause permanentdamage tothedevice.These arestressratings only,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thoseindicatedunder"recommended operating conditions" isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmay affectdevicereliability. (2) Allvoltagevalues,exceptdifferentialI/Obus voltages,arewithrespecttonetworkgroundterminal. (3) TestedinaccordancewithISO 7637 testpulses1,2,3a,3b perIBEE systemleveltest(Pulse1 = –100 V,Pulse2 = 100 V,Pulse 3a = –150 V,Pulse3b = 100 V).Ifdc may be coupledwithac transients,externallyprotectthebus pinswithintheabsolutemaximum voltagerangeatany bus terminal.Thisdevicehas been testedwithdc bus shortsto+40 V withleadingcommon-mode chokes.If common-mode chokesareused inthesystemand thebus linesmay be shortedtodc,ensurethatthechoke typeand valuein combinationwiththenode terminationand shortingvoltageeitherwillnotcreateinductiveflybackoutsideofvoltagemaximum specificationoruse an externaltransient-suppressioncircuittoprotectthetransceiverfromtheinductivetransients. ELECTROSTATIC DISCHARGE PROTECTION PARAMETER TEST CONDITIONS VALUE

2.1 CANH and CANL (3) ±12 kV

2.2 Human-Body Model(2) SPLIT(4) ±10 kV

2.3 Allpins ±4 kV

Electrostaticdischarge(1) 2.4 Charged-DeviceModel(5) Allpins ±1.5kV

2.5 Machine Model(6) ±200 V

IEC 61000-4-2accordingtoIBEE2.6 CANH and CANL pinstoGND ±7 kVCAN EMC testspecification (1) Alltypicalvaluesat25°C. (2) TestedinaccordanceJEDEC Standard22 TestMethod A114F and AEC-Q100-002. (3) Testmethod based upon JEDEC Standard22 TestMethod A114F and AEC-Q100-002, CANH and CANL bus pinsstressedwith respecttoeach otherand GND. (4) Testmethod based upon JEDEC Standard22 TestMethod A114F and AEC-Q100-002, SPLIT pinstressedwithrespecttoGND. (5) TestedinaccordanceJEDEC Standard22 TestMethod C101D and AEC-Q100-011. (6) TestedinaccordanceJEDEC Standard22 TestMethod A115A and AEC-Q100-003. RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT 3.1 VCC Supplyvoltage 4.75 5.25 V

3.2 VIorVIC Voltageatany bus terminal(separatelyorcommon mode) –12 12 V

3.3 VIH High-levelinputvoltage TXD, STB 2 5.25 V 3.4 VIL Low-levelinputvoltage TXD, STB 0 0.8 V

3.5 VID Differentialinputvoltage –6 6 V

3.6 Driver –70

IOH High-leveloutputcurrent mA

3.7 Receiver(RXD) –2

3.8 Driver 70

IOL Low-leveloutputcurrent mA

3.9 Receiver(RXD) 2

3.10 TA Operatingfree-airtemperaturerange See ThermalCharacteristicstable –40 125 °C

SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 www.ti.com

ELECTRICAL CHARACTERISTICS

overrecommended operatingconditionsincludingoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT Supply

4.1 Standbymode STB atVCC ,VI= VCC 6 12 µA

4.2 ICC 5-V supplycurrent Dominant VI= 0 V,60-Ω load,STB at0 V 50 70

4.3 Recessive VI= VCC ,No load,STB at0 V 6 10

4.4 UV VCC Undervoltageresetthreshold 2.8 4.0 V Device SwitchingCharacteristics Totalloopdelay,driverinputtoreceiveroutput,5.1 td(LOOP1) STB at0 V,See Figure12 90 230 nsrecessivetodominant Totalloopdelay,driverinputtoreceiveroutput,5.2 td(LOOP2) STB at0 V,See Figure12 90 230 nsdominanttorecessive Driver VI= 3 V,STB at0 V,R L = 60 Ω,6.3 VO(R) Bus outputvoltage(recessive) 2 2.5 3 VSee Figure5 and Figure1 STB atVcc,R L = 60 Ω,6.4 VO Bus outputvoltage(standbymode) –0.1 0.1 VSee Figure5 and Figure1 VI= 0 V,R L = 60 Ω,STB at0 V,6.5 1.5 3 VSee Figure5,Figure1,and Figure6 VOD(D) Differentialoutputvoltage(dominant) VI= 0 V,R L = 45 Ω,STB at0 V,6.6 1.4 3See Figure5,Figure1,and Figure6 VI= 3 V,STB at0 V,R L = 60 Ω,6.7 –0.012 0.012 VSee Figure5 and Figure1VOD(R) Differentialoutputvoltage(recessive) 6.8 VI= 3 V,STB at0 V,No load –0.5 0.05 Outputsymmetry (dominantorrecessive)6.9 VSYM STB at0 V,R L = 60 Ω,See Figure16 0.9VCC VCC 1.1VCC V(VO(CANH) + VO(CANL) ) 6.10 VOC(ss) Steady-statecommon-mode outputvoltage STB at0 V,R L = 60 Ω,See Figure11 2 2.5 3 V Change insteady-statecommon-mode output6.11 ΔVOC(ss) STB at0 V,R L = 60 Ω,See Figure11 30 mVvoltage

6.12 VIH High-levelinputvoltage,TXD input 2 V

6.13 VIL Low-levelinputvoltage,TXD input 0.8 V

6.14 IIH High-levelinputcurrent,TXD input VIatVCC –2 2 µA

6.15 IIL Low-levelinputcurrent,TXD input VIat0 V –50 –10 µA

6.16 IO(off) Power-offTXD outputcurrent VCC at0 V,TXD at5 V 1 µA

VCANH = –12 V,CANL open,TXD = low,6.17 –120 –85See Figure14 VCANH = 12 V,CANL open,TXD = low,6.18 0.4 1See Figure14 VCANL = –12 V,CANH open,TXD = low,6.19 –1 –0.6See Figure14Short-circuitsteady-stateoutputcurrent,IOS(ss) mADominant VCANL = 12 V,CANH open,TXD = low,6.20 75 120See Figure14 VCANH = 0 V,CANL open,TXD = low,6.21 -100 -75See Figure14 VCANL = 32 V,CANH open,,TXD = low,6.22 75 125See Figure14 -20V ≤ VCANH ≤ 32 V,CANL open,6.23 -10 10TXD = high,See Figure14Short-circuitsteady-stateoutputcurrent,IOS(ss) mARecessive -20V ≤ VCANL ≤ 32 V,CANH open,6.24 -10 10TXD = high,See Figure14

6.25 C O Outputcapacitance See receiverinputcapacitance

(1) Alltypicalvaluesareat25°C witha 5-V supply.

8 SubmitDocumentationFeedback © 2010–2011,Texas InstrumentsIncorporated

ProductFolderLink(s):SN65HVDA1040A-Q1

www.ti.com SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 ELECTRICAL CHARACTERISTICS (continued) overrecommended operatingconditionsincludingoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT DriverSwitchingCharacteristics 7.1 tPLH Propagationdelaytime,low-to-highleveloutput STB at0 V,See Figure7 25 65 120 ns 7.2 tPHL Propagationdelaytime,high-to-lowleveloutput STB at0 V,See Figure7 25 45 120 ns 7.3 tr Differentialoutputsignalrisetime STB at0 V,See Figure7 25 ns 7.4 tf Differentialoutputsignalfalltime STB at0 V,See Figure7 45 ns Enabletimefromstandbymode tonormalmode7.5 ten See Figure10 10 µsand transmissionofdominant 7.6 t(dom) Dominanttimeout(2) ↓VI,See Figure13 300 450 700 µs Receiver Positive-goinginputthresholdvoltage,high-speed8.1 VIT+ STB at0 V,See Table4 800 900 mVmode Negative-goinginputthresholdvoltage,8.2 VIT– STB at0 V,See Table4 500 650 mVhigh-speedmode

8.3 Vhys Hysteresisvoltage(VIT+ – VIT–) 100 125 mV

8.4 VIT Inputthresholdvoltage,standbymode STB atVCC 500 1150 mV

8.5 VOH High-leveloutputvoltage IO = –2 mA, See Figure9 4 4.6 V 8.6 VOL Low-leveloutputvoltage IO = 2 mA, See Figure9 0.2 0.4 V Power-offbus inputcurrent(unpoweredbus CANH = CANL = 5 V,8.7 II(off) 3 µAleakagecurrent) VCC at0 V,TXD at0 V

8.8 IO(off) Power-offRXD leakagecurrent VCC at0 V,RXD at5 V 20 µA

TXD at3 V,8.9 C I Inputcapacitancetoground(CANH orCANL) 13 pFVI= 0.4sin(4E6πt)+ 2.5V 8.10 C ID Differentialinputcapacitance TXD at3 V,VI= 0.4sin(4E6πt) 6 pF

8.11 R ID Differentialinputresistance TXD at3 V,STB at0 V 30 80 kΩ

8.12 R IN Inputresistance(CANH orCANL) TXD at3 V,STB at0 V 15 30 40 kΩ

Inputresistancematching8.13 R I(m) V(CANH) = V(CANL) –3 0 3 %[1– (RIN (CANH) /R IN (CANL))]× 100% ReceiverSwitchingCharacteristics 9.1 tPLH Propagationdelaytime,low-to-high-leveloutput STB at0 V ,See Figure9 60 90 130 ns 9.2 tPHL Propagationdelaytime,high-to-low-leveloutput STB at0 V ,See Figure9 45 70 130 ns 9.3 tr Outputsignalrisetime STB at0 V ,See Figure9 8 ns 9.4 tf Outputsignalfalltime STB at0 V ,See Figure9 8 ns Dominanttimerequiredon bus forwake-up from9.5 tBUS STB atVCC ,See Figure15 1.5 5 µsstandby STB Pin

10.1 VIH High-levelinputvoltage,STB input 2 V

10.2 VIL Low-levelinputvoltage,STB input 0.8 V

10.3 IIH High-levelinputcurrent STB at2 V –10 0 µA

10.4 IIL Low-levelinputcurrent STB at0.8V –10 0 µA SPLIT Pin 11.1 VO Outputvoltage –500 µA < IO < 500 µA 0.3VCC 0.5VCC 0.7VCC V

11.2 IO(stb) Leakage current,standbymode STB at2 V,–12 V ≤ VO ≤ 12 V –5 5 µA

(2) The TXD dominanttimeout(t(dom))disablesthedriverofthetransceiveronce theTXD has been dominantlongerthant(dom),which releasesthebus linestorecessive,preventinga localfailurefromlockingthebus dominant.The drivermay onlytransmitdominant againafterTXD has been returnedHIGH (recessive).Whilethisprotectsthebus fromlocalfaults,lockingthebus dominant,itlimitsthe minimum dataratepossible.The CAN protocolallowsa maximum ofelevensuccessivedominantbits(onTXD) fortheworstcase, where fivesuccessivedominantbitsarefollowedimmediatelyby an errorframe.This,alongwiththet(dom) minimum, limitstheminimum bitrate.The minimum bitratemay be calculatedby: Minimum BitRate = 11/t(dom) = 11 bits/300 µs = 37 kbps © 2010–2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):SN65HVDA1040A-Q1

SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 www.ti.com THERMAL CHARACTERISTICS overrecommended operatingconditions,TA = –40°C to125°C (unlessotherwisenoted) THERMAL METRIC (1) TEST CONDITIONS MIN TYP MAX UNIT THERMAL METRIC -SOIC 'D ' PACKAGE 12.1-D Low-K thermalresistance(3) 140Junction-to-airthermalθJA resistance(2) 12.2-D High-Kthermalresistance(4) 112 Junction-to-boardthermal12.3-D θJB 50resistance(5) Junction-to-case(top)thermal12.4-D θJC(TOP) 56resistance(6) °C/W Junction-to-case(bottom)12.5-D θJC(BOTTOM) NAthermalresistance(7) Junction-to-top12.6-D ΨJT 13characterizationparameter(8) Junction-to-board12.7-D ΨJB 55characterizationparameter(9) THERMAL METRIC -VSON 'DSJ ' PACKAGE 12.1-DSJ Low-K thermalresistance(3) 290Junction-to-airthermalθJA resistance(2) 12.2-DSJ High-Kthermalresistance(4) 52 Junction-to-boardthermal12.3-DSJ θJB 14resistance(5) Junction-to-case(top)thermal12.4-DSJ θJC(TOP) 56resistance(6) °C/W Junction-to-case(bottom)12.5-DSJ θJC(BOTTOM) 4.5thermalresistance(7) Junction-to-top12.6-DSJ ΨJT 6characterizationparameter(8) Junction-to-board12.7-DSJ ΨJB 19characterizationparameter(9) AVERAGE POWER DISSIPATION AND THERMAL SHUTDOWN VCC = 5 V,TJ = 27°C, R L = 60 Ω,STB at0 V,

12.5 InputtoTXD at500 kHz,50% dutycycle 112

squarewave,C L atRXD = 15 pF PD Averagepower dissipation mWVCC = 5.5V,TJ = 130°C, R L = 45 Ω,STB at 0 V,12.6 170InputtoTXD at500 kHz,50% dutycycle squarewave,C L atRXD = 15 pF Thermalshutdown12.7 185 °Ctemperature (1) Formore informationabouttraditionaland new thermalmetrics,see theIC Package ThermalMetricsapplicationreport,SPRA953 . (2) The junctiontemperature(TJ)iscalculatedusingthefollowingTJ = TA + (PD × θJA).θJAisPCB dependent,bothJEDEC-standardLow-K and High-Kvaluesaregivenas referencepointstostandardizedreferenceboards. (3) The junction-to-ambientthermalresistanceundernaturalconvectionisobtainedina simulationon a JEDEC-standard,Low-K board,as specifiedinJESD51-3,inan environmentdescribedinJESD51-2a. (4) The junction-to-ambientthermalresistanceundernaturalconvectionisobtainedina simulationon a JEDEC-standard,High-Kboard,as specifiedinJESD51-7,inan environmentdescribedinJESD51-2a. (5) The junction-to-boardthermalresistanceisobtainedby simulatinginan environmentwitha ringcoldplatefixturetocontrolthePCB temperature,as describedinJESD51-8. (6) The junction-to-case(top)thermalresistanceisobtainedby simulatinga coldplateteston thepackage top.No specific JEDEC-standardtestexists,buta closedescriptioncan be foundintheANSI SEMI standardG30-88. (7) The junction-to-case(bottom)thermalresistanceisobtainedby simulatinga coldplateteston theexposed (power)pad.No specific JEDEC standardtestexists,buta closedescriptioncan be foundintheANSI SEMI standardG30-88. (8) The junction-to-topcharacterizationparameter,ΨJT,estimatesthejunctiontemperatureofa deviceina realsystemand isextracted fromthesimulationdataforobtainingθJA,usinga proceduredescribedinJESD51-2a (sections6 and 7). (9) The junction-to-boardcharacterizationparameter,ΨJB estimatesthejunctiontemperatureofa deviceina realsystemand isextracted fromthesimulationdataforobtainingθJA ,usinga proceduredescribedinJESD51-2a (sections6 and 7).

10 SubmitDocumentationFeedback © 2010–2011,Texas InstrumentsIncorporated

ProductFolderLink(s):SN65HVDA1040A-Q1

IO(CANH) VOD VI TXD O (CANH)V O (CANL)V IO(CANL) R L OCV O(CANH)V O(CANL)V+ II(S) VI(S) STB II

0 V VOD

330 ±1%/c87 –2 V V 7 V/c163 /c163TEST 330 ±1%/c87 STB CANH CANL V I TXD 90% 10% 0.9□V tPLH 0.5□V VCC/2 VCC/2 VCC 0□V VO(D) VO(R) tPHL tr tf VI VO VO C =□100□pFL R =□60 ±1% L /c87 CANH CANL VIDVI (CANH) +□VI (CANL) 2VIC = VI (CANH) VI (CANL) VO IO RXD SN65HVDA1040A-Q1 www.ti.com SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 PARAMETER MEASUREMENT INFORMATION Figure5. DriverVoltage,Current,and TestDefinition Figure6. DriverVOD TestCircuit Figure7. DriverTestCircuitand VoltageWaveforms Figure8. ReceiverVoltageand CurrentDefinitions © 2010–2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):SN65HVDA1040A-Q1

1.5 V CANH CANL RXDVI (See Note A) STB C = 15 pF ±20%L (See Note B) IO VO VI VO tPLH

0.25 VCC

2 V 2.4 V tPHL

0.75 VCC

90% 10% 3.5 V 1.5 V VOH VOL tr tf DUT TXD STB RXD 15 pF 20%/c177 VO VI

0 V CL

(A) 60 /c87 ±1% CANH CANL

0.5 VCC

(B) VO SN65HVDA1040A-Q1 SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) A. The inputpulseissuppliedby a generatorhavingthe followingcharacteristics:PRR ≤ 125 kHz, 50% dutycycle, tr ≤ 6 ns,tf≤ 6 ns,ZO = 50 Ω. B. C L includesinstrumentationand fixturecapacitancewithin±20%. Figure9. ReceiverTestCircuitand VoltageWaveforms Table4.DifferentialInputVoltageThresholdTest INPUT OUTPUT VCANH VCANL |VID| R –11.1V –12 V 900 mV L 12 V 11.1V 900 mV L VOL –6 V –12 V 6 V L

12 V 6 V 6 V L

–11.5V –12 V 500 mV H 12 V 11.5V 500 mV H –12 V –6 V 6 V H VOH

6 V 12 V 6 V H

A. C L = 100 pF and includesinstrumentationand fixturecapacitancewithin±20%. B. All VI input pulses are suppliedby a generatorhaving the followingcharacteristics:tr or tf ≤ 6 ns, pulserepetitionrate(PRR) = 125 kHz,50% dutycycle. Figure10. ten TestCircuitand Waveforms

ProductFolderLink(s):SN65HVDA1040A-Q1

VO(CANH) VOC(SS)RL VO(CANL) V =OC 2 V + VO(CANH) O(CANL) VOC DUT TXD STB RXD VI (B) CL (A) CANH CANL VO 0.5□VCC0.5□VCC 0.5□VCC VCC 0□V VOH VOL TXD□Input RXD□Output tloop2 tloop1 15□pF□±20% ±1% /c87 STB CANL VI (A) TXD RL = 60 /c87 ±1% CL (B) VOD tdom VI 900 mVVOD 500 mV VCC 0 V VOD(D) 0 V CANH SN65HVDA1040A-Q1 www.ti.com SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 NOTE: AllVIinputpulsesarefrom0 V toVCC and suppliedby a generatorhavingthefollowingcharacteristics:tr ortf ≤ 6 ns, pulserepetitionrate(PRR) = 125 kHz,50% dutycycle. Figure11. Common-Mode Output VoltageTestand Waveforms A. C L = 100 pF and includesinstrumentationand fixturecapacitancewithin±20%. B. AllVIinputpulsesarefrom0 V toVCC and suppliedby a generatorhavingthefollowingcharacteristics:tr ortf ≤ 6 ns, pulserepetitionrate(PRR) = 125 kHz,50% dutycycle. Figure12. t(LOOP) TestCircuitand Waveforms A. AllVIinputpulsesarefrom0 V toVCC and suppliedby a generatorhavingthefollowingcharacteristics:tr ortf ≤ 6 ns, pulserepetitionrate(PRR) = 500 Hz,50% dutycycle. B. C L = 100 pF includesinstrumentationand fixturecapacitancewithin±20%. Figure13. Dominant Time-Out TestCircuitand Waveforms © 2010–2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):SN65HVDA1040A-Q1

V (see Note A) I 1.5 V CANL CANH VCC STB RXD IO C (see Note B) L VO VOL VOH 1.5 V 3.5 V 400 mV tBUS0.7 µs

2.65 VVI

STB VO(CANH) V = V + VSYM O(CANH) O(CANL) VO(CANL) VI RL SN65HVDA1040A-Q1 SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 www.ti.com Figure14. DriverShort-CircuitCurrentTestand Waveforms A. For VI bitwidth≤ 0.7µs,VO = VOH .For VI bitwidth≥ 5 µs,VO = VOL .VI inputpulsesaresuppliedfroma generator withthefollowingcharacteristics:tr/tf< 6 ns. B. C L = 15 pF and includesinstrumentationand fixturecapacitancewithin±20%. Figure15. tBUS TestCircuitand Waveforms A. AllVI inputpulsesare from 0 V toVCC and suppliedby a generatorhavingthefollowingcharacteristics:tr/tf ≤ 6 ns, pulserepetitionrate(PRR) = 250 kHz,50% dutycycle. Figure16. DriverOutput Symmetry TestCircuit

ProductFolderLink(s):SN65HVDA1040A-Q1

4.3 k/c87 6 V 6 V 6 V

40 V 40 V

4.3 k/c87 2 k/c87 VCC VCC VCC VCC 2 k/c87 Input 10 k/c87 10 k/c87 20 k/c87 CANL CANH Input 10 k/c87 20 k/c87 10 k/c87 VCC VCC VCC SN65HVDA1040A-Q1 www.ti.com SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 EquivalentInputand Output Schematic Diagrams © 2010–2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):SN65HVDA1040A-Q1

V (e.g., TPSxxxx) reg MCU (e.g., TMS470) VSUP SN65HVDA1040A CAN Transceiver VCC VCC SN65HVDA1040A-Q1 SLLS995C –FEBRUARY 2010–REVISED FEBRUARY 2011 www.ti.com

APPLICATION INFORMATION

Figure17. TypicalApplicationUsing SplitTerminationforStabilization

ProductFolderLink(s):SN65HVDA1040A-Q1

www.ti.com 9-Feb-2011 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) HVDA1040AQDSJRQ1 ACTIVE VSON DSJ 12 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN65HVDA1040AQDRQ1 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) HVDA1040AQDSJRQ1 VSON DSJ 12 3000 367.0 367.0 35.0 SN65HVDA1040AQDRQ1 SOIC D 8 2500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 2

Texas InstrumentsIncorporatedand itssubsidiaries(TI)reservetherighttomake corrections,enhancements,improvementsand other changes toitssemiconductorproductsand servicesperJESD46, latestissue,and todiscontinueany productorserviceperJESD48, latest issue.Buyersshouldobtainthelatestrelevantinformationbeforeplacingordersand shouldverifythatsuch informationiscurrentand complete.Allsemiconductorproducts(alsoreferredtohereinas “components”)aresoldsubjecttoTI’s termsand conditionsofsale suppliedatthetimeoforderacknowledgment. TIwarrantsperformanceofitscomponents tothespecificationsapplicableatthetimeofsale,inaccordancewiththewarrantyinTI’s terms and conditionsofsaleofsemiconductorproducts.Testingand otherqualitycontroltechniquesareused totheextentTIdeems necessary tosupportthiswarranty.Exceptwhere mandated by applicablelaw,testingofallparametersofeach component isnotnecessarily performed. TIassumes no liabilityforapplicationsassistanceorthedesignofBuyers’products.Buyersareresponsiblefortheirproductsand applicationsusingTIcomponents.To minimizetherisksassociatedwithBuyers’productsand applications,Buyersshouldprovide adequatedesignand operatingsafeguards. TIdoes notwarrantorrepresentthatany license,eitherexpressorimplied,isgrantedunderany patentright,copyright,mask work right,or otherintellectualpropertyrightrelatingtoany combination,machine,orprocessinwhichTIcomponents orservicesareused.Information publishedby TIregardingthird-partyproductsorservicesdoes notconstitutea licensetouse such productsorservicesora warrantyor endorsementthereof.Use ofsuch informationmay requirea licensefroma thirdpartyunderthepatentsorotherintellectualpropertyofthe thirdparty,ora licensefromTIunderthepatentsorotherintellectualpropertyofTI. ReproductionofsignificantportionsofTIinformationinTIdatabooks ordatasheetsispermissibleonlyifreproductioniswithoutalteration and isaccompaniedby allassociatedwarranties,conditions,limitations,and notices.TIisnotresponsibleorliableforsuch altered documentation.Informationofthirdpartiesmay be subjecttoadditionalrestrictions. ResaleofTIcomponents orserviceswithstatementsdifferentfromorbeyond theparametersstatedby TIforthatcomponent orservice voidsallexpressand any impliedwarrantiesfortheassociatedTIcomponent orserviceand isan unfairand deceptivebusinesspractice. TIisnotresponsibleorliableforany such statements. Buyeracknowledgesand agreesthatitissolelyresponsibleforcompliancewithalllegal,regulatoryand safety-relatedrequirements concerningitsproducts,and any use ofTIcomponents initsapplications,notwithstandingany applications-relatedinformationorsupport thatmay be providedby TI.Buyerrepresentsand agreesthatithas allthenecessaryexpertisetocreateand implementsafeguardswhich anticipatedangerousconsequencesoffailures,monitorfailuresand theirconsequences,lessenthelikelihoodoffailuresthatmightcause harm and takeappropriateremedialactions.BuyerwillfullyindemnifyTIand itsrepresentativesagainstany damages arisingoutoftheuse ofany TIcomponents insafety-criticalapplications. Insome cases,TIcomponents may be promotedspecificallytofacilitatesafety-relatedapplications.Withsuch components,TI’s goalisto helpenablecustomerstodesignand createtheirown end-productsolutionsthatmeet applicablefunctionalsafetystandardsand requirements.Nonetheless,such components aresubjecttotheseterms. No TIcomponents areauthorizedforuse inFDA ClassIII(orsimilarlife-criticalmedicalequipment)unlessauthorizedofficersoftheparties have executeda specialagreementspecificallygoverningsuch use. OnlythoseTIcomponents whichTIhas specificallydesignatedas militarygradeor“enhanced plastic”aredesignedand intendedforuse in military/aerospaceapplicationsorenvironments.Buyeracknowledgesand agreesthatany militaryoraerospaceuse ofTIcomponents whichhave not been so designatedissolelyattheBuyer's risk,and thatBuyerissolelyresponsibleforcompliancewithalllegaland regulatoryrequirementsinconnectionwithsuch use. TIhas specificallydesignatedcertaincomponents whichmeet ISO/TS16949 requirements,mainlyforautomotiveuse.Components which have notbeen so designatedareneitherdesignednorintendedforautomotiveuse;and TIwillnotbe responsibleforany failureofsuch components tomeet such requirements. Products Applications Audio www.ti.com/audio Automotiveand Transportationwww.ti.com/automotive Amplifiers amplifier.ti.com Communicationsand Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP ® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energyand Lighting www.ti.com/energy Clocksand Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space,Avionicsand Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Videoand Imaging www.ti.com/video RFID www.ti-rfid.com OMAP ApplicationsProcessors www.ti.com/omap TIE2E Community e2e.ti.com WirelessConnectivity www.ti.com/wirelessconnectivity MailingAddress:Texas Instruments,PostOfficeBox 655303,Dallas,Texas 75265 Copyright© 2012,Texas InstrumentsIncorporated

Product Information