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Document overview

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Technical content

Features

  • High Output Voltage 80V
  • High-speed 5 MHz at 5 V DD
  • Low-power I BB ≤ 0.1 mA (All High)
  • Active Pull-down 100 µA Minimum at 25°C
  • Output Source Current 25 mA at 60V V BB
  • 10-channel Display Driver
  • High-speed Serially-shifted Data Input
  • 5V CMOS-compatible Inputs
  • Latches on all Driver Outputs
  • Pin-compatible Replacement for UCN5810A, TL 4810A and TL4810B

Applications

  • High-speed Dot Matrix Print Head Driver
  • Vacuum Fluorescent Display (VFD) Driver General Description The HV6810 is a monolithic integrated circuit designed to drive a dot ma trix or segmented VFD. These devices feature a serial data output to cascade additional devices for large displays. A 10-bit data word is serially loaded into the shift regi ster on the positive-going transition of the clock. Parallel data are transferred to the output buffers through a 10-bit D-type latch while the latch enable input is high. The data are latched when the latch enable is low. When the blanking input is high, all of the outputs are low. Outputs are structures formed by double-diffused MOS (DMOS) tra nsistors with output voltage ratings of 80V and 25 mA source-current capability. All inputs are compatible with CMOS levels. Package Type See Table 2-1 for pin information. 20-lead SOW (Top view) 1 20 10-Channel Serial-Input Latched Display Driver
  • 

6 Stages

(Q3 thru Q8 not shown Serial Out     VBB HV6810 DS20005626A-page 2  2016 Microchip Technology Inc. Functional Block Diagram

 2016 Microchip Technology Inc. DS20005626A-page 3 HV6810

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings† (Note 1) Continuous Total Power Dissipation at 25°C Free-air Temperature: † Notic e: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. Note 1: O ver operating free-air temperature 2: All volt ages are referenced to VSS. 3: Fo r operations above 25°C ambient, derate linearly to 85°C at 15 mW/°C. RECOMMENDED OPERATING CONDITIONS Parameter Sym. Min. Typ. Max. Unit Conditions Logic Supply Voltage VDD 4.5 — 5.5 V High Supply Voltage VBB 20 — 80 V Supply Voltage VSS — 0 — V High-level Input Voltage  (for VDD = 5V) VIH 3.5 — 5.3 V Low-level Input Voltage VIL –0.3 — 0.8 V Continuous High-level Q Output  Current IOH 25 — — mA Clock Frequency fCLK — — 5 MHz Operating Ambient Temperature TA –40 — +85 °C DC ELECTRICAL CHARACTERISTICS Electrical Specifications: VDD = 5V, VBB = 60V, VSS = 0V and TA = 25°C unless otherwise noted. Parameter Sym. Min. Typ. Max Unit Conditions High-level Output Voltage Q Outputs VOH 57.5 58 — V IO = +25 mA Serial Output 4 4.5 — VDD = +4.5V, IOL = +100 µA Low-level Output Voltage Q Outputs VOL — 0.15 1 V IO = –100 µA, blanking input at VDD Serial Output — 0.05 0.1 VDD = +4.5V, IO = –100 µA Low-level Q Output Current  (Pull-down Current) IOL 60 80 — µA TA = Max, VOL = +0.7V (Note 1) Off-state Output Current IO(OFF) — –1 –15 µA VO = 0V, blanking input at VDD (Note 1) High-level Input Current IIH — — 1 µA VlN = VDD Supply Current from VDD (Standby) IDD — 10 50 µA All inputs at 0V, one Q output high — 10 50 All inputs at 0V, all Q outputs low Note 1: All typ ical values are at TA = 25°C except for IOL and IO(OFF).

DS20005626A-page 4  2016 Microchip Technology Inc. Supply Current from VBB IBB — 0.05 0.1 mA All outputs low, all Q outputs open — 0.05 0.1 All outputs high, all Q outputs open AC ELECTRICAL CHARACTERISTICS Electrical Specifications: Timing requirements are over the recommended operating conditions. Parameter Sym. Min. Typ. Max Unit Conditions Pulse Duration, Clock High tW(CKH) 100 — — ns Pulse Duration, Latch Enable High tW(LEH) 100 — — ns Setup Time, Data before Clock tSU(D) 50 — — ns Hold Time, Data after Clock tH(D) 50 — — ns Delay Time, Clock to Latch Enable High tCKH-LEH 50 — — ns Propagation Delay Time, Latch Enable to Output tPD — 300 — ns Note 1 Note 1: Switching characteristics, VBB = 60V, TA = 25°C TEMPERATURE SPECIFICATIONS Parameter Sym. Min. Typ. Max. Unit Conditions TEMPERATURE RANGE Operating Ambient Temperature TA –40 — +85 °C PACKAGE THERMAL RESISTANCE 20-lead SOW JA — 66 — °C/W DC ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: VDD = 5V, VBB = 60V, VSS = 0V and TA = 25°C unless otherwise noted. Parameter Sym. Min. Typ. Max Unit Conditions Note 1: All typical values are at TA = 25°C except for IOL and IO(OFF).

 2016 Microchip Technology Inc. DS20005626A-page 5 HV6810 Switching Waveforms tW(CKH) 50% 50% VIH VIL VIH VIL Valid 50% 50% Data Clock tH(D)tSU(D) 50% 50% 50% tCKH-LEH Valid Valid90% Clock Input Latch Enable Q Output tPD tW(LEH) Input Timing VIH VIL VIH VIL VOH VOL Output Switching Timing Timing Diagram VALID IRRELEVANT INVALID VALID PREVIOUSLY STORED DATA NEW DATA VALID VALID Clock Data In SR Contents Latch Enable Latch

Contents

DS20005626A-page 6  2016 Microchip Technology Inc.

2.0 PIN DESCRIPTION

The details on the pins of HV6810 are listed on Table 2-1. Refer to Package Type for the location of pin TABLE 2-1: PIN FUNCTION TABLE Pin Number Pin Name Description 1 Q8 High-voltage output2 Q7 3 Q6 4 CLOCK Input data are shifted into the data shift register on the positive edge of the clock.

5 VSS Usually VSS = 0V; ground connection

6 N/C No connection

7 VDD Low-voltage power supply

8 LE (STROBE) When LE is high, the shift register output is latche d to Q output. When LE stays high, the latches are in Transparent mode. 9 Q5 High-voltage output 10 Q4 11 Q3 12 Q2 13 Q1

14 BLANKING When blanking is high, all Q's are forced to a Lo w state regardless of data in each

channel.

15 DATA IN Input data for the input shift register

16 VBB High-voltage power supply

17 SERIAL DATA

OUT Output data from the shift register

18 N/C No connection

19 Q10 High-voltage output20 Q9

 2016 Microchip Technology Inc. DS20005626A-page 7 HV6810

3.0 FUNCTIONAL DESCRIPTION

Follow the steps below to power up and power down the HV6810. POWER-UP AND POWER-DOWN SEQUENCE 1 Power-up Power-down Step Description Step Description 1 Connect ground VSS. 1 Remove VBB. 2 Apply VDD. 2 Remove all inputs. 3 Set all inputs (Data, CLK, Enable, etc.) to a kno wn state. 3 Remove VDD.  4 Apply VBB. 4 Disconnect ground VSS. Note 1: Th e VBB should not drop below VDD or float during operation. FUNCTION TABLE 1 Serial Data Input Clock Inp ut Shift Register Contents Serial Dat a Output LE St robe Input Latch Contents Blanking Inpu t Output Contents — — Note 1: L = Low logic level H = High logic level X = Don’t care  P = Present state R = Previous state VDD DATA INPUT VSS Input Equivalent Circuit VDD GND DATA OUT VSS Q Logic Data Output VBB High Voltage Output FIGURE 3-1: Input and Output Equivalent Circuits.

DS20005626A-page 8  2016 Microchip Technology Inc.

4.0 PACKAGE MARKING INFORMATION

4.1 Packaging Information

Legend: XX...X Product Code or Cust omer-specific information Y Year code (last digit of calendar year)  YY Year code (last 2 digits of calendar year)  WW Week code (week of January 1 is week ‘01’)  NNN Alphanumeric traceability code  Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part num ber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. 20-lead SOW Example HV6810WG e3 1624965 XXXXXXX e3 YYWWNNN

20-Lead SOW (Wide Body) Package Outline (WG) 12.80x7.50mm body, 2.65mm height (max), 1.27mm pitch Symbol A A1 A2 b D E E1 e h L L1 L2 șș Dimension (mm) MIN 1.27 BSC 0.25 0.40 1.40 REF 0.25 BSC 0O 5O JEDEC Registration MS-013, Variation AC, Issue E, Sep. 2005. 7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ Drawings are not to scale. D Seating Plane Gauge Plane L Top View Side View View A - A View B View B θ E1 E A A2 A A Seating Plane e b h h Note 1 Note 1 (Index Area 0.25D x 0.75E1) Note: 1. $ 3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEH DPROGHGPDUNLGHQWL¿HU DQHPEHGGHGPHWDOPDUNHU RU a printed indicator.  2016 Microchip Technology Inc. DS20005626A-page 9 HV6810

DS20005626A-page 10  2016 Microchip Technology Inc. NOTES:

 2016 Microchip Technology Inc. DS20005626A-page 11 HV6810 APPENDIX A: REVISION HISTORY Revision A (October 2016)

  • Converted Supertex Doc# DSFP- HV6810 to Microchip DS20005626A
  • Removed the PJ package option
  • Changed the quantity of the WG package from 1000/Reel to 1600/Reel
  • Made minor text changes throughout the docu - ment

DS20005626A-page 12  2016 Microchip Technology Inc. PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Example: a) HV6810WG-G: 10-Channel Serial-Input Latched Dis- play Driver, 20-lead SOIC, 1600/Reel for a WG Package  PART NO. Device Device: HV6810 = 10-Channel Serial-Input Latched Display Driver Package: WG = 20-lead SOIC Environmental: G = Lead (Pb)-free/RoHS-compliant Package Media Type: (blank) = 1600/Reel for a WG Package XX Package - X - X Environmental Media Type Options

 2016 Microchip Technology Inc. DS20005626A-page 13 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application me ets with your specifications. MICROCHIP MAKES NO RE PRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting fr om such use. No licenses are conveyed, implicitly or ot herwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-1003-4 Note the following details of the code protection feature on Microchip devices:

  • Microchip products meet the specification cont ained in their particular Microchip Data Sheet.
  • Microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used in the intended manner and under normal conditions.
  • There are dishonest and possibly illegal meth ods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
  • Microchip is willing to work with the customer who is concerned about the integrity of their code.
  • Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==

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