DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 22
Technical content
Features
- 128 High-Voltage Channels - Up to 80V Operating Output Voltage - 30 mA Peak Output Sink/Source Current - Output Diodes to Ground for Efficient Power Recovery
- Four Separate Shift Registers - Clockwise and Counter-Clockwise Data Shifting via DIR Pin
- 40 MHz Data Rate
Applications
- Inkjet Printer Driver
- Plasma Display Driver
- 3 D P r i n t e r D r i v e r Related Devices
- HV582: 96-Channel Serial to Parallel Converter with Push-Pull Outputs
Description
HV583 is a unipolar, 128-channel low-voltage serial to high-voltage parallel converter with push-pull outputs. This device has been designed for applications requiring multiple high-voltage outputs with current sinking and sourcing capabilities, such as plasma displays and Inkjet printers. The device consists of four parallel 32-bit shift registers, a 128-bit latch and 128 high-voltage outputs. Data can be input at 40 MHz or up to 25 MHz when cascaded in a multiple device configuration. HV583 is offered in a 169-ball 10 x 10 x 1.1 mm TFBGA package. Package Type HV583 10x10x1.1 mm TFBGA* Bottom View * See Section Section 2.0 “Package Pin Configurations and Function Description”. 8765491013 12 11 3 2 1 H G F E D J K N M L C B A 128-Channel Serial to Parallel Converter with Push-Pull Outputs
DS20005461A-page 2 2015 Microchip Technology Inc. Block Diagram 32-Bit Shift Register 128-Bit Latch 32-Bit Shift Register 32-Bit Shift Register 32-Bit Shift Register VDD VPP HVOUT0 HVOUT127 D124 D125 D126 D127 Q124 Q125 Q126 Q127 PGNDDGND D1B D1A D2B D2A D3B D3A D4B D4A CLK RST LE OH OL OE DIR
2015 Microchip Technology Inc. DS20005461A-page 3 HV583
1.0 ELECTRICAL
Absolute Maximum Rating† †Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device is ESD sensitive. Use appropriate ESD precautions. RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min. Typ. Max. Units Conditions High-Voltage Supply V PP 15 - 80 V Low-Voltage Supply V DD 4.5 5.0 5.5 V HVOUT Peak Output Current I OUT -30 - 30 mA VPP Power Supply Slew Rate SR - - 8.0 V/ μs Clock Frequency f CLK - - 40 MHz Data Read - - 25 MHz Cascaded Devices TABLE 1-1: POWER SEQUENCES Sequence Type Steps Power- Up Sequence 1. Connect Ground. 2. Apply V DD. 3. Set All Inputs (Data, CLK, etc.) to a known state. 4. Apply V PP Power- Down Sequence Repeat the Power-Up sequence in reverse order. DC ELECTRICAL CHARACTERISTICS Electrical specifications: Unless otherwise specified, TA =T J =+ 2 5 ° C , VDD = 5.0V and VPP =8 0 V . Parameter Symbol Min. Typ. Max. Units Conditions VPP Quiescent Supply Current I PPQ ——1 0 μA VDD Quiescent Supply Current I DDQ ——1 0 μA High-Level Output Voltage HV OH 73 76 — V I OUT =1 5m A , VPP =8 0 V 10 — — I OUT =1 0m A , VPP =2 0 V Output P-Channel Body Diode HV OHD — — 81.5 VI OUT =- 3 0m A , VPP =8 0 V (Note 1) Low-Level Output Voltage HV OL —3 . 0 6 . 0 V I OUT =- 1 5m A Output N-Channel Body Diode HV OLD -1.5 — — V I OUT =3 0m A (Note 1) Note 1: Specification is for design guidance only.
DS20005461A-page 4 2015 Microchip Technology Inc. Logic Input High Voltage V IH 2.3 — V DD VV DD = 4.5V to 5.5V Logic Input Low Voltage V IL 0— 0 . 7 V DD = 4.5V to 5.5V Logic Input High Current I IH —— 1 . 0 μAV IH = 5.3V, VDD =5 . 0 V 10 30 60 V IH = 5.0V, for DIR only Logic Input Low Current I IL -1.0 — — V IL =- 0 . 3 V Logic Output High V OH 4.5 — — V I OUT =1 . 0m A Logic Output Low V OL —— 0 . 5 I OUT =- 1 . 0m A AC ELECTRICAL CHARACTERISTICS Electrical specifications: Unless otherwise specified TA =T J =2 5 ° C , VDD = 5.0V and VPP =8 0 V Parameter Symbol Min. Typ. Max. Units Conditions Clock Pulse Width, High and Low(1) twCLK 10 — — ns VDD = 4.5V to 5.5V TJ = -25°C to 125°CLE Pulse Width, High and Low(2) twLE 10 — — Setup Time, DnA/B to CLK(1) tsu1 5— — Setup Time, CLK to LE(1) tsu2 10 — — Setup Time, LE to OL,OH(1) tsu3 25 — — Hold Time, CLK to DnA/B(1) th1 5— — Hold Time, LE to CLK(1) th2 10 — — CLK to DnA/B (High-to-Low) t pdHL ——2 5 C L =1 5p F CLK to DnA/B (Low-to-High) t pdLH ——2 5 C L =1 5p F LE,OL,OH to HVOUTn (High-to-Low) tpHL — — 150 C L =5 0p F LE,OL,OH to HVOUTn (Low-to-High) tpLH Typ-40 tpHL+ tf Typ+40 C L =8 0p F OE to HVOUTn (High-to-Low) tpHZL — — 150 C L =5 0p F OE to HVOUTn (Low-to-High) tpLZH Typ-40 tpHL+ tf Typ+40 C L =8 0p F OE to HVOUTn (High-to-Low) tpHZ — — 300 R L = 10K, CL =5 0p F OE to HVOUTn (Low-to-High) t pLZ —— 3 0 0 R L = 10K, CL =5 0p F Rise Time HVOUTnt r —— 1 2 0 C L =5 0p F Fall Time HVOUTnt f —— 1 2 0 C L =5 0p F Note 1: Specification is obtained by characterization and is not 100% tested. 2: Specification is for design guidance only. TEMPERATURE SPECIFICATIONS Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Operating Junction Temperature TJ -25 — +125 °C Storage Temperature TA -40 — +150 °C Package Thermal Resistance Thermal Resistance, 169-Ball TFBGA JA —2 7— ° C / W DC ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical specifications: Unless otherwise specified, TA =T J =+ 2 5 ° C , VDD = 5.0V and VPP =8 0 V . Parameter Symbol Min. Typ. Max. Units Conditions Note 1: Specification is for design guidance only.
2015 Microchip Technology Inc. DS20005461A-page 5 HV583
1.1 Logic Characteristics
TABLE 1-2: SHIFT REGISTER TRUTH TABLE DIR CLK State Direction L or Open Shift DnB to DnA L or Open Hold DnB to DnA H Shift DnA to DnB H Hold DnA to DnB Legend: D= D a t a H= L e v e l H i g h L = Level Low X = Don’t Care Z = High Impedance = Low-to-High Transition = High-to-Low Transition TABLE 1-3: LATCH TRUTH TABLE LE Output State of Latch L to H Latch Execution H to L Hold TABLE 1-4: HV OUTn TRUTH TABLE OE OL OH DnA/DnB HV OUTn LXXXZ HLXXL HHLXH HHHL L HHHHH TABLE 1-5: RESET TRUTH TABLE RST CLK LE Shift Register Latches 0X S h i f t X 0X X L a t c h 1X C l e a r X 1X X C l e a r
DS20005461A-page 6 2015 Microchip Technology Inc. TABLE 1-6: OUTPUT SHIFT OPERATION Input Output DIR Shift Operation D1A = D D1B H D to D124...D0 to D1B D2A = D D2B H D to D125...D1 to D2B D3A = D D3B H D to D126...D2 to D3B D4A = D D4B H D to D127...D3 to D4B D1B = D D1A L or Open D to D0...D124 to D1A D2B = D D2A L or Open D to D1...D125 to D2A D3B = D D3A L or Open D to D2....D126 to D3A D4B = D D4A L or Open D to D3....D127 to D4A
2015 Microchip Technology Inc. DS20005461A-page 7 HV583
1.2 Timing Diagram
50% 50% 50% 50% 50%50%50% 50%50% 50% tsu3 50% 50% 50%50% 90% 10% 90% 10% 10% 90% 90% 10% 50% 50% tpLHtpHZ tpLZ tpLZH tpHZL tpHL tr tf tr 90% 10% 90% 10% tftpHL tpLH= tpHL+ tf CLK DnA/B (input) LE OL, OH OE OE HVOUTn LE, OH, OL DnA/B (output) LE, OH, OL HVOUTn HVOUTn VIH VIL VIH VIL VOH VOL VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL 50% 50% VOH VOL VOL VOH VOH VOL 50%
DS20005461A-page 8 2015 Microchip Technology Inc.
2.0 PACKAGE PIN
This section details the pin designation for the 169-Ball TFBGA package (Figure 2-1). The descriptions of the pins are listed in Table 2-1. FIGURE 2-1: 169-Ball TFBGA Package. 87654 9 10 13 1211321 H G F E D J K N M L C B A HVOUT119 HV OUT121 HV OUT124 HV OUT127 D3A OH RST D4B HV OUT3H V OUT6H V OUT8H V OUT9D1B HVOUT118 HV OUT120 HV OUT123 HV OUT126 D2A OL DIR CLK HV OUT2H V OUT5H V OUT7H V OUT10D2B HVOUT117 HV OUT116 HV OUT122 HV OUT125 D1A D4A OE LE HV OUT1H V OUT4H V OUT11 HV OUT12D3B HVOUT115 HV OUT114 HV OUT113 NC D GND VDD NC V DD HVOUT0H V OUT13 HV OUT14 HV OUT15DGND HVOUT112 HV OUT111 HV OUT110 HV OUT109 P GND PGND PGND PGND HVOUT16 HV OUT17 HV OUT18 HV OUT19PGND HVOUT108 HV OUT107 HV OUT106 HV OUT105 NC P GND PGND PGND HVOUT20 HV OUT21 HV OUT22 HV OUT23NC HVOUT104 HV OUT103 HV OUT102 HV OUT101 V PP VPP VPP VPP HVOUT24 HV OUT25 HV OUT26 HV OUT27VPP HVOUT100 HV OUT99 HV OUT98 HV OUT97 V PP VPP VPP VPP HVOUT28 HV OUT29 HV OUT30 HV OUT31VPP HVOUT96 HV OUT95 HV OUT94 HV OUT93 HV OUT72 HV OUT67 HV OUT62 HV OUT57 HV OUT32 HV OUT33 HV OUT34 HV OUT35HVOUT52 HVOUT92 HV OUT91 HV OUT90 HV OUT77 HV OUT73 HV OUT68 HV OUT63 HV OUT58 HV OUT48 HV OUT36 HV OUT37 HV OUT38HVOUT53 HVOUT89 HV OUT88 HV OUT81 HV OUT78 HV OUT74 HV OUT69 HV OUT64 HV OUT59 HV OUT49 HV OUT45 HV OUT39 HV OUT40HVOUT54 HVOUT87 HV OUT84 HV OUT82 HV OUT79 HV OUT75 HV OUT70 HV OUT65 HV OUT60 HV OUT50 HV OUT46 HV OUT43 HV OUT41HVOUT55 HVOUT86 HV OUT85 HV OUT83 HV OUT80 HV OUT76 HV OUT71 HV OUT66 HV OUT61 HV OUT51 HV OUT47 HV OUT44 HV OUT42HVOUT56 Top View
2015 Microchip Technology Inc. DS20005461A-page 9 HV583 TABLE 2-1: PIN ASSIGNMENT Pin # Name Pin # Name Pin # Name Pin # Name A1 HV OUT86 D5 HV OUT73 H5, H9, K4, K7 NC M8 CLK A2 HV OUT85 D6 HV OUT68 H6, H7, H8, J5, J6, J7, J8, J9 PGND M9 D2B A3 HV OUT83 D7 HV OUT63 H10 HV OUT20 M10 HV OUT2 A4 HV OUT80 D8 HV OUT58 H11 HV OUT21 M11 HV OUT5 A5 HV OUT76 D9 HV OUT53 H12 HV OUT22 M12 HV OUT7 A6 HV OUT71 D10 HV OUT48 H13 HV OUT23 M13 HV OUT10 A7 HV OUT66 D11 HV OUT36 J1 HV OUT112 N1 HV OUT119 A8 HV OUT61 D12 HV OUT37 J2 HV OUT111 N2 HV OUT121 A9 HV OUT56 D13 HV OUT38 J3 HV OUT110 N3 HV OUT124 A10 HV OUT51 E1 HV OUT96 J4 HV OUT109 N4 HV OUT127 A11 HV OUT47 E2 HV OUT95 J10 HV OUT16 N5 D3A A12 HV OUT44 E3 HV OUT94 J11 HV OUT17 N6 OH A13 HV OUT42 E4 HV OUT93 J12 HV OUT18 N7 RST B1 HV OUT87 E5 HV OUT72 J13 HV OUT19 N8 D4B B2 HV OUT84 E6 HV OUT67 K1 HV OUT115 N9 D1B B3 HV OUT82 E7 HV OUT62 K2 HV OUT114 N10 HV OUT3 B4 HV OUT79 E8 HV OUT57 K3 HV OUT113 N11 HV OUT6 B5 HV OUT75 E9 HV OUT52 K5, K9 D GND N12 HV OUT8 B6 HV OUT70 E10 HV OUT32 K6, K8 V DD N13 HV OUT9 B7 HV OUT65 E11 HV OUT33 K10 HV OUT0 B8 HV OUT60 E12 HV OUT34 K11 HV OUT13 B9 HV OUT55 E13 HV OUT35 K12 HV OUT14 B10 HV OUT50 F1 HV OUT100 K13 HV OUT15 B11 HV OUT46 F2 HV OUT99 L1 HV OUT117 B12 HV OUT43 F3 HV OUT98 L2 HV OUT116 B13 HV OUT41 F4 HV OUT97 L3 HV OUT122 C1 HV OUT89 F5, F6, F7, F8, F9, G5, G6, G7, G8, G9 VPP L4 HV OUT125 C2 HV OUT88 F10 HV OUT28 L5 D1A C3 HV OUT81 F11 HV OUT29 L6 D4A C4 HV OUT78 F12 HV OUT30 L7 OE C5 HV OUT74 F13 HV OUT31 L8 LE C6 HV OUT69 G1 HV OUT104 L9 D3B C7 HV OUT64 G2 HV OUT103 L10 HV OUTN1 C8 HV OUT59 G3 HV OUT102 L11 HV OUT4 C9 HV OUT54 G4 HV OUT101 L12 HV OUT11 C10 HV OUT49 G10 HV OUT24 L13 HV OUT12 C11 HV OUT45 G11 HV OUT25 M1 HV OUT118 C12 HV OUT39 G12 HV OUT26 M2 HV OUT120 C13 HV OUT40 G13 HV OUT27 M3 HV OUT123 D1 HV OUT92 H1 HV OUT108 M4 HV OUT126 D2 HV OUT91 H2 HV OUT107 M5 D2A D3 HV OUT90 H3 HV OUT106 M6 OL D4 HV OUT77 H4 HV OUT105 M7 DIR
DS20005461A-page 10 2015 Microchip Technology Inc.
2.1 High-Voltage Output Pins
(HVOUT0 to HVOUT127) These are the high-voltage output channels (Push-Pull).
2.2 High-Voltage Power Supply Pins
(VPP) High-voltage power supply pins for the output channels (HVOUTn).
2.3 No Connection Pins (NC)
NC pins do not have any functionality on the IC. These pins should not be connected.
2.4 High-Voltage Ground Pins (P GND)
High-voltage ground pins provide the reference ground level for the high-voltage output channels.
2.5 Digital Logic Ground Pins (D GND)
Digital Logic Ground pins provide a reference ground level for the low-voltage section of the IC, shift-regis- ters, latches and decoders.
2.6 Logic Power Supply Pins (V DD)
Logic power supply pins for the 32-bit shift registers, 128-bit latch and decoders.
2.7 Data Input/Output Pins
(D1A, D2A, D3A, D4A) Data Input/Output pins are configurable as inputs or outputs for the shift registers depending on the state of the Direction pin (DIR). When DIR is High, pins D1A to D4A are configured as inputs to the data shift registers. When DIR is Low, these pins are configured as outputs of the data shift registers.
2.8 Output Enable Pin (OE)
The Output Enable pin controls the functionality of the high-voltage output channels. When OE is High, all HV OUTn channels are enabled and form a push-pull configuration to operate according to input data, OL or OH configuration states. When OE is Low, all HV OUTn channels are forced to a high- impedance state, regardless of the data stored in the 128-bit latch or the state of the OL and OH pins.
2.9 Latch Enable Pin (LE)
The Latch Enable pin controls the data transfer from the input shift registers to the 128-bit latch and the HVOUTn channels. When LE transitions from Low to High (rising edge), data is transferred from the 128-bit data latch to the HVOUTn output channels. When LE is Low, new data can be clocked into the shift registers.
2.10 Data Input/Output Pins
(D1B, D2B, D3B, D4B) Data Input/Output pins are configurable as inputs or outputs for the shift registers, depending on the state of the Direction pin (DIR). When DIR is Low, pins D1B to D4B are configured as inputs to the data shift registers. When DIR is High, pins are configured as outputs of the data shift registers.
2.11 Output Low Pin (OL )
The Output Low pin sets all high-voltage output chan- nels (HV OUT0 to HV OUT127) to a Low-level state (PGND). When OL is set Low and OE is High, all the HVOUTn chan- nels are forced to a Low-level state (PGND), regardless of the data stored in the 128-bit latch.
2.12 Direction Pin (DIR)
The DIR pin controls the direction of the input data flow for the input registers, whether it is clockwise (DnB to DnA) or counter-clockwise (DnA to DnB). When the DIR pin is set High, data flows from DnA to DnB. When DIR pin is set Low, data flows from DnB to DnA. See Table 1-6 for more information.
2.13 Clock Input Pin (CLK)
This is the Clock Input pin for 32-bit input shift registers.
2.14 Output High Pin (OH )
The Output High pin sets all high-voltage output channels (HVOUT0 to HVOUT127) to a High-level state (VPP). When OH is Low while OE and OL are High, all the HVOUTn channels are forced to a High-level state (VPP), regardless of the data stored in the 128-bit latch. See Table 1-4 for more information.
2.15 Reset Pin (RST)
The RST pin clears shift registers and the 128-bit latch data content when it is set High during the rising edge of the CLK and LE, respectively. See Table 1-5 for more information.
2015 Microchip Technology Inc. DS20005461A-page 11 HV583
3.0 FUNCTIONAL DESCRIPTION
The HV583 is a unipolar, 128-channel low-voltage serial to high-voltage parallel converter. The device consists of four parallel 32-bit shift registers, a 128-bit latch and 128 high-voltage outputs. The four independent shift registers allow data to be updated into the 128-bit latch at four times the speed of a single register, providing a fast update rate for the 128 output channels. The 128-bit latch holds the data for the high-voltage output channels; whether it is a High-level or Low-level state. The flow of the input data can switch direction from clockwise (DnB to DnA) to counter-clockwise (DnA to DnB) by controlling the DIR pin. A reset pin (RST) is provided to clear the contents of the latches. All channels can be set at the same time to a high-impedance state (High Z), Low-level state, or High-level state through the OE, OL and OH pins, respectively. The high-output voltages (HV OUTn) can operate from 15V to 80V with a maximum current source and sink capability of 30 mA.
3.1 Application Information
HV583 is designed for applications requiring multiple high-voltage outputs with current sinking and sourcing capabilities in the range of ±30 mA. Typical applications where the HV583 is utilized are in plasma displays, Inkjet printer drivers and 3D printer drivers. FIGURE 3-1: Typical Application Block Diagram. Low Voltage Shift Register Latches Output Control High Voltage Level Translators and Push-Pull Output Buffers Microprocessor D(1-4)A CLK LE OE OL OH DIR Piezo Element High-Voltage Power Supply Low-Voltage Power Supply HV583 HVOUT0 HVOUT127 DIN(1-4) for Cascading the next HV583 RST D(1-4)B
DS20005461A-page 12 2015 Microchip Technology Inc.
4.0 PACKAGING INFORMATION
4.1 Package Marking Information
Legend: XX...X Product Code or Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. XXXXXXXXXX YYWWNNN XXXXXXXXXX XXXXXXXXXX 169-Ball TFBGA (10 x10 x1.1 mm) Example HV583GA ^^ 1533256
2015 Microchip Technology Inc. DS20005461A-page 13 HV583 B A 0.15 C 0.15 C
0.15 C A B
0.08 C (DATUM B) (DATUM A) C SEATING PLANE TOP VIEW SIDE VIEW BOTTOM VIEW NOTE 1 0.20 C 0.10 C Microchip Technology Drawing C04-377-J Rev C Sheet 1 of 2 169X For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 169-Ball Thin Fine Pitch Ball Grid Array (7G) - 10x10x1.10 mm Body [TFBGA] D D E E e 169X Øb A A2 (Complies with JEDEC Terminal Assignment recommendations)
DS20005461A-page 14 2015 Microchip Technology Inc. Microchip Technology Drawing C04-377-J Rev C Sheet 2 of 2 Number of Terminals Overall Height Ball Diameter Overall Width Mold Cap Thickness Pitch Standoff Units Dimension Limits A b e E N
0.75 BSC
0.35 0.21 0.40 0.32 10.00 MILLIMETERS MIN NOM 169 0.45 1.10 MAX REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Terminal A1 visual index feature may vary, but must be located within the hatched area. Package is saw singulated Dimensioning and tolerancing per ASME Y14.5M 169-Ball Thin Fine Pitch Ball Grid Array (7G) - 10x10x1.10 mm Body [TFBGA] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Overall Length D 10.00 0.50 0.45 0.50 (Complies with JEDEC Terminal Assignment recommendations)
2015 Microchip Technology Inc. DS20005461A-page 15 HV583 RECOMMENDED LAND PATTERN Dimension Limits Units C2Contact Pad Spacing Contact Pitch MILLIMETERS E MAX 9.00 Contact Pad Diameter (X169) b 0.35 Microchip Technology Drawing C04-2377-J Rev C NOM SILK SCREEN C1Contact Pad Spacing 9.00 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M1. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: E Øb 1 23456789 1 0 1 1 1 2 1 3 A B C D E F G H J K L M N 169-Ball Thin Fine Pitch Ball Grid Array (7G) - 10x10x1.10 mm Body [TFBGA] (Complies with JEDEC Terminal Assignment recommendations)
DS20005461A-page 16 2015 Microchip Technology Inc. NOTES:
2015 Microchip Technology Inc. DS20005461A-page 17 HV583 APPENDIX A: REVISION HISTORY Revision A (December 2015)
- Original release of this document.
DS20005461A-page 18 2015 Microchip Technology Inc. NOTES:
2015 Microchip Technology Inc. DS20005461A-page 19 HV583 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office . PART NO. XX-X PackageDevice Device: HV583: Low-Voltage Serial to High-Voltage Parallel Converter with HV Outputs Package: GA-G = Thin Fine Pitch Ball Grid Array - 10 x 10 x 1.1 mm Body, 169-lead (TFBGA) Examples: a) HV583GA-G: 169-Ball 10x10 TFBGA Package
DS20005461A-page 20 2015 Microchip Technology Inc. NOTES:
2015 Microchip Technology Inc. DS20005461A-page 21 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC 32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2015, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-0106-3 Note the following details of the code protection feature on Microchip devices:
- Microchip products meet the specification cont ained in their particular Microchip Data Sheet.
- Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions.
- There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
- Microchip is willing to work with the customer who is concerned about the integrity of their code.
- Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are co mmitted to continuously improvin g the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT S YSTEM CERTIFIED BY DNV == ISO/TS 16949 ==
DS20005461A-page 22 2015 Microchip Technology Inc. AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Austin, TX Tel: 512-257-3370 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Canada - Toronto Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2943-5100 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 China - Dongguan Tel: 86-769-8702-9880 China - Hangzhou Tel: 86-571-8792-8115 Fax: 86-571-8792-8116 China - Hong Kong SAR Tel: 852-2943-5100 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8864-2200 Fax: 86-755-8203-1760 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 ASIA/PACIFIC China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-3019-1500 Japan - Osaka Tel: 81-6-6152-7160 Fax: 81-6-6152-9310 Japan - Tokyo Tel: 81-3-6880- 3770 Fax: 81-3-6880-3771 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 Taiwan - Kaohsiung Tel: 886-7-213-7828 Taiwan - Taipei Tel: 886-2-2508-8600 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Germany - Dusseldorf Tel: 49-2129-3766400 Germany - Karlsruhe Tel: 49-721-625370 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Italy - Venice Tel: 39-049-7625286 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Poland - Warsaw Tel: 48-22-3325737 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Stockholm Tel: 46-8-5090-4654 UK - Wokingham Tel: 44-118-921-5800 Fax: 44-118-921-5820 Worldwide Sales and Service 07/14/15