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Technical content

Features

  • Four Independent High Voltage Amplifiers
  • 219V Output Voltage Swing
  • 1 1 V /s Output Slew Rate
  • 4 1 0 A Maximum Operating Current for High Voltage Supply
  • Wide Operating Close Loop Gain Range: 50 to 100V/V
  • 150 kHz, -3 dB Bandwidth with 15 pF Load
  • AEC-Q100 Qualified
  • TSSOP and TFBGA Packages Application
  • Tunable Laser
  • Micro-Electromechanical Systems (MEMS) Driver
  • Test Equipment
  • Piezoelectric Transducer Driver General Description The HV56264 is an AEC-Q100 rated, Quad High Voltage Amplifier Array integrated circuit. The device operates on a 225V high voltage supply and a 5.0V low voltage supply. Amplifiers input voltage range from 0V to 3.3V and output swing ranges from 1.0V to VPP – 6V with a 3 mA sink/source current capability. The HV56264 is designed for maximum performance with minimal high voltage current. The high voltage current for each amplifier is typically less than 75 A. Related Devices HV264 Packages
  • TSSOP 24L
  • TFBGA 60-Ball Package Types IN1P NC IN1N IN2P IN2N VDD GND IN3P IN3N IN4P IN4N NC HVOUT1 NC NC HVOUT2 NC VPP HVGND HVOUT3 NC HVOUT4 NC NC 321 H G F E D J C B A IN3N GND GND HVGND IN3P GND NC GND HVOUT3 VDD GND NC GND VPP IN2N GND IN2P GND GND HVOUT2 IN1N GND GND IN1P GND GND HVOUT1 TOP VIEW SEE THROUGH IN4P GND GND K IN4N GND GND HVOUT4 L 456789 1 0 1 1 HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND TOP VIEW 24-Lead TSSOP 60-Ball TFBGA Quad High Voltage Amplifier Array

DS20006477B-page 2  2021 Microchip Technology Inc. Block Diagram VIN1P VIN1N VIN2P VIN2N VIN3P VIN3N VIN4P VIN4N VDD VPP HVOUT1 HVOUT2 HVOUT3 HVOUT4 GND HVGND

 2021 Microchip Technology Inc. DS20006477B-page 3 HV56264

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings † TABLE 1-1: RECOMMENDED OPERATING RATINGS POWER SEQUENCE Power-Up Sequence 1. Connect Ground 2. Apply VDD 3. Set all inputs to ground 4. Apply VPP Power-Down Sequence Reverse order of Power-Up Sequence † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. Parameters Sym. Min. Typ. Max. Units Conditions High Voltage Supply V PP 50 — 225 V Low Voltage Supply V DD 4.5 5 5.5 V Inputs for Amplifiers VIN XP ,N 0— 3 . 3 V

DS20006477B-page 4  2021 Microchip Technology Inc. DC ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, VDD = 5.0V, VPP = 225V, TA= TJ= +25°C. Boldface specifications apply over the full operating temperature range of TA= TJ = -40°C to 125°C. Parameters Sym. Min. Typ. Max. Units Conditions VPP Supply Current I PP — — 300 µA All inputs at 0V, RF = 5.36 M R1 = 79.6 k VDD = 5.5V—— 410 VDD Supply Current I DD — —6 . 6 mA All inputs at 0V, RF = 5.36 M R1 = 79.6 k VDD = 5.5V—— 8.3 HVOUT VOH1 Voltage Swing VOH1 VPP-3 —— V VIN = 3.3V RF = 536 k R1 = 7.97 k (Note 1) HVOUT VOH2 Voltage Swing VOH2 VPP-6 —— VIN = 3.3V RF = 5.36 M R1 = 79.6 k HVOUT VOL1 Voltage Swing VOL1 — — 1 VIN = 0V RF = 536 k R1 = 7.97 k (Note 1) HVOUT VOL2 Voltage Swing VOL2 — — 1.7 VIN = 0V RF = 5.36 M R1 = 79.6 k Input Voltage Range V INXP,N 0 VDD-1.5 V Note 2 Input Current into VINXP ,N pins I IN ——5 0 n A VIN = 1V (Note 1) High Voltage Output Offset Voltage HV OS –1.9 — 1.9 V Note 1: Specification is obtained by characterization and is not 100% tested. 2: Design guidance only. AC ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, VDD = 5.0V, VPP = 225V, TA= TJ = +25°C, Boldface specifications apply over the full operating temperature range of TA= TJ = -40°C to 125°C. Parameters Sym. Min. Typ. Max. Units Conditions HVOUT Slew Rate-Rising Edge SR 41 12 0 V/µs Load = 15 pF 10%-90% VIN = 0 to 3.3V Square WaveHV OUT Slew Rate-Falling Edge 4 11 20 Total External Feedback Resistance FB 700k — 7M  External Resistor Network RFB= RF+RI (Note 2) Bandwidth (–3dB) BW 150 — — kHz Load = 15pF VIN= 1.5V DC + 150 mV AC (Note 1) Note 1: Specification is obtained by characterization and is not 100% tested. 2: Design guidance only. 3: Excluding package parasitic capacitance.

 2021 Microchip Technology Inc. DS20006477B-page 5 HV56264 Closed Loop Gain Range A V 50 — 100 V/V External Resistor Network (Note 2) HVOUT Capacitive Load C LOAD 0 — 15 pF (Note 2) (Note 3) Output Referred Noise V N —— 1 0 m V rms Measured at HVOUT, VIN = 0.2V (Note 1) VDD Power Supply Rejection Ratio PSRR1 40 — — dB VDD = 4.5V to 5.5V VPP = 225V, VIN = 0.1V, DC Measurement (Note 1) VPP Power Supply Rejection Ratio PSRR2 60 — — dB VDD = 5V VPP = 50 to 225V, VIN = 0.1V DC Measurement (Note 1) Crosstalk Xtalk — — -80 dB Output Referred. VIN 0 to 3.3V sine wave at 100 Hz with CL = 15 pF (Note 1) AC ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, VDD = 5.0V, VPP = 225V, TA= TJ = +25°C, Boldface specifications apply over the full operating temperature range of TA= TJ = -40°C to 125°C. Parameters Sym. Min. Typ. Max. Units Conditions Note 1: Specification is obtained by characterization and is not 100% tested. 2: Design guidance only. 3: Excluding package parasitic capacitance.

DS20006477B-page 6  2021 Microchip Technology Inc. TEMPERATURE SPECIFICATIONS Electrical Specifications: Unless otherwise specified, VDD = 5.0V, VPP = 225V Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Operating Junction T emperature T J –40 — 125 °C Storage Temperature T S –55 — 150 °C Package Thermal Resistances Thermal Resistance - TSSOP JC —1 1 . 8 —° C / W Note 1 JA —5 5 — ° C / W Thermal Resistance - TFBGA Note 1: 4 Layers FR4 4”X4” PCB JA —4 7 — ° C / W

 2021 Microchip Technology Inc. DS20006477B-page 7 HV56264

2.0 TYPICAL PERFORMANCE CURVES

Note: Unless otherwise indicated: VDD = 5.0V, VPP = 225V, VIN = 0V, RF = 5.36 M, RI = 79.6 kCLOAD = 15 pF. FIGURE 2-1: IDD Variation Over Temperature. FIGURE 2-2: VOH2 Distribution at TA =2 5 ° C . FIGURE 2-3: HVOS Distribution at TA = 25°C. FIGURE 2-4: IPP Variation Over Temperature. FIGURE 2-5: VOL2 Distribution at TA = 25°C. FIGURE 2-6: HVOUT Drift Over Time at TA = 25 °C (VIN = 0.2V). Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

DS20006477B-page 10  2021 Microchip Technology Inc.

3.0 PACKAGE PIN CONFIGURATION AND DESCRIPTION

FIGURE 3-1: TSSOP Pinout. IN1P NC IN1N IN2P IN2N VDD GND IN3P IN3N IN4P IN4N NC HVOUT1 NC NC HVOUT2 NC VPP HVGND HVOUT3 NC HVOUT4 NC NC

 2021 Microchip Technology Inc. DS20006477B-page 11 HV56264 FIGURE 3-2: TFBGA Pinout. 321 H G F E D J C B A IN3N GND GND HVGND IN3P GND NC GND HVOUT3 VDD GND NC GND VPP IN2N GND IN2P GND GND HVOUT2 IN1N GND GND IN1P GND GND HVOUT1 TOP VIEW SEE THROUGH IN4P GND GND K IN4N GND GND HVOUT4 L 456789 1 0 1 1 HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND HVGND

DS20006477B-page 12  2021 Microchip Technology Inc.

3.1 IN1P, IN1N, IN2P, IN2N, IN3P, IN3N,

IN4P, IN4N Input pins Input pins for the amplifiers.

3.2 Low Voltage Supply Input Pin

(VDD) Low voltage supply input pin for the amplifiers.

3.3 High Voltage Positive Supply Input

Pin (VPP) High voltage supply input pin for the amplifiers.

3.4 High Voltage Ground (HVGND)

Ground reference pins for the high voltage amplifiers.

3.5 High Voltage Amplifiers Outputs

(HVOUT4, HVOUT3, HVOUT2, HVOUT1) Amplifiers output pins.

3.6 Ground (GND)

Ground reference for input signals and low voltage supplies. TABLE 3-1: PINOUT CONFIGURATION TSSOP PIN # TFBGA PIN # NAME FUNCTION 1,12,13,14,16,20,22,24 E1,G1 NC No Connection

2 A1 IN1P Amplifier 1 Non-inverting Input

3B 1 IN1N Amplifier 1 Inverting Input 4C 1 IN2P Amplifier 2 Non-inverting Input 5D 1 IN2N Amplifier 2 Inverting Input 6F 1 VDD Low Voltage Supply

7 A2,A3,B2,B3,C2,C3,D2,E2,

F2,G2,H2,J2,J3,K2,K3,L2,L3 GND Ground 8H 1 IN3P Amplifier 3 Non-inverting Input 9J 1 IN3N Amplifier 3 Inverting Input

10 K1 IN4P Amplifier 4 Non-inverting Input

11 L1 IN4N Amplifier 4 Inverting Input

15 L10 HVOUT4 Amplifier 4 Output

17 J11 HVOUT3 Amplifier 3 Output

18 A4,A5,A6,A7,A8,B4,B5,B6,B7,B8,

E5,E6,E7,F5,F6,F7,G6,G10, K4,K5,K6,K7,K8,L4,L5,L6,L7 HVGND High Voltage Ground

19 E11 VPP High Voltage Positive Supply

21 C10 HVOUT2 Amplifier 2 Output

23 A11 HVOUT1 Amplifier 1 Output

 2021 Microchip Technology Inc. DS20006477B-page 13 HV56264

4.0 FUNCTIONAL DESCRIPTION

The HV56264 is a Quad High Voltage Amplifier Array that can operate up to 225V with a source/sink capability of 3 mA. Amplifiers are designed to deliver a

11 V/s typical output slew rate and sustain a 150 kHz

–3 dB Bandwidth for a 15 pF capacitive load. FIGURE 4-1: Functional Block Diagram. VDD Vx 0 to 3.3V VPP RFRI CLOAD

DS20006477B-page 14  2021 Microchip Technology Inc.

5.0 PACKAGING INFORMATION

5.1 Package Marking Information

Legend: XX...X Product Code or Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. 24-Lead TSSOP Example 3825 HV56264 QEX 123 60-Lead TFBGA (6 x 6 mm) Example 3825123 XXXXXXXXXX XXXXXXXXXX YYWWNNN HV56264

 2021 Microchip Technology Inc. DS20006477B-page 15 HV56264 (DATUM B) (DATUM A) Microchip Technology Drawing C04-284A Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 24-Lead Thin Shrink Small Outline Package (QE) - 4.40 mm Body [TSSOP] Supertex Legacy & Micrel Legacy Package BA N TOP VIEW SIDE VIEW VIEW A-A 0.05 C E

0.10 C A-B D

C SEATING PLANE D A 24X b e 2X N

2 TIPS

A A SEE DETAIL B SHEET 2 0.20 C 0.10 C 24X

DS20006477B-page 16  2021 Microchip Technology Inc. Microchip Technology Drawing C04-284A Sheet 2 of 2 REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Pin 1 visual index feature may vary, but must be located within the hatched area. Dimensioning and tolerancing per ASME Y14.5M 24-Lead Thin Shrink Small Outline Package (QE) - 4.40 mm Body [TSSOP] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Supertex Legacy & Micrel Legacy Package H L (L1) DETAIL B T Molded Package Thickness Dimension Limits Mold Draft Angle Top Foot Length Lead Width Molded Package Width Overall Length Overall Width Foot Angle Footprint Standoff Overall Height Lead Pitch Number of Leads 0.750.600.45L

6.40 BSC

1.00 REF

D b 0.19 12° REF D E 0.30 1.00

0.65 BSC

A e 0.05 0.80 0.85 Units N MIN 1.15 0.15 1.20 0.10 MAX T 7.907.807.70 4.504.404.30

 2021 Microchip Technology Inc. DS20006477B-page 17 HV56264 Microchip Technology Drawing C04-2284A 24-Lead Thin Shrink Small Outline Package (QE) - 4.40 mm Body [TSSOP] C E G BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Supertex Legacy & Micrel Legacy Package RECOMMENDED LAND PATTERN Dimension Limits Units Contact Pitch MILLIMETERS E MAX Contact Pad Length (X24) Contact Pad Width (X24) 1.50 0.45 NOM CContact Pad Spacing 5.80 Contact Pad to Center Pad (X20) G1 0.20 SILK SCREEN

DS20006477B-page 18  2021 Microchip Technology Inc. /g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g49/g82/g87/g72/g29 /g25/g19/g16/g37/g68/g79/g79/g3/g55/g75/g76/g81/g3/g41/g76/g81/g72/g16/g51/g76/g87/g70/g75/g3/g37/g68/g79/g79/g3/g42/g85/g76/g71/g3/g36/g85/g85/g68/g92/g3/g11/g36/g46/g36/g12/g3/g16/g3/g25/g91/g25/g91/g20/g17/g21/g19/g3/g80/g80/g3/g3/g37/g82/g71/g92/g3/g62/g55/g41/g37/g42/g36/g64 /g139/g3/g21/g19/g21/g19/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g55/g72/g70/g75/g81/g82/g79/g82/g74/g92/g3/g44/g81/g70/g17 /g54/g75/g72/g72/g87/g3/g20/g3/g82/g73/g3/g21/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g55/g72/g70/g75/g81/g82/g79/g82/g74/g92/g3/g39/g85/g68/g90/g76/g81/g74/g3/g38/g19/g23/g16/g20/g21/g26/g26/g3/g53/g72/g89/g3/g36 /g49/g50/g55/g40/g3/g20 /g19/g17/g20/g19/g38 /g19/g17/g19/g27/g38 /g25/g19/g59 /g11/g39/g36/g55/g56/g48/g3/g36/g12 /g11/g39/g36/g55/g56/g48/g3/g37/g12 /g36/g39 /g37 /g40 /g19/g17/g20/g19/g38 /g19/g17/g20/g19/g38 /g21/g59 /g21/g59 /g55/g50/g51/g3/g57/g44/g40/g58 /g40/g20 /g20/g21 /g36 /g37/g50/g55/g55/g50/g48/g3/g57/g44/g40/g58 /g72 /g49/g50/g55/g40/g3/g20 /g19/g17/g20/g24/g38/g36/g37 /g19/g17/g19/g27/g38 /g38 /g54/g44/g39/g40/g3/g57/g44/g40/g58 /g54/g40/g36/g55/g44/g49/g42 /g51/g47/g36/g49/g40 /g20/g21 /g22/g23 /g24/g25 /g26/g27 /g28/g20 /g19 /g20 /g20 /g37 /g38 /g39 /g40 /g41 /g42 /g43 /g45 /g46 /g47 /g36 /g22/g23/g24/g25/g26 /g27/g28/g20 /g19/g20/g20 /g37 /g38 /g39 /g40 /g41 /g42 /g43 /g45 /g46 /g47 /g36/g20 /g11/g54/g12 /g11/g48/g12 /g36 /g39/g20 /g25/g19/g59/g3/g145/g69

 2021 Microchip Technology Inc. DS20006477B-page 19 HV56264 /g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g49/g82/g87/g72/g29 /g139/g3/g21/g19/g21/g19/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g55/g72/g70/g75/g81/g82/g79/g82/g74/g92/g3/g44/g81/g70/g17 /g53/g40/g41/g29/g3/g53/g72/g73/g72/g85/g72/g81/g70/g72/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g15/g3/g88/g86/g88/g68/g79/g79/g92/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g15/g3/g73/g82/g85/g3/g76/g81/g73/g82/g85/g80/g68/g87/g76/g82/g81/g3/g83/g88/g85/g83/g82/g86/g72/g86/g3/g82/g81/g79/g92/g17 /g37/g54/g38/g29/g3/g37/g68/g86/g76/g70/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g17/g3/g55/g75/g72/g82/g85/g72/g87/g76/g70/g68/g79/g79/g92/g3/g72/g91/g68/g70/g87/g3/g89/g68/g79/g88/g72/g3/g86/g75/g82/g90/g81/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g86/g17 /g49/g82/g87/g72/g86/g29 /g20/g17 /g21/g17 /g22/g17 /g51/g76/g81/g3/g20/g3/g89/g76/g86/g88/g68/g79/g3/g76/g81/g71/g72/g91/g3/g73/g72/g68/g87/g88/g85/g72/g3/g80/g68/g92/g3/g89/g68/g85/g92/g15/g3/g69/g88/g87/g3/g80/g88/g86/g87/g3/g69/g72/g3/g79/g82/g70/g68/g87/g72/g71/g3/g90/g76/g87/g75/g76/g81/g3/g87/g75/g72/g3/g75/g68/g87/g70/g75/g72/g71/g3/g68/g85/g72/g68/g17 /g51/g68/g70/g78/g68/g74/g72/g3/g76/g86/g3/g86/g68/g90/g3/g86/g76/g81/g74/g88/g79/g68/g87/g72/g71 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g76/g81/g74/g3/g68/g81/g71/g3/g87/g82/g79/g72/g85/g68/g81/g70/g76/g81/g74/g3/g83/g72/g85/g3/g36/g54/g48/g40/g3/g60/g20/g23/g17/g24/g48 /g49/g88/g80/g69/g72/g85/g3/g82/g73/g3/g55/g72/g85/g80/g76/g81/g68/g79/g86 /g50/g89/g72/g85/g68/g79/g79/g3/g43/g72/g76/g74/g75/g87 /g37/g68/g79/g79/g3/g58/g76/g71/g87/g75 /g50/g89/g72/g85/g68/g79/g79/g3/g58/g76/g71/g87/g75 /g37/g68/g79/g79/g3/g36/g85/g85/g68/g92/g3/g58/g76/g71/g87/g75 /g54/g88/g69/g86/g87/g85/g68/g87/g72/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86 /g51/g76/g87/g70/g75 /g37/g68/g79/g79/g3/g43/g72/g76/g74/g75/g87 /g56/g81/g76/g87/g86 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g3/g47/g76/g80/g76/g87/g86 /g36/g20 /g36 /g69 /g40/g20 /g54 /g72 /g40 /g49 /g19/g17/g24/g19/g3/g37/g54/g38 /g19/g17/g21/g23/g27/g3/g53/g40/g41 /g19/g17/g21/g26 /g19/g17/g20/g25 /g24/g17/g19/g19/g3/g37/g54/g38 /g25/g17/g19/g19/g3/g37/g54/g38 /g48/g44/g47/g47/g44/g48/g40/g55/g40/g53/g54 /g48/g44/g49/g49/g50/g48 /g25/g19 /g19/g17/g22/g26 /g20/g17/g21/g19 /g19/g17/g21/g25 /g48/g36/g59 /g50/g89/g72/g85/g68/g79/g79/g3/g47/g72/g81/g74/g87/g75 /g37/g68/g79/g79/g3/g36/g85/g85/g68/g92/g3/g47/g72/g81/g74/g87/g75 /g39 /g39/g20 /g25/g17/g19/g19/g3/g37/g54/g38 /g24/g17/g19/g19/g3/g37/g54/g38 /g54/g75/g72/g72/g87/g3/g21/g3/g82/g73/g3/g21/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g55/g72/g70/g75/g81/g82/g79/g82/g74/g92/g3/g39/g85/g68/g90/g76/g81/g74/g3/g38/g19/g23/g16/g20/g21/g26/g26/g3/g53/g72/g89/g3/g36 /g48/g82/g79/g71/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86 /g48 /g19/g17/g24/g22/g3/g53/g40/g41 /g25/g19/g16/g37/g68/g79/g79/g3/g55/g75/g76/g81/g3/g41/g76/g81/g72/g16/g51/g76/g87/g70/g75/g3/g37/g68/g79/g79/g3/g42/g85/g76/g71/g3/g36/g85/g85/g68/g92/g3/g11/g36/g46/g36/g12/g3/g16/g3/g25/g91/g25/g91/g20/g17/g21/g19/g3/g80/g80/g3/g3/g37/g82/g71/g92/g3/g62/g55/g41/g37/g42/g36/g64 /g19/g17/g22/g19 /g177 /g177/g177

DS20006477B-page 20  2021 Microchip Technology Inc. /g53/g40/g38/g50/g48/g48/g40/g49/g39/g40/g39/g3/g47/g36/g49/g39/g3/g51/g36/g55/g55/g40/g53/g49 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g3/g47/g76/g80/g76/g87/g86 /g56/g81/g76/g87/g86 /g38/g21/g38/g82/g81/g87/g68/g70/g87/g3/g51/g68/g71/g3/g54/g83/g68/g70/g76/g81/g74 /g38/g82/g81/g87/g68/g70/g87/g3/g51/g76/g87/g70/g75 /g48/g44/g47/g47/g44/g48/g40/g55/g40/g53/g54 /g19/g17/g24/g19/g3/g37/g54/g38 /g48/g44/g49 /g40 /g48/g36/g59 /g24/g17/g19/g19/g3/g37/g54/g38 /g38/g82/g81/g87/g68/g70/g87/g3/g51/g68/g71/g3/g58/g76/g71/g87/g75/g3/g11/g59/g25/g19/g12 /g59 /g19/g17/g21/g24 /g49/g50/g48 /g38/g20/g38/g82/g81/g87/g68/g70/g87/g3/g51/g68/g71/g3/g54/g83/g68/g70/g76/g81/g74 /g24/g17/g19/g19/g3/g37/g54/g38 /g37/g54/g38/g29/g3/g37/g68/g86/g76/g70/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g17/g3/g55/g75/g72/g82/g85/g72/g87/g76/g70/g68/g79/g79/g92/g3/g72/g91/g68/g70/g87/g3/g89/g68/g79/g88/g72/g3/g86/g75/g82/g90/g81/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g86/g17 /g49/g82/g87/g72/g86/g29 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g76/g81/g74/g3/g68/g81/g71/g3/g87/g82/g79/g72/g85/g68/g81/g70/g76/g81/g74/g3/g83/g72/g85/g3/g36/g54/g48/g40/g3/g60/g20/g23/g17/g24/g48/g20/g17 /g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g49/g82/g87/g72/g29 /g139/g3/g21/g19/g21/g19/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g55/g72/g70/g75/g81/g82/g79/g82/g74/g92/g3/g44/g81/g70/g17 /g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g55/g72/g70/g75/g81/g82/g79/g82/g74/g92/g3/g39/g85/g68/g90/g76/g81/g74/g3/g38/g19/g23/g16/g22/g21/g26/g26/g3/g53/g72/g89/g3/g36 /g54/g44/g47/g46/g3/g54/g38/g53/g40/g40/g49 /g20/g21 /g36 /g37 /g38/g21 /g40 /g25/g19/g16/g37/g68/g79/g79/g3/g55/g75/g76/g81/g3/g41/g76/g81/g72/g16/g51/g76/g87/g70/g75/g3/g37/g68/g79/g79/g3/g42/g85/g76/g71/g3/g36/g85/g85/g68/g92/g3/g11/g36/g46/g36/g12/g3/g16/g3/g25/g91/g25/g91/g20/g17/g21/g19/g3/g80/g80/g3/g3/g37/g82/g71/g92/g3/g62/g55/g41/g37/g42/g36/g64 /g22/g23/g24/g25/g26/g27/g28 /g20 /g19 /g20 /g20 /g38 /g39 /g40 /g41 /g42 /g43 /g45 /g46 /g47 /g42 /g54/g83/g68/g70/g72/g3/g37/g72/g87/g90/g72/g72/g81/g3/g38/g82/g81/g87/g68/g70/g87/g3/g51/g68/g71/g86 /g42 /g19/g17/g21/g24 /g145/g59 /g38/g20

 2021 Microchip Technology Inc. DS20006477B-page 21 HV56264 APPENDIX A: REVISION HISTORY Revision B (January 2021) The following is the list of modifications:

  • Updated the DC Electrical Characteristics table.
  • Minor typographical and layout edits. Revision A (December 2020)
  • Initial Release of this Document.

DS20006477B-page 22  2021 Microchip Technology Inc. NOTES:

 2021 Microchip Technology Inc. DS20006477B-page 23 HV56264 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office . PART NO. /XXX PackageDevice Device: HV56264: Quad High Voltage Amplifier Array Media Type T = 2500/Reel for QEX Package = 3000/Reel for AKA Package Temperature Range: E = -40°C to +125°C (Extended) RoHS Compliant Package: QEX = 24LD TSSOP 6.4x4.4 mm AKA = 60-Ball Count TFBGA 6x6x1.2 mm Option VAO = Automotive Grade Examples: a) HV56264T-E/QEX-VAO: Quad High-Voltage Amplifier Array, Automotive Grade, 24-Lead TSSOP package,

2500 Reel

b) HV56264T-E/AKA-VAO: Quad High-Voltage Amplifier Array, Automotive Grade, 60-Terminal Count TFBGA package, 3000/Reel Temperature Range Tape and Reel Option Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. X(1) -XXX Option

DS20006477B-page 24  2021 Microchip Technology Inc. NOTES:

 2021 Microchip Technology Inc. DS20006477B-page 25 Information contained in this publication is provided for the sole purpose of designing with and using Microchip products. Infor- mation regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS". MICROCHIP MAKES NO REPRESENTATIONS OR WAR- RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFOR- MANCE. IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDI- RECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUEN- TIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THE INFORMATION. Use of Microchip devices in life sup- port and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity, JitterBlocker, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP , SimpliPHY, SmartBuffer, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2021, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-7480-7 Note the following details of the code protection feature on Microchip devices:

  • Microchip products meet the specifications cont ained in their particular Microchip Data Sheet.
  • Microchip believes that its family of products is secu re when used in the intended manner and under normal conditions.
  • There are dishonest and possibly illegal methods being used in at tempts to breach the code protection features of the Microchip devices. We believe that these methods r equire using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Attempts to breach thes e code protection features, most likely, cannot be accomplished without violating Microchip's intellectual property rights.
  • Microchip is willing to work with any customer who is concerned about the integrity of its code.
  • Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of its code. Code protection does not mean that we are guaranteeing the product is "unbreakable". Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.

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