HV5308PJ-B-G

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Document overview

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Technical content

Features

• Processed with High-Voltage CMOS technology
• Low power-level shifting
• Source/sink current minimum 20mA
• Shift register speed 8.0 MHz
• Latched data outputs
• CMOS compatible inputs
• Forward and reverse shifting options
• Diode to V PP allows efficient power recovery

Description

HV5308 and HV5408 are low-voltage serial to high- voltage parallel converters with push-pull outputs. These devices have been designed for use as a driver for AC-electroluminescent displays. HV5308 / HV5408 can also be used in any application requiring multiple output high-voltage, current sourcing, and sinking capabilities such as driving plasma panels, vacuum flu- orescent, or large matrix LCD displays. These devices consist of a 32-bit shift register, 32 latches, and control logic to enable outputs. Data is shifted through the shift register on the low-to-high tran- sition of the clock. HV5308 shifts in the clockwise direction, when viewed fr om the top of the package, and HV5408 shifts in the counter-clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register (32). Operat ion of the shift register is not affected by the LE (latch enable) or the OE (output enable) inputs. Transfer of data from the shift register to the latch occurs when the LE input is high. The data in the latch is retained when LE is low. HV5308 / HV5408 32-Channel, Serial-to-Parallel Converter with High-Voltage Push-Pull Outputs

DS20005425A-page 2  2015 Microchip Technology Inc. Package Type Functional Block Diagram 44-Lead PLCC See Table 2-1 for pin information 44-Lead PQFP 1 446 40 VPP LE OE HVOUT2

28 Additional

 2015 Microchip Technology Inc. DS20005425A-page 3 HV5308 / HV5408 Typical Application Circuit DATA INPUT CLK LE OE HVOUT1 Micro Processor Display Panel Columns Row Driver HVOUT32 Data Input for cascading DATA OUT Low Voltage High Voltage Shift Register Latches Output Contr. Level Translators Push-Pull Output Buffers VPPVDD

DS20005425A-page 4  2015 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

ABSOLUTE MAXIMUM RATINGS† 1: Duty cycle is limited by the total power dissipated in the package. 2: For operation above 25°C ambient derate linearly to maximum operating temperature at 20mW/°C. Note 1: L to H = Low to High; H to L = High to Low. † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

Electrical Specifications: VPP = 60V, VDD = 12V, TA = 25°C Parameter Symbol Min Max Units Conditions DC Characteristics VPP supply current I PP -0 . 5 m A H V OUTPUTS high to low IDD supply current (quiescent) I DDQ - 100 µA All inputs = V DD or GND IDD supply current (operating) I DD -1 5 m A V DD= VDD max, fCLK= 8.0MHz High level logic input current I IH -1 . 0 µ A V IN= VDD Low level logic input current I IL -- 1 . 0 µ A V IN= 0 High level output voltage HVOUT VOH 52 - V IOH= -20mA, -40 to 85°C IOH= -15mA, -55 to 125°C Data out 10.5 - V I O= -100µA Low level output voltage HVOUT VOL -8 . 0 V IOL= 20mA, -40 to 85°C IOL= 15mA, -55 to 125°C Data out - 1.0 V I O= 100µA HV output clamp diode voltage V OC -- 1 . 5 V I OL= -100mA AC Characteristics Clock frequency f CLK - 8.0 MHz --- Clock width, High or Low t WL or tWH 62 - ns --- Setup time before CLK rises t SU 25 - ns --- Hold time after CLK rises t H 10 - ns --- Data output delay after L to H CLK t DLH (Data) - 110 ns C L= 15pF, (Note 1) Data output delay after H to L CLK t DHL (Data) - 110 ns C L= 15pF, (Note 1) LE delay after L to H CLK t DLE 50 - ns ( Note 1) Width of LE pulse t WLE 50 - ns --- LE setup time before L to H CLK t SLE 50 - ns ( Note 1) Delay from LE to HVOUT, L to H t ON - 500 ns ( Note 1) Delay from LE to HVOUT, H to L t OFF - 500 ns ( Note 1)

 2015 Microchip Technology Inc. DS20005425A-page 5 HV5308 / HV5408 TEMPERATURE SPECIFICATIONS Electrical Specifications: Unless otherwise specified, for all specifications TA =TJ = +25°C Parameter Symbol Min Typ Max Units Conditions Temperature Ranges Operating Temperature -40 – 85 °C Storage Temperature -65 – 150 °C Package Thermal Resistances Thermal Resistance, 44-Lead PQFP θja –5 1– ° C / W Thermal Resistance, 44-Lead PLCC θja –3 7– ° C / W

DS20005425A-page 6  2015 Microchip Technology Inc.

2.0 PIN DESCRIPTION

The locations of the pins are listed in Package Type. TABLE 2-1: PIN DESCRIPTION PQFP Pin # HV5308 HV5408 Description 1H V OUT22 HV OUT11 High voltage outputs. High voltage push-pull outputs, which, depending on controlling low voltage data, can drive loads either to GND, or to VPP rail lev- els. 2H V OUT21 HV OUT12 3H V OUT20 HV OUT13 4H V OUT19 HV OUT14 5H V OUT18 HV OUT15 6H V OUT17 HV OUT16 7H V OUT16 HV OUT17 8H V OUT15 HV OUT18 9H V OUT14 HV OUT19

10 HV OUT13 HV OUT20

11 HV OUT12 HV OUT21

12 HV OUT11 HV OUT22

13 HV OUT10 HV OUT23

14 HV OUT9H V OUT24

15 HV OUT8H V OUT25

16 HV OUT7H V OUT26

17 HV OUT6H V OUT27

18 HV OUT5H V OUT28

19 HV OUT4H V OUT29

20 HV OUT3H V OUT30

21 HV OUT2H V OUT31

22 HV OUT1H V OUT32

23 DATA OUT DATA OUT Serial data output. Data output for cascading to the data input of the next device. N/C N/C No connect.25

27 CLK CLK

Input are shifted into the shift register on the positive edge of the clock.

28 GND GND Logic and high voltage ground

29 VPP VPP High voltage power rail. 30 VDD VDD Low voltage logic power rail. 31 LE LE Latch enable input. When LE is High, shift register data is transferred into a data latch. When LE is Low, data is latched, and new data can be clocked into the shift register. 32 DATA IN DATA IN Serial data input. Data needs to be present before each rising edge of the clock.

33 OE OE

Output enable input. When OE is Low, all HV outputs are forced into a Low state, regardless of data in each channel. When OE is High, all HV out- puts reflect data latched. 34 N/C N/C No connect.

 2015 Microchip Technology Inc. DS20005425A-page 7 HV5308 / HV5408

35 HV OUT32 HV OUT1

High voltage outputs. High voltage push-pull outputs, which, depending on controlling low voltage data, can drive loads either to GND, or to VPP rail lev- els.

36 HV OUT31 HV OUT2

37 HV OUT30 HV OUT3

38 HV OUT29 HV OUT4

39 HV OUT28 HV OUT5

40 HV OUT27 HV OUT6

41 HV OUT26 HV OUT7

42 HV OUT25 HV OUT8

43 HV OUT24 HV OUT9

44 HV OUT23 HV OUT10

TABLE 2-1: PIN DESCRIPT ION PQFP (CONTINUED) Pin # HV5308 HV5408 Description TABLE 2-2: PIN DESCRIPTION PLCC Pin # HV5308 HV5408 Description 1H V OUT17 HV OUT16 High voltage outputs. High voltage push-pull outputs, which, depending on controlling low voltage data, can drive loads either to GND, or to V PP rail lev- els. 2H V OUT16 HV OUT17 3H V OUT15 HV OUT18 4H V OUT14 HV OUT19 5H V OUT13 HV OUT20 6H V OUT12 HV OUT21 7H V OUT11 HV OUT22 8H V OUT10 HV OUT23 9H V OUT9H V OUT24

10 HV OUT8H V OUT25

11 HV OUT7H V OUT26

12 HV OUT6H V OUT27

13 HV OUT5H V OUT28

14 HV OUT4H V OUT29

15 HV OUT3H V OUT30

16 HV OUT2H V OUT31

17 HV OUT1H V OUT32

18 DATA OUT DATA OUT Serial data output. Data output for cascading to the data input of the next device. N/C N/C No connect.20

22 CLK CLK

Input are shifted into the shift register on the positive edge of the clock.

23 GND GND Logic and high voltage ground

24 VPP VPP High voltage power rail. 25 VDD VDD Low voltage logic power rail.

26 LE LE

Latch enable input. When LE is High, shift register data is transferred into a data latch. When LE is Low, data is latched, and new data can be clocked into the shift register.

DS20005425A-page 8  2015 Microchip Technology Inc. 27 DATA IN DATA IN Serial data input. Data needs to be present before each rising edge of the clock.

28 OE OE

Output enable input. When OE is Low, all HV outputs are forced into a LOW state, regardless of data in each channel. When OE is High, all HV out- puts reflect data latched. 29 N/C N/C No connect.

30 HVOUT32 HV

High voltage outputs. High voltage push-pull outputs, which, depending on controlling low voltage data, can drive loads either to GND, or to V PP rail lev- els.

31 HVOUT31 HV OUT2

32 HVOUT30 HV OUT3

33 HVOUT29 HV OUT4

34 HVOUT28 HV OUT5

35 HVOUT27 HV OUT6

36 HVOUT26 HV OUT7

37 HVOUT25 HV OUT8

38 HVOUT24 HV OUT9

39 HVOUT23 HV OUT10

40 HVOUT22 HV OUT11

41 HVOUT21 HV OUT12

42 HVOUT20 HV OUT13

43 HVOUT19 HV OUT14

44 HVOUT18 HV OUT15

TABLE 2-2: PIN DESCRIPT ION PLCC (CONTINUED) Pin # HV5308 HV5408 Description

 2015 Microchip Technology Inc. DS20005425A-page 9 HV5308 / HV5408

3.0 FUNCTIONAL DESCRIPTION

Table 3-1 provides functional information about HV5308 / HV5408. Note: H = High level, L = Low level, ↑ = Low-to- High transition Note: H = High level, L = Low level, X= Don’t Care

3.1 Power-Up and Recommended

To power-up HV5308 / HV5408, perform the following power-up sequence: 1. Connect ground 2. Apply V DD 3. Set all inputs (Data, CLK, LE , etc.) to a known state 4. Apply V PP 5. The V PP should not fall below VDD or float during operation. To power-down the device, reverse the steps above. FIGURE 3-1: Input and Output Equivalent Circuits TABLE 3-1: FUNCTIONAL TABLE CLK DATA IN CLK DATA OUT H ↑ H L ↑ L XN o ↑ No change TABLE 3-2: FUNCTIONAL TABLE LE , OE DATA IN LE OE HV OUT X X L All HV OUT= Low X L H Previous latched data HHH H LHH L TABLE 3-3: RECOMMENDED OPERATING CONDITIONS (-40°C to 85°C) Symbol Parameter Min Max Units VDD Logic voltage supply 10.8 13.2 V VPP High voltage supply 8.0 80 V VIH Input high voltage V DD- 2.0 V DD V VIL Input low voltage 0 2.0 V fCLK Clock frequency 0 8.0 MHz VDD DATA INPUT GND VPP GND HVOUT Logic Inputs GND DATA OUT Logic Data Output High Voltage Outputs VDD

DS20005425A-page 10  2015 Microchip Technology Inc. FIGURE 3-2: Switching Waveforms LE HVOUT w/ S/R LOW Data Valid 50% DATA IN CLK DATA OUT tSU tH tWL tWH 50% 50% tDLH tDHL 50% tWLE tDLE tSLE 50% 50% tON 10% 90% 90% 10% tOFF VIH VIL VIH VIL VOH VOL VOH VOL VIH VIL VOH VOL VOH VOL 50% 50% 50% 50% HVOUT w/ S/R HIGH

 2015 Microchip Technology Inc. DS20005425A-page 11 HV5308 / HV5408

4.0 PACKAGING INFORMATION

4.1 Package Marking Information

Legend: XX...X Product Code or Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. 44-lead PLCC Example XXXXXXXXX XXXXXXXXXXX YYWWNNN XXXXXXXXXXX HV5308PJ-B 1530343e3 44-lead PQFP Example XXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN HV5308PG-B 1530343e3

DS20005425A-page 12  2015 Microchip Technology Inc. 44-Lead PQFP Package Outline (PG) 10.00x10.00mm body, 2.35mm height (max), 0.80mm pitch Symbol A A1 A2 b D D1 E E1 e L L1 L2 ș Dimension (mm) 0.80 BSC 0.73 1.95 REF 0.25 BSC JEDEC Registration MO-112, Variation AA-2, Issue B, Sep.1995. 7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ Drawings not to scale. S D # DSPD 44PQFPPG V i C041309 Seating Plane Gauge Plane θL View B View B Seating Plane Top View D E b e Side View A2A Note 1 (Index Area D1/4 x E1/4) Note: 1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEH DPROGHGPDUNLGHQWL¿HU DQHPEHGGHGPHWDOPDUNHU RU a printed indicator.

 2015 Microchip Technology Inc. DS20005425A-page 13 HV5308 / HV5408 44-Lead PLCC Package Outline (PJ) .653x.653in body, .180in height (max), .050in pitch Symbol A A1 A2 b b1 D D1 E E1 e R Dimension (inches) .050 BSC .025 JEDEC Registration MS-018, Variation AC, Issue A, June, 1993. † This dimension differs from the JEDEC drawing. Drawings not to scale. .150 MAX .048/.042 x 45O .075 MAX 6 40 D E1 E Top View Horizontal Side View View B A A2 Seating Plane e b Note 1 (Index Area) .056/.042 x 45O .020max (3 Places) .020 MIN Vertical Side View View B Note 2 Base Plane R Notes: 1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEH DPROGHGPDUNLGHQWL¿HU DQHPEHGGHGPHWDOPDUNHU RU a printed indicator. 2. $FWXDOVKDSHRIWKLVIHDWXUHPD\\YDU\\

DS20005425A-page 14  2015 Microchip Technology Inc. APPENDIX A: REVISION HISTORY Revision A (December 2015)

• Updated file to Microchip format

 2015 Microchip Technology Inc. DS20005425A-page 15 HV5308 / HV5408 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Device: HV5308 = 32-Channel Serial to Parallel Converter, with High-voltage Push-pull Outputs data shifts in clockwise direction HV5408 = 32-Channel Serial to Parallel Converter, with High-voltage Push-pull Outputs data shifts in counter-clockwise direction Package: PG = 44-Lead PQFP PJ = 44-Lead PLCC Version B = Revision B Environmental G = Lead (Pb)-free/ROHS-compliant package Media Type: (blank) = 96/Tray for PG package = 27/Tube for PJ package M903 = 500/Reel for PG package M919 = 500/Reel for PJ package Examples: a) HV5308PG-B-G Clockwise data shift, 44-Lead PQFP pack- age, 96/Tray b) HV5308PG-B-G-M919 Clockwise data shift, 44-Lead PQFP pack- age, 500/Reel c) HV5308PJ-B-G Clockwise data shift, 44-Lead PLCC pack- age, 27/Tube d) HV5308PJ-B-G-M903 Clockwise data shift, 44-Lead PLCC package, 500/Reel e) HV5408PG-B-G Counter-clockwise data shift, 44-Lead PQFP package, 96/Tray f) HV5408PJ-B-G Counter-clockwise data shift, 44-Lead PLCC package, 27/Tube PART NO. X Device X Environmental XX Package Options Media - - Type - X Version

DS20005425A-page 16  2015 Microchip Technology Inc. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application me ets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting fr om such use. No licenses are conveyed, implicitly or ot herwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC 32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial Programming, ICSP , Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2015, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-0073-8 Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification cont ained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal meth ods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==

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