HV2601BD-G-M931

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Document overview

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Technical content

Features

High-Voltage CMOS Technology for High Performance
16-Channel High-Voltage Analog Switch
3.3V Input Logic Level Compatible
20 MHz Data Shift Clock Frequency
Very Low Quiescent Power Dissipation (–10 µA)
Low Parasitic Capacitance
DC to 50 MHz Small Signal Frequency Response
–60 dB Typical OFF-Isolation at 5.0 MHz
CMOS Logic Circuitry for Low Power
Excellent Noise Immunity
Cascadable Serial Data Register with Latches
Flexible Operating Supply Voltages
Integrated Bleed Resistors on the Outputs (HV2701 Only)

Applications

Medical Ultrasound Imaging
NDT Metal Flaw Detection
Piezoelectric Transducer Drivers
Optical MEMS Modules General Description The HV2601/HV2701 devices are low-charge injection, 16-channel, high-voltage analog switch integrated circuits (ICs). These devices are designed for use in applications requiring high-voltage switching controlled by low-voltage control signals, such as medical ultrasound imaging and other piezoelectric transducer drivers. The HV2701 has integrated bleed resistors which eliminate voltage build-up on capacitive loads, such as piezoelectric transducers. These ICs shift input data into a 16-bit shift register that can then be retained in a 16-bit latch. To reduce any possible clock feed-through noise, the latch enable bar should be left high until all bits are clocked in. Data are clocked in during the rising edge of the clock. Using High-Voltage CMOS technology, these devices combine high-voltage, bilateral DMOS switches and low-power CMOS logic to provide efficient control of high-voltage analog signals. The device is suitable for various combinations of high- voltage supplies, e.g., V PP/VNN: +40V/–160V, +100V/–100V, and +160V/–40V. Package Types† †N o t i c e : The LQFP package is not recommended for new designs. Please use TQFP package as an alternative. 42-Ball Bumped Die See Table 2-1 and Table 2-2 for pin information. 48-Lead LQFP (Top View) (Top View) 123 89101213 4567 18 17 16 15 14 2526 2122 2324 1920 4142 3334 3940 3132 3738 2930 3536 2728 48-Lead TQFP (Top View) HV2601/HV2701 Low-Charge Injection, 16-Channel, High-Voltage Analog Switch

DS20005391E-page 2  2015-2022 Microchip Technology Inc. and its subsidiaries Functional Block Diagram Note: Bleed resistors and RGND apply to HV2701 only. D LE CLR Latches Level Shifters Output Switches SW0 SW1 SW2 SW14 SW15 16-Bit Shift Register RGNDVPPVNNCLRLEVDD GND D LE CLR D LE CLR D LE CLR D LE CLR DOUT CLK DIN Bleed Resistors HV2701 only

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 3 HV2601/HV2701

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings† Note 1: Power-up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2: VSIG must be within VNN and VPP or floating during power-up/down transition. 3: Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1 ms. †N o t i c e : Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS (1, 2, 3) Symbol Parameter Value VDD Logic Power Supply Voltage 3.0V to 5.5V VPP Positive High-Voltage Supply +40V to V NN +200V VNN Negative High-Voltage Supply –40V to –160V VIH High-Level Input Voltage 0.9V DD to VDD VIL Low-Level Input Voltage 0V to 0.1 V DD VSIG Analog Signal Voltage Peak-to-Peak V NN + 10V to VPP – 10V TA Operating Free Air Temperature 0°C to 70°C DC ELECTRICAL CHARACTERISTICS Electrical Specifications: Over recommended operating conditions unless otherwise noted. Parameter Symbol 0°C +25°C +70°C Units Conditions Small Signal Switch ON-Resistance RONS —3 0—2 63 8—4 8 Ω ISIG= 5.0 mA VPP= +40V VNN= –160V—2 5—2 22 7—3 2 I SIG= 200 mA —2 5—2 22 7—3 0 I SIG= 5.0 mA VPP= +100V VNN= –100V—1 8—1 82 4—2 7 I SIG= 200 mA —2 3—2 02 5—3 0 I SIG= 5.0 mA VPP= +160V VNN= –40V—2 2—1 62 5—2 7 I SIG= 200 mA Small Signal Switch ON-Resistance Matching ONS — 20 — 5.0 20 — 20 % ISIG= 5.0 mA, VPP = +100V, VNN = –100V Large Signal Switch ON-Resistance RONL ———1 5——— Ω VSIG = VPP – 10V, ISIG = 1.0A

DS20005391E-page 4  2015-2022 Microchip Technology Inc. and its subsidiaries Note 1: See Figure 3-1. Value of Output Bleed Resistor (HV2701 Only) RINT — — 20 35 50 — — k Ω Output Switch to RGND IRINT = 0.5 mA Switch OFF Leakage per Switch ISOL — 5.0 — 1.0 10 — 15 µA VSIG = VPP – 10V and VNN +1 0 V (Note 1) DC Offset Switch OFF VOS — 300 — 100 300 — 300 mV HV2601:100 kΩ load HV2701: no load (Note 1)DC Offset Switch ON — 500 — 100 500 — 500 mV Quiescent VPP Supply Current IPPQ — — — 10 50 — — µA All switches OFF Quiescent VNN Supply Current INNQ — — — –10 –50 — — µA All switches OFF Quiescent VPP Supply Current IPPQ — — — 10 50 — — µA All switches ON, I SW = 5.0 mA Quiescent VNN Supply Current INNQ — — — –10 –50 — — µA All switches ON, I SW = 5.0 mA Switch Output Peak Output Switching Frequency fSW — — — — 50 — — kHz Duty cycle = 50% Average VPP Supply Current IPP mA VPP = +40V VNN = –160V All output switches are turning ON and OFF at 50 kHz with no load. VPP = +100V VPP = +160V Average VNN Supply Current INN mA VPP = +40V VNN = –160V All output switches are turning ON and OFF at 50 kHz with no load. VPP = +100V VPP = +160V Average VDD Supply Quiescent VDD Supply Current IDDQ — 10 — — 10 — 10 µA All logic inputs are static Data Out Source Data Out Sink Logic Input Capacitance CIN —1 0——1 0—1 0 p F DC ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Over recommended operating conditions unless otherwise noted. Parameter Symbol 0°C +25°C +70°C Units Conditions

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 5 HV2601/HV2701 Note 1: See Figure 3-1. AC ELECTRICAL CHARACTERISTICS Electrical Specifications: VDD=5.0V, tR = tF≤5.0 ns, 50% duty cycle, CLOAD = 20 pF, unless otherwise noted. Parameter Symbol 0°C +25°C +70°C Units Conditions Setup Time Before LE Rises tSD 2 5—2 5——2 5—n s Time Width of LE tWLE 56 — — 56 — 56 — ns VDD = 3.0V 12 — — 12 — 12 — V DD = 5.0V Clock Delay Time to Data Out tDO 50 100 50 78 100 50 100 ns VDD = 3.0V 15 40 15 30 40 15 40 V DD = 5.0V Time Width of CLR t WCLR 5 5—5 5——5 5—n s Setup Time Data to Clock tSU 21 — — 21 — 21 — ns VDD = 3.0V Hold Time Data Clock Frequency f CLK —2 0——2 0—2 0 V DD = 5.0V Clock Rise and Fall Times tR,tF —5 0——5 0—5 0 n s Turn ON Time t ON — 5.0 — — 5.0 — 5.0 µs VSIG = VPP – 10V, RLOAD = 10 kΩ (Note 1) Turn OFF Time t OFF — 5.0 — — 5.0 — 5.0 µs VSIG = VPP – 10V, RLOAD = 10 kΩ (Note 1) Maximum VSIG Slew Rate dv/dt —2 0——2 0—2 0 V/ns VPP = +40V, VNN = –160V —2 0——2 0—2 0 V PP = +100V, VNN = –100V —2 0——2 0—2 0 V PP = +160V, VNN = –40V OFF Isolation K O f = 5.0 MHz, 1.0 kΩ//15 pF load (Note 1) –58 — –58 — — –58 — f = 5.0 MHz, 50 Ω load (Note 1) Switch Crosstalk K CR –60 — –60 –70 — –60 — dB f = 5.0 MHz, 50 Ω load (Note 1) Output Switch Isolation Diode Current IID — 300 — — 300 — 300 mA 300 ns pulse width, 2.0% duty cycle (Note 1) OFF Capacitance SW to GND CSG(OFF) 5.0 17 5.0 12 17 5.0 17 pF 0V, f = 1.0 MHz ON Capacitance SW to GND CSG(ON) 25 50 25 38 50 25 50 pF 0V, f = 1.0 MHz Output Voltage Spike mV VPP = +40V, VNN = –160V, RLOAD = 50Ω (Note 1)-VSPK +VSPK ———— 1 5 0 —— VPP = +100V, VNN = –100V, RLOAD = 50Ω (Note 1)-VSPK +VSPK ———— 1 5 0 —— VPP = +160V, VNN = –40V, RLOAD = 50Ω (Note 1)-VSPK Charge Injection QC pC VPP = +40V, VNN = –160V, VSIG = 0V (Note 1) VSIG = 0V (Note 1) VSIG = 0V (Note 1)

DS20005391E-page 6  2015-2022 Microchip Technology Inc. and its subsidiaries

2.0 PIN DESCRIPTION

The locations of the pads/balls are listed in Package Types†. TABLE 2-1: PIN DESCRIPTION: 42-BALL BUMPED DIE PACKAGE Pin # HV2601 HV2701 Description

1 NC RGND No connect/Ground for bleed resistor

2V PP VPP Positive supply voltage 3V NN VNN Negative supply voltage 4D OUT DOUT Data out logic output

5 CLR CLR Latch clear logic input

6 CLK CLK Clock logic input for shift register

7 GND GND Ground

8 SW15A SW15A Analog switch 15 terminal A

9 SW15B SW15B Analog switch 15 terminal B

LE Latch-enable logic input, low active

11 V DD VDD Logic supply voltage

12 SW0A SW0A Analog switch 0 terminal A

13 SW0B SW0B Analog switch 0 terminal B

14 SW14A SW14A Analog switch 14 terminal A

15 SW14B SW14B Analog switch 14 terminal B

IN DIN Data in logic input

17 SW1A SW1A Analog switch 1 terminal A

18 SW1B SW1B Analog switch 1 terminal B

19 SW13A SW13A Analog switch 13 terminal A

20 SW13B SW13B Analog switch 13 terminal B

21 SW2A SW2A Analog switch 2 terminal A

22 SW2B SW2B Analog switch 2 terminal B

23 SW12A SW12A Analog switch 12 terminal A

24 SW12B SW12B Analog switch 12 terminal B

25 SW3A SW3A Analog switch 3 terminal A

26 SW3B SW3B Analog switch 3 terminal B

27 SW11A SW11A Analog switch 11 terminal A

28 SW11B SW11B Analog switch 11 terminal B

29 SW9B SW9B Analog switch 9 terminal B

30 SW8B SW8B Analog switch 8 terminal B

31 SW7A SW7A Analog switch 7 terminal A

32 SW6A SW6A Analog switch 6 terminal A

33 SW4A SW4A Analog switch 4 terminal A

34 SW4B SW4B Analog switch 4 terminal B

35 SW10B SW10B Analog switch 10 terminal B

36 SW10A SW10A Analog switch 10 terminal A

37 SW9A SW9A Analog switch 9 terminal A

38 SW8A SW8A Analog switch 8 terminal A

39 SW7B SW7B Analog switch 7 terminal B

40 SW6B SW6B Analog switch 6 terminal B

41 SW5B SW5B Analog switch 5 terminal B

42 SW5A SW5A Analog switch 5 terminal A

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 7 HV2601/HV2701 TABLE 2-2: PIN DESCRIPTIO N: 48-LEAD LQFP/TQFP Pin # HV2601 HV2701 Description

1 NC NC No connect

2 NC NC No connect

3 SW4B SW4B Analog switch 4 terminal B

4 SW4A SW4A Analog switch 4 terminal A

5 SW3B SW3B Analog switch 3 terminal B

6 SW3A SW3A Analog switch 3 terminal A

7 SW2B SW2B Analog switch 2 terminal B

8 SW2A SW2A Analog switch 2 terminal A

9 SW1B SW1B Analog switch 1 terminal B

10 SW1A SW1A Analog switch 1 terminal A

11 SW0B SW0B Analog switch 0 terminal B

NN VNN Negative supply voltage

14 NC NC No connect

PP VPP Positive supply voltage

16 NC NC No connect

17 GND GND Ground

DD VDD Logic supply voltage

19 D IN DIN Data in logic input

20 CLK CLK Clock logic input for shift register

LE Latch-enable logic input, low active

22 CLR CLR Latch clear logic input

23 D OUT DOUT Data out logic output

24 NC RGND No connect/Ground for bleed resistor

25 SW15B SW15B Analog switch 15 terminal B

26 SW15A SW15A Analog switch 15 terminal A

27 SW14B SW14B Analog switch 14 terminal B

28 SW14A SW14A Analog switch 14 terminal A

29 SW13B SW13B Analog switch 13 terminal B

30 SW13A SW13A Analog switch 13 terminal A

31 SW12B SW12B Analog switch 12 terminal B

32 SW12A SW12A Analog switch 12 terminal A

33 SW11B SW11B Analog switch 11 terminal B

34 SW11A SW11A Analog switch 11 terminal A

35 NC NC No connect

36 NC NC No connect

37 SW10B SW10B Analog switch 10 terminal B

38 SW10A SW10A Analog switch 10 terminal A

39 SW9B SW9B Analog switch 9 terminal B

40 SW9A SW9A Analog switch 9 terminal A

41 SW8B SW8B Analog switch 8 terminal B

42 SW8A SW8A Analog switch 8 terminal A

43 SW7B SW7B Analog switch 7 terminal B

44 SW7A SW7A Analog switch 7 terminal A

DS20005391E-page 8  2015-2022 Microchip Technology Inc. and its subsidiaries

45 SW6B SW6B Analog switch 6 terminal B

46 SW6A SW6A Analog switch 6 terminal A

47 SW5B SW5B Analog switch 5 terminal B

48 SW5A SW5A Analog switch 5 terminal A

TABLE 2-2: PIN DESCRIPTION: 48 -LEAD LQFP/TQFP (CONTINUED) Pin # HV2601 HV2701 Description

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 9 HV2601/HV2701

3.0 DETAILED DESCRIPTION

3.1 Application Information

FIGURE 3-1: Test Circuits. RGND RGND RGND RGND RGND RGND RGND DC Offset Switch ON/OFF VPP 5V VNN VPP VNN VDD GND VOUT TON/TOFF Test Circuit GND VPP -10V 10kΩ VOUT Output Switch Isolation Diode Current IID GND VNN VSIG Switch Crosstalk VIN = 10VP-P @5MHz NC GND 50Ω Output Voltage Spike GND VOUT 1kΩ RLOAD 50Ω +VSPK –VSPK OFF Isolation KO = 20Log VOUT VIN VIN = 10VP-P @5MHz GND VOUT 50Ω RLOAD RLOAD VPP VNN VPP VNN VDD VPP VNN VPP VNN VDD VPP VNN VPP VNN VDD VPP VNN VPP VNN VDDVPP VNN VPP VNN VDD KCR = 20Log VOUT VIN VPP -10V Switch Off Leakage per Switch RGNDOpen Q = 1000pF x ΔVOUT Charge Injection GND VPP VNN VPP VNN VDD VPP 5V VNN VPP VNN VDD Open ISOL GND VOUT ΔVOUT 1000pF VSIG RLOAD (HV2601 only)

DS20005391E-page 10  2015-2022 Microchip Technology Inc. and its subsidiaries Note 1: The 16 switches operate independently. 2: Serial data is clocked in on the L to H transition of the CLK. 3: All 16 switches go to a state retaining their latched condition at the rising edge of LE . When LE is low, the shift registers data flow through the latch. 4: DOUT is high when data in the shift register 15 are high. 5: Shift registers clocking has no effect on the switch states if LE is high. 6: The CLR clear input overrides all other inputs. FIGURE 3-2: Logic Timing Waveforms. TABLE 3-1: LOGIC FUNCTION TABLE ... ... —L L O F F — ... ... X X X X X X X H L HOLD PREVIOUS STATE X X X X X X X X H ALL SWITCHES OFF DATA IN DIN LE CLOCK CLK DATA OUT DOUT OFF VOUT (typ) ON CLR 50% 50% 50% 50% tWLE tSD tSU th 50% 50% tOFF 50% tDO DO tON tWCL DN+1 DN DN-1 50%50% 90% 10%

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 11 HV2601/HV2701

4.0 PACKAGING INFORMATION †

4.1 Package Marking Information

†N o t i c e : The LQFP package is not recommended for new designs. Please use TQFP package as an alternative. Legend: XX...X Product Code or Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part nu mber cannot be marked on one line, it will be carried over to the next line, th us limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. XXXXXXX XXXXX^^ YYWWNNN HV2601 BD^^ 2126256 HV2701 BD^^ 2126256 XXXXXX XXXXXX ^^YYWW NNN HV 2601FG ^^2126 256 HV 2701FG ^^2126 256 XXXXXX XXXXXX YYWWNNN HV 2601TQ 2126256 HV 2701TQ 2126256 48-Lead TQFP Example Example 48-Lead LQFP Example Example 42-Ball Bumped Die Example Example

DS20005391E-page 12  2015-2022 Microchip Technology Inc. and its subsidiaries /g37/g36 /g19/g17/g20/g19/g38 /g19/g17/g20/g19/g38 /g19/g17/g19/g26/g38/g36/g37 /g19/g17/g19/g24/g38 /g38 /g21/g59 /g55/g50/g51/g3/g57/g44/g40/g58 /g54/g44/g39/g40/g3/g57/g44/g40/g58 /g37/g50/g55/g55/g50/g48/g3/g57/g44/g40/g58 /g49 /g19/g17/g20/g19/g38 /g19/g17/g19/g27/g38 /g54/g75/g72/g72/g87/g3/g20/g3/g82/g73/g3/g21 /g21/g59 /g23/g21/g59 /g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g49/g82/g87/g72/g29 /g23/g21/g16/g37/g68/g79/g79/g3/g38/g75/g76/g83/g3/g54/g70/g68/g79/g72/g3/g51/g68/g70/g78/g68/g74/g72/g3/g11/g26/g24/g59/g12/g3/g16/g3/g24/g17/g21/g28/g91/g24/g17/g22/g19/g91/g20/g17/g19/g21/g3/g80/g80/g3/g37/g82/g71/g92/g3/g62/g38/g54/g51/g64 /g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g55/g72/g70/g75/g81/g82/g79/g82/g74/g92/g3/g39/g85/g68/g90/g76/g81/g74/g3/g38/g19/g23/g16/g24/g22/g22/g16/g26/g24/g59/g3/g53/g72/g89/g3/g37 /g54/g40/g36/g55/g44/g49/g42 /g51/g47/g36/g49/g40 /g11/g39/g36/g55/g56/g48/g3/g36/g12 /g11/g39/g36/g55/g56/g48/g3/g37/g12 /g49/g50/g55/g40/g3/g20 /g19/g17/g19/g19 /g19/g17/g22/g19 /g19/g17/g25/g19 /g20/g17/g21/g19 /g20/g17/g24/g19 /g21/g17/g20/g19 /g19/g17/g25/g19 /g19/g17/g22/g19 /g19/g17/g28/g19 /g20/g17/g24/g19 /g21/g17/g20/g19 /g21/g17/g21/g23 /g20/g17/g26/g21 /g20/g17/g21/g19 /g19/g17/g25/g27 /g19/g17/g25/g19 /g19/g17/g19/g19 /g19/g17/g25/g19 /g20/g17/g21/g19 /g20/g17/g27/g19 /g39/g20 /g40/g20 /g39 /g40 /g72 /g72 /g72 /g72/g20 /g72 /g72/g20 /g23/g21/g59/g3/g145/g69 /g36 /g36/g21 /g36 /g20 /g20

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 13 HV2601/HV2701 /g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g49/g82/g87/g72/g29 /g53/g40/g41/g29/g3/g53/g72/g73/g72/g85/g72/g81/g70/g72/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g15/g3/g88/g86/g88/g68/g79/g79/g92/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g15/g3/g73/g82/g85/g3/g76/g81/g73/g82/g85/g80/g68/g87/g76/g82/g81/g3/g83/g88/g85/g83/g82/g86/g72/g86/g3/g82/g81/g79/g92/g17 /g37/g54/g38/g29/g3/g37/g68/g86/g76/g70/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g17/g3/g55/g75/g72/g82/g85/g72/g87/g76/g70/g68/g79/g79/g92/g3/g72/g91/g68/g70/g87/g3/g89/g68/g79/g88/g72/g3/g86/g75/g82/g90/g81/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g86/g17 /g49/g82/g87/g72/g86/g29 /g20/g17 /g21/g17 /g51/g76/g81/g3/g20/g3/g89/g76/g86/g88/g68/g79/g3/g76/g81/g71/g72/g91/g3/g73/g72/g68/g87/g88/g85/g72/g3/g80/g68/g92/g3/g89/g68/g85/g92/g15/g3/g69/g88/g87/g3/g80/g88/g86/g87/g3/g69/g72/g3/g79/g82/g70/g68/g87/g72/g71/g3/g90/g76/g87/g75/g76/g81/g3/g87/g75/g72/g3/g75/g68/g87/g70/g75/g72/g71/g3/g68/g85/g72/g68/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g76/g81/g74/g3/g68/g81/g71/g3/g87/g82/g79/g72/g85/g68/g81/g70/g76/g81/g74/g3/g83/g72/g85/g3/g36/g54/g48/g40/g3/g60/g20/g23/g17/g24/g48 /g54/g75/g72/g72/g87/g3/g21/g3/g82/g73/g3/g21 /g49/g88/g80/g69/g72/g85/g3/g82/g73/g3/g55/g72/g85/g80/g76/g81/g68/g79/g86 /g50/g89/g72/g85/g68/g79/g79/g3/g43/g72/g76/g74/g75/g87 /g55/g72/g85/g80/g76/g81/g68/g79/g3/g58/g76/g71/g87/g75 /g50/g89/g72/g85/g68/g79/g79/g3/g58/g76/g71/g87/g75 /g40/g91/g83/g82/g86/g72/g71/g3/g51/g68/g71/g3/g58/g76/g71/g87/g75 /g55/g72/g85/g80/g76/g81/g68/g79/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86 /g55/g72/g85/g80/g76/g81/g68/g79/g3/g51/g76/g87/g70/g75 /g54/g87/g68/g81/g71/g82/g73/g73 /g56/g81/g76/g87/g86 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g3/g47/g76/g80/g76/g87/g86 /g36/g20 /g36 /g69 /g40/g20 /g36/g21 /g72 /g40 /g49 /g19/g17/g25/g19/g3/g37/g54/g38 /g19/g17/g26/g21/g24 /g19/g17/g21/g28 /g19/g17/g28/g20 /g19/g17/g21/g20 /g19/g17/g22/g21 /g23/g17/g19/g23/g3/g37/g54/g38 /g19/g17/g28/g25/g24 /g19/g17/g21/g23 /g24/g17/g22/g19/g3/g37/g54/g38 /g48/g44/g47/g47/g44/g48/g40/g55/g40/g53/g54 /g48/g44/g49/g49/g50/g48 /g23/g21 /g19/g17/g22/g24 /g20/g17/g19/g21 /g19/g17/g21/g26 /g48/g36/g59 /g50/g89/g72/g85/g68/g79/g79/g3/g47/g72/g81/g74/g87/g75 /g40/g91/g83/g82/g86/g72/g71/g3/g51/g68/g71/g3/g47/g72/g81/g74/g87/g75 /g39 /g39/g20 /g24/g17/g21/g28/g3/g37/g54/g38 /g23/g17/g21/g19/g3/g37/g54/g38 /g55/g72/g85/g80/g76/g81/g68/g79/g3/g51/g76/g87/g70/g75 /g72/g20 /g19/g17/g24/g21/g3/g37/g54/g38 /g19/g17/g26/g19 /g19/g17/g26/g24 /g23/g21/g16/g37/g68/g79/g79/g3/g38/g75/g76/g83/g3/g54/g70/g68/g79/g72/g3/g51/g68/g70/g78/g68/g74/g72/g3/g11/g26/g24/g59/g12/g3/g16/g3/g24/g17/g21/g28/g91/g24/g17/g22/g19/g91/g20/g17/g19/g21/g3/g80/g80/g3/g37/g82/g71/g92/g3/g62/g38/g54/g51/g64 /g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g55/g72/g70/g75/g81/g82/g79/g82/g74/g92/g3/g39/g85/g68/g90/g76/g81/g74/g3/g38/g19/g23/g16/g24/g22/g22/g16/g26/g24/g59/g3/g53/g72/g89/g3/g37

DS20005391E-page 14  2015-2022 Microchip Technology Inc. and its subsidiaries Note: For more information about ball coordinates, contact Microchip sales. /g53/g40/g38/g50/g48/g48/g40/g49/g39/g40/g39/g3/g47/g36/g49/g39/g3/g51/g36/g55/g55/g40/g53/g49 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g3/g47/g76/g80/g76/g87/g86 /g56/g81/g76/g87/g86 /g38/g21/g38/g82/g81/g87/g68/g70/g87/g3/g51/g68/g71/g3/g54/g83/g68/g70/g76/g81/g74 /g38/g82/g81/g87/g68/g70/g87/g3/g51/g76/g87/g70/g75 /g48/g44/g47/g47/g44/g48/g40/g55/g40/g53/g54 /g19/g17/g25/g19/g3/g37/g54/g38 /g48/g44/g49 /g48/g36/g59 /g23/g17/g19/g23/g3/g37/g54/g38 /g38/g82/g81/g87/g68/g70/g87/g3/g51/g68/g71/g3/g58/g76/g71/g87/g75/g3/g11/g59/g81/g81/g12 /g59 /g19/g17/g21/g24 /g49/g50/g48 /g38/g20/g38/g82/g81/g87/g68/g70/g87/g3/g51/g68/g71/g3/g54/g83/g68/g70/g76/g81/g74 /g23/g17/g21/g19/g3/g37/g54/g38 /g37/g54/g38/g29/g3/g37/g68/g86/g76/g70/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g17/g3/g55/g75/g72/g82/g85/g72/g87/g76/g70/g68/g79/g79/g92/g3/g72/g91/g68/g70/g87/g3/g89/g68/g79/g88/g72/g3/g86/g75/g82/g90/g81/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g86/g17 /g49/g82/g87/g72/g86/g29 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g76/g81/g74/g3/g68/g81/g71/g3/g87/g82/g79/g72/g85/g68/g81/g70/g76/g81/g74/g3/g83/g72/g85/g3/g36/g54/g48/g40/g3/g60/g20/g23/g17/g24/g48/g20/g17 /g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g49/g82/g87/g72/g29 /g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g55/g72/g70/g75/g81/g82/g79/g82/g74/g92/g3/g39/g85/g68/g90/g76/g81/g74/g3/g38/g19/g23/g16/g21/g24/g22/g22/g16/g26/g24/g59/g3/g53/g72/g89/g3/g37 /g38/g82/g81/g87/g68/g70/g87/g3/g51/g76/g87/g70/g75 /g19/g17/g24/g21/g3/g37/g54/g38 /g40/g20 /g40/g21 /g40/g20 /g40/g20 /g40/g20 /g40/g20 /g40/g20 /g40/g21 /g40/g21 /g40/g20 /g38/g20 /g38/g21 /g19/g17/g22/g19 /g19/g17/g28/g19 /g20/g17/g24/g19 /g21/g17/g20/g19 /g19/g17/g22/g19 /g19/g17/g28/g19 /g20/g17/g24/g19 /g21/g17/g20/g19 /g20/g17/g27/g19 /g20/g17/g21/g19 /g19/g17/g25/g19 /g19/g17/g19/g19 /g19/g17/g25/g19 /g19/g17/g25/g27 /g20/g17/g21/g19 /g20/g17/g26/g21 /g21/g17/g21/g23 /g19/g17/g19/g19 /g54/g44/g47/g46/g3/g54/g38/g53/g40/g40/g49 /g23/g21/g16/g37/g68/g79/g79/g3/g38/g75/g76/g83/g3/g54/g70/g68/g79/g72/g3/g51/g68/g70/g78/g68/g74/g72/g3/g11/g26/g24/g59/g12/g3/g16/g3/g24/g17/g21/g28/g91/g24/g17/g22/g19/g91/g20/g17/g19/g21/g3/g80/g80/g3/g37/g82/g71/g92/g3/g62/g38/g54/g51/g64 /g59 /g20

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 15 HV2601/HV2701 Microchip Technology Drawing C04-278 Rev A Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 48-Lead Low-profile Plastic Quad Flat Pack Package (R8) -7x7 mm Body [LQFP] Supertex Legacy Package B D

0.20 C A-B D

0.20 H A-B D

0.08 C A-B D

C SEATING PLANE N TOP VIEW SIDE VIEW 0.10 C 0.08 C D E A 48X b 48X TIPS A e H AA 48X

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 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 17 HV2601/HV2701 RECOMMENDED LAND PATTERN Dimension Limits Units C2Contact Pad Spacing Contact Pitch MILLIMETERS

0.50 BSC

E MAX 8.40 Contact Pad Length (X48) Contact Pad Width (X48) 1.50 0.30 Microchip Technology Drawing C04-2278 Rev A NOM 48-Lead Low-profile Plastic Quad Flat Pack Package (R8) -7x7 mm Body [LQFP] SILK SCREEN E G C1Contact Pad Spacing 8.40 Contact Pad to Contact Pad (X44) G 0.20 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Supertex Legacy Package

DS20005391E-page 18  2015-2022 Microchip Technology Inc. and its subsidiaries C SEATING PLANE TOP VIEW SIDE VIEW 0.08 C Microchip Technology Drawing C04-300-Y8X Rev D Sheet 1 of 2 48X For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 48-Lead Plastic Thin Quad Flatpack (Y8X) - 7x7x1.0 mm Body [TQFP] D D E E BA e e A A2 A1 48X b D

0.20 C A-B D 4X

N NOTE 1

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 19 HV2601/HV2701 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Pin 1 visual index feature may vary, but must be located within the hatched area. Dimensioning and tolerancing per ASME Y14.5M Microchip Technology Drawing C04-300-Y8X Rev D Sheet 2 of 2 48-Lead Plastic Thin Quad Flatpack (Y8X) - 7x7x1.0 mm Body [TQFP] Number of Terminals Overall Height Terminal Width Overall Width Terminal Length Molded Package Width Molded Package Thickness Pitch Standoff Units Dimension Limits A b e L E N 1.00 0.45 0.17 0.05 0.22 0.60 MILLIMETERS MIN NOM 0.75 0.27 1.20 0.15 MAX L1 1.00 REFFootprint Overall Length Molded Package Length D

9.00 BSC

7.00 BSC

Terminal Thickness c 0.09 - 0.16 -0.08 -Lead Bend Radius -0.08 0.20Lead Bend Radius 3.5°0° 7°Foot Angle -0° -Lead Angle ࣄ2 12°11° 13°Mold Draft Angle 0.95 1.05 H SECTION A-A c (L1) L

DS20005391E-page 20  2015-2022 Microchip Technology Inc. and its subsidiaries RECOMMENDED LAND PATTERN Dimension Limits Units C2Contact Pad Spacing Contact Pitch MILLIMETERS E MAX 8.40 Contact Pad Length (X48) Contact Pad Width (X48) 1.50 0.30 Microchip Technology Drawing C04-2300-Y8X Rev D NOM E G C1Contact Pad Spacing 8.40 Distance Between Pads G 0.20 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: SILK SCREEN 48-Lead Plastic Thin Quad Flatpack (Y8X) - 7x7x1.0 mm Body [TQFP]

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 21 HV2601/HV2701 APPENDIX A: REVISION HISTORY Revision E (May 2022)

Minor layout changes.
Added 48-Lead LQFP package notice to Package Types† and Packaging Information†. Revision D (August 2021)
Added 48-Lead TQFP package. Revision C (August 2020)
Corrected Note 2 in table Recommended Operating Conditions (1, 2, 3).
Made minor typographical corrections. Revision B (March 2016) The following is the list of modifications:
Moved Functional Block Diagram to page 2 and made a minor change for clarity.
Removed Confidential status from document. Revision A (December 2015) The following is the list of modifications:
Converted Supertex Doc #s DSFP-HV2601 and DSFP-HV2701 to Microchip DS20005391E.
Combined HV2601/HV2701 into one document.
R e v i s e d Section 4.0 “Packaging Information
Removed package GA from the data sheet.
Made minor text changes throughout.

DS20005391E-page 22  2015-2022 Microchip Technology Inc. and its subsidiaries NOTES:

DS20005391E-page 23  2015-2022 Microchip Technology Inc. and its subsidiaries PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office Note: HV2601BD and HV2701BD are RoHS-compliant products. Devices: HV2601 = 16-Channel HV Analog Switch HV2701 = 16-Channel HV Analog Switch with Bleed Resistors Package: BD = 42-Ball Bumped Die FG = 48-lead LQFP TQ = 48-lead TQFP Environmental: G = Lead (Pb)-free/ROHS-compliant package (not used for BD packages) Media Type: (Blank) = 250/Tray for FG package (Blank) = 250/Tray for TQ package M931 = 1000/Reel for FG package M931 = 1600/Reel for TQ package M936 = 2500/Reel for BD package PART NO. -XXXX Device Environmental XX Package Media Type Examples: a) HV2601FG-G: 16-Channel HV Analog Switch, 48-Lead LQFP package, 250/Tray b) HV2601FG-G-M931: 16-Channel HV Analog Switch, 48-Lead LQFP package, 1000/Reel c) HV2701TQ-G: 16-Channel HV Analog Switch with Bleed Resistors, 48-Lead TQFP package, 250/Tray d) HV2701TQ-G-M931: 16-Channel HV Analog Switch with Bleed Resistors, 48-Lead TQFP package, 1600/Reel e) HV2701BD-M936 16-Channel HV Analog Switch with Bleed Resistors, 42-Ball Bumped die, 2500/Reel

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 24 HV2601/HV2701 NOTES:

 2015-2022 Microchip Technology Inc. and its subsidiaries DS20005391E-page 25 This publication and the information herein may be used only with Microchip products, including to design, test, and integrate Microchip products with your application. Use of this informa- tion in any other manner violates these terms. Information regarding device applications is provided only for your conve- nience and may be superseded by updates. It is your responsi- bility to ensure t hat your applicatio n meets with your specifications. Contact your lo cal Microchip sales office for additional support or, obtai n additional support at https:// www.microchip.com/en-us/support/design-help/client-support- services. THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS". MICROCHIP MAKES NO REPRESENTATIONS OR WAR- RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON- INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE, OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE. IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDI- RECT, SPECIAL, PUNITIVE , INCIDENTAL, OR CONSE- QUENTIAL LOSS, DAMAGE, COST, OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THE INFORMATION. Use of Microchip devices in life support and/or safety applica- tions is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses ar e conveyed, implicitly or otherwise, under any Microchip intellectual pr operty rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet- Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, TrueTime, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, GridTime, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity, JitterBlocker, Knob-on-Display, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, NVM Express, NVMe, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SmartHLS, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, Symmcom, and Trusted Time are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2015-2022, Microchip Technology Incorporated and its subsidiar- ies. All Rights Reserved. ISBN: 978-1-6683-0323-8 Note the following details of the code protection feature on Microchip products:

Microchip products meet the specifications c ontained in their particular Microchip Data Sheet.
Microchip believes that its family of products is secure w hen used in the intended manner, within operating specifications, and under normal conditions.
Microchip values and aggressively protects its intellectual property rights. Attempts to breach the code protection features of Microchip product is strictly prohibited and may violate the Digital Millennium Copyright Act.
Neither Microchip nor any other semic onductor manufacturer can guarantee the security of its code. Code protection does not mean that we are guaranteeing the product is “unbreakable”. Code protection is constantly evolving. Microchip is committed to continuously improving the code protection features of our products. For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.

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Summary

Low-Charge Injection, 16-Channel, High-Voltage Analog Switch Revision E (May 2022)

Description