HV232FG-G

HV232 MICROCHIP | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 22

Technical content

Features

• 10 µA Maximum Quiescent Power Dissipation
• 2 2 Ω Typical Output On-resistance
• Integrated Bleed Resistors on the Outputs
• Low Parasitic Capacitance
• DC to 50 MHz Small Signal Frequency Response
• -60 dB Typical Off-isolation at 5 MHz
• CMOS Logic Circuitry for Low Power
• Excellent Noise Immunity
• On-chip Shift Register, Latch and Clear Logic Circuitry
• Flexible High-voltage Supplies

Applications

• Medical Ultrasound Imaging
• Piezoelectric Transducer Drivers General Description The HV232 is an 8-channel, low-charge-injection, high-voltage, analog switch integrated circuit (IC) with bleed resistors. This device can be used in applications requiring high-voltage switching controlled by low-voltage control signals, such as ultrasound imaging and printers. The bleed resistors eliminate voltage built up on capacitive loads, such as piezoelectric transducers. Input data is shifted into an 8-bit Shift register which can be retained in an 8-bit latch. To reduce any possible clock feed-through noise, latch enable (LE ) should be left high until all bits are clocked in. This switch combines high-voltage bilateral DMOS switches and low-power CMOS logic to provide efficient control of high-voltage analog signals. The HV232 is suitable for various combinations of high -voltage supplies, e.g., V PP/VNN: +40V/-160V and +100V/-100V, and +160V/-40V. Package Types See Table 2-1 and Table 2-2 for pin information. 48-lead LQFP (Top view) 1 28 4 26 28-lead PLCC (Top view) 8-Channel, Low-Charge-Injection, High-Voltage Analog Switch with Bleed Resistors Obsolete Device

DS20005820B-page 2  2024-2026 Microchip Technology Inc. and its subsidiaries Functional Block Diagram LE CLR SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 VPP VNNVDD RGND DOUT DIN CLK 8-Bit Shift Register Latches Level Shifters Output Switches D LE CLR SW0A SW0B SW1A SW1B SW2A SW2B SW3A SW3B SW4A SW4B SW5A SW5B SW6A SW6B SW7A SW7B D LE CLR D LE CLR D LE CLR D LE CLR D LE CLR D LE CLR D LE CLR

 2024-2026 Microchip Technology Inc. and its subsidiaries DS20005820B-page 3 HV232

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings(†) Power Dissipation: †N o t i c e : Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS Parameter Sym. Min. Typ. Max. Unit Conditions Logic Power Supply Voltage V DD 4.5 — 13.2 V Note 1, Note 3 High-Voltage Positive Supply VPP 40 — 160 V Note 1, Note 3, Note 4 High-Voltage Negative Supply V NN -160 — -40 V Note 1, Note 3, Note 4 High-Level Input Voltage V IH VDD–1V — V DD V Low-Level Input Voltage V IL 0— 1 V Analog Signal Voltage Peak-to-Peak V SIG VNN+10V — V PP–10V V Note 2 Operating Ambient Temperature T A 0— 7 0 ° C Note 1: Power-up/down sequence is arbitrary except GND must be powered up first and powered down last. 2: VSIG must be VNN ≤ VSIG ≤ VPP or floating during power-up/down transition. 3: Rise and fall times of power supplies VDD, VPP and VNN should not be less than 1 millisecond. 4: VPP – VNN ≤ 200V

DS20005820B-page 4  2024-2026 Microchip Technology Inc. and its subsidiaries DC ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all values are over operating conditions. Parameter Sym. 0°C +25°C +70°C Unit Conditions Small Signal Switch On-Resistance RONS — 30 — 26 38 — 48 Ω ISIG = 5 mA VPP = +40V VNN = -160V— 25 — 22 27 — 32 I SIG = 200 mA — 25 — 22 27 — 30 I SIG = 5 mA VPP = +100V VNN = -100V— 18 — 18 24 — 27 I SIG = 200 mA — 23 — 20 25 — 30 I SIG = 5 mA VPP = +160V VNN = -40V— 22 — 16 25 — 27 I SIG = 200 mA Small Signal Switch On-Resistance Matching ΔR ONS —2 0— 5 2 0—2 0 % ISIG = 5 mA, VPP = +100V, VNN = -100V Large Signal Switch On-Resistance RONL ———1 5——— Ω VSIG = VPP–10V, ISIG = 1A Output Switch Shunt Resistance RINT — — 20 35 50 — — k Ω Output switch to RGND IRINT = 0.5 mA Switch-Off Leakage per Switch ISOL —5—11 0 — 1 5 µ A V SIG = VPP–10V DC Offset Switch Off VOS — 300 — 100 300 — 300 mV No load DC Offset Switch On — 500 — 100 500 — 500 mV No load VPP Supply Quiescent Current IPPQ ———1 0 5 0—— μA All switches off VNN Supply Quiescent Current INNQ ——— - 1 0 - 5 0 —— μA All switches off VPP Supply Quiescent Current IPPQ ———1 0 5 0—— μA All switches on, I SW = 5 mA VNN Supply Quiescent Current INNQ ——— - 1 0 - 5 0 —— μA All switches on, I SW = 5 mA Switch Output Peak Current ISW —3—3 2—2 A V SIG duty cycle < 0.1% Output Switching Frequency fSW — — — — 50 — — kHz Duty cycle = 50% Average VPP Supply Current IPP —6 . 5— — 7 — 8 mA VPP = +40V VNN = -160V All output switches turn on and off at 50 kHz with no load. —4— —5— 5 . 5 V PP = +100V VNN = -100V VNN = -40V Average VNN Supply Current INN —6 . 5— — 7 — 8 mA VPP = +40V VNN = -160V All output switches turn on and off at 50 kHz with no load. —4— —5— 5 . 5 V PP = +100V VNN = -100V VNN = -40V Logic Supply Average Current IDD —4— —4—4m A f CLK = 5 MHz, VDD = 5V Logic Supply Quiescent Current IDDQ —1 0——1 0—1 0 μA All logic inputs are static

 2024-2026 Microchip Technology Inc. and its subsidiaries DS20005820B-page 5 HV232 Data Out Source Logic Input Capacitance C IN — 10 — — 10 — 10 pF AC ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all values are over operating conditions. Parameter Sym. 0°C +25°C +70°C Set-Up Time before LE Rises t SD 150 — 150 — — 150 — ns Time Width of LE tWLE 150 — 150 — — 150 — ns Clock Delay Time to Data Out t DO 55 150 60 — 150 70 150 ns Time Width of CLR t WCL 150 — 150 — — 150 — ns Set-Up Time Data to Clock t SU 15 — 15 8 — 20 — ns Hold Time Data from Clock t H 35 — 35 — — 35 — ns Clock Frequency f CLK —5— —5—5 M H z 50% duty cycle, fDATA= fCLK/2 Clock Rise and Fall Times t r, tf — 50 — — 50 — 50 ns Turn-On Time t ON —5— —5—5 μs VSIG = VPP–10V, RLOAD = 10 kΩ Turn-Off Time t OFF —5— —5—5 μs VSIG = VPP– 1 0 V, RLOAD = 10 kΩ Maximun VSIG Slew Rate dv/dt —2 0——2 0—2 0 V/ns VPP = +160V, VNN = -40V VNN = -100V VNN = -160V Off Isolation K O dB f = 5 M H z , 1 kΩ//15 pF load 50Ω load Switch Crosstalk K CR -60 — -60 -70 — -60 — dB f = 5 MHz, 50Ω load Output Switch Isolation Diode Current IID — 300 — — 300 — 300 mA 300 ns pulse width, 2% duty cycle Off Capacitance SW to GND C SG(OFF) 5 17 5 12 17 5 17 pF 0V, f = 1 MHz On Capacitance SW to GND C SG(ON) 25 50 25 38 50 25 50 pF 0V, f = 1 MHz DC ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all values are over operating conditions. Parameter Sym. 0°C +25°C +70°C Unit Conditions

DS20005820B-page 6  2024-2026 Microchip Technology Inc. and its subsidiaries Output Voltage Spike mV VPP = + 4 0 V, VNN = -160V, mV VPP = +1 00 V, VNN = -100V, mV VPP = +160V, VNN = -40V, AC ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all values are over operating conditions. Parameter Sym. 0°C +25°C +70°C TEMPERATURE SPECIFICATIONS Parameter Sym. Min. Typ. Max. Unit Conditions TEMPERATURE RANGE Operating Ambient Temperature T A 0— 7 0 ° C Storage Temperature T S -65 — +150 °C PACKAGE THERMAL RESISTANCE 48-lead LQFP JA —4 1— ° C / W 28-lead PLCC JA —3 3— ° C / W

 2024-2026 Microchip Technology Inc. and its subsidiaries DS20005820B-page 7 HV232 Timing Waveforms DATA IN LE CLOCK DATA OUT OFF ON VOUT (typ) 50% 50% 50% 50% tWLE tSD tSU th 50% 50% tOFF 50% tDO tON tWCL CLR DN+1 DN DN-1 50% 50% 90% 10%

DS20005820B-page 8  2024-2026 Microchip Technology Inc. and its subsidiaries TRUTH FUNCTION TABLE Data in 8-Bit Shift Register LE CLR Output Switch State D0 D1 D2 D3 D4 D5 D6 D7 SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 LL L O F F HL L O N LL L O F F HL L O N LL L O F F HL L O N LL L O F F HL L O N LL L O F F HL L O N LL L O F F HL L O N LL L O F F HL L O N LLL O F F HLL O N X X X X X X X X H L Hold Previous State XXXXXXXXXH A l l S w i t c h e s O f f Note 1: The eight switches operate independently. 2: Serial data is clocked in on the L to H transition clock. 3: The switches go to a state retaining their present condition at the rising edge of LE. 4: When LE is low, the Shift register data flow through the latch. 5: DOUT is high when data in the Shift register 7 is high. 6: Shift register clocking has no effect on the switch states if LE is high. 7: The CLR clear input overrides all other inputs.

 2024-2026 Microchip Technology Inc. and its subsidiaries DS20005820B-page 9 HV232

2.0 PIN DESCRIPTION

The description of pins in HV232 48-lead LQFP and 28-lead PLCC are listed in Table 2-1 and Table 2-2, respectively. Refer to Package Types for the location of pins. TABLE 2-1: 48-LEAD LQFP PIN FUNCTION TABLE Pin Number Pin Name Description

1 SW5B SW terminal of analog switch 5B

2 NC No connection

3 SW4A SW terminal of analog switch 4A

4 NC No connection

5 SW4B SW terminal of analog switch 4B

6 NC No connection

7 NC No connection

8 SW3A SW terminal of analog switch 3A

9 NC No connection

10 SW3B SW terminal of analog switch 3B

11 NC No connection

12 SW2A SW terminal of analog switch 2A

13 NC No connection

14 SW2B SW terminal of analog switch 2B

15 NC No connection

16 SW1A SW terminal of analog switch 1A

17 NC No connection

18 SW1B SW terminal of analog switch 1B

19 NC No connection

20 SW0A SW terminal of analog switch 0A

21 NC No connection

22 SW0B SW terminal of analog switch 0B

23 NC No connection

24 VPP High-voltage positive supply

25 VNN High-voltage negative supply

26 NC No connection

27 RGND Ground for bleed resistor

28 GND Ground

29 VDD Logic supply voltage

30 NC No connection

31 NC No connection

32 NC No connection

33 DIN Data in logic input

34 CLK Clock logic input for shift registers

35 LE Latch enable logic input, low active

36 CLR Latch clear logic input

DS20005820B-page 10  2024-2026 Microchip Technology Inc. and its subsidiaries

37 DOUT Data out logic output

38 NC No connection

39 SW7A SW terminal of analog switch 7A

40 NC No connection

41 SW7B SW terminal of analog switch 7B

42 NC No connection

43 SW6A SW terminal of analog switch 6A

44 NC No connection

45 SW6B SW terminal of analog switch 6B

46 NC No connection

47 SW5A SW terminal of analog switch 5A

48 NC No connection

TABLE 2-2: 28-LEAD PLCC PIN FUNCTION TABLE Pin Number Pin Name Description

1 SW3A SW terminal of analog switch 3A

2 SW3B SW terminal of analog switch 3B

3 SW2A SW terminal of analog switch 2A

4 SW2B SW terminal of analog switch 2B

5 SW1A SW terminal of analog switch 1A

6 SW1B SW terminal of analog switch 1B

7 SW0A SW terminal of analog switch 0A

8 SW0B SW terminal of analog switch 0B

10 VPP High-voltage positive supply

11 RGND Ground for bleed resistor

12 VNN High-voltage negative supply

13 GND Ground

14 VDD Logic supply voltage

16 DIN Data in logic input

17 CLK Clock logic input for shift registers

Latch enable logic input, low active

19 CLR Latch clear logic input

20 DOUT Data out logic output

21 SW7A SW terminal of analog switch 7A

22 SW7B SW terminal of analog switch 7B

23 SW6A SW terminal of analog switch 6A

24 SW6B SW terminal of analog switch 6B

25 SW5A SW terminal of analog switch 5A

26 SW5B SW terminal of analog switch 5B

27 SW4A SW terminal of analog switch 4A

28 SW4B SW terminal of analog switch 4B

TABLE 2-1: 48-LEAD LQFP PIN FUNCTION TABLE (CONTINUED) Pin Number Pin Name Description

 2024-2026 Microchip Technology Inc. and its subsidiaries DS20005820B-page 11 HV232

3.0 FUNCTIONAL DESCRIPTION

3.1 Test Circuits

Figure 3-1 to Figure 3-8 show the test circuits for HV232. FIGURE 3-1: Switch Off Leakage. FIGURE 3-2: DC Offset On/Off. FIGURE 3-3: TON/TOFF Test Circuit. FIGURE 3-4: Off Isolation. FIGURE 3-5: Isolation Diode Current. FIGURE 3-6: Crosstalk. ISOL VPP –10V Open RGNDOpen VPP 5.0V VNN VPP VNN VDD GND VOUT RGND 5.0VVPP VNN VDD GND VPP VNN 5.0VVPP VNN VDD GND VPP –10V RL 10KΩ VOUT RGND VPP VNN KO = 20Log VOUT VIN VIN = 10 VP–P @5MHz RL VOUT RGND 5.0VVPP VNN VDD GND VPP VNN IID VNN VSIG RGND 5.0VVPP VNN VDD GND VPP VNN KCR = 20Log VOUT VIN VIN = 10 VP–P @5MHz NC 50Ω 50Ω RGND 5.0VVPP VNN VDD GND VPP VNN

 2024-2026 Microchip Technology Inc. and its subsidiaries DS20005820B-page 13 HV232

4.0 PACKAGE MARKING INFORMATION

4.1 Package Marking Information

Legend: XX...X Product Code or Cust omer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part num ber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. 48-lead LQFP Example NNN YYWW XXXXXXX XXX 319 2415 232FG HV 28-lead PLCC Example XXXXXXXXX YYWWNNNe3 HV232PJ 2441490e3

DS20005820B-page 14  2024-2026 Microchip Technology Inc. and its subsidiaries Microchip Technology Drawing C04-278 Rev A Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 48-Lead Low-profile Plastic Quad Flat Pack Package (R8) -7x7 mm Body [LQFP] Supertex Legacy Package B D

0.20 C A-B D

0.20 H A-B D

0.08 C A-B D

C SEATING PLANE N TOP VIEW SIDE VIEW 0.10 C 0.08 C D E A 48X b 48X TIPS A e H AA 48X

 2024-2026 Microchip Technology Inc. and its subsidiaries DS20005820B-page 15 HV232 Microchip Technology Drawing C04-278 Rev A Sheet 2 of 2 REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Pin 1 visual index feature may vary, but must be located within the hatched area. Dimensioning and tolerancing per ASME Y14.5M 48-Lead Low-profile Plastic Quad Flat Pack Package (R8) -7x7 mm Body [LQFP] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Supertex Legacy Package H L (L1) SECTION A-A T Molded Package Thickness Dimension Limits Mold Draft Angle Top Foot Length Lead Width Molded Package Length Molded Package Width Overall Length Overall Width Foot Angle Footprint Standoff Overall Height Lead Pitch Number of Leads 0.750.600.45L 0.22

7.00 BSC

9.00 BSC

3.5°

1.00 REF

D b 0.17 11° D E 13° 0.27 1.40

0.50 BSC

A e 0.05 1.35 1.40 Units N MIN 1.45 0.15 1.60 0.10 1.50 MAX T 12°

DS20005820B-page 16  2024-2026 Microchip Technology Inc. and its subsidiaries RECOMMENDED LAND PATTERN Dimension Limits Units C2Contact Pad Spacing Contact Pitch MILLIMETERS E MAX 8.40 Contact Pad Length (X48) Contact Pad Width (X48) 1.50 0.30 Microchip Technology Drawing C04-2278 Rev A NOM 48-Lead Low-profile Plastic Quad Flat Pack Package (R8) -7x7 mm Body [LQFP] SILK SCREEN E G C1Contact Pad Spacing 8.40 Contact Pad to Contact Pad (X44) G 0.20 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Supertex Legacy Package

 2024-2026 Microchip Technology Inc. and its subsidiaries DS20005820B-page 17 HV232 28X b CH3 x 45°

0.177 C A–B

Microchip Technology Drawing C04-026-L4X Rev D Sheet 1 of 2 D E A 28X b1 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 28-Lead Plastic Leaded Chip Carrier (L4X) - Square [PLCC] © 2023 Microchip Technology Inc. CH1 x 45° 3X CH2 x 45° A2 A1 e D A A

DS20005820B-page 18  2024-2026 Microchip Technology Inc. and its subsidiaries Microchip Technology Drawing C04-026-L4X Rev D Sheet 2 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 28-Lead Plastic Leaded Chip Carrier (L4X) - Square [PLCC] Notes: Pin 1 visual index feature may vary, but must be located within the hatched area. 4. Dimensioning and tolerancing per ASME Y14.5M 3. Dimensions D1 and E1 do not include mold flash or protrusions. Mold flash or BSC: Basic Dimension. Theoretically exact value shown without tolerances. 2. § Significant Characteristic protrusions shall not exceed .005" per side. © 2023 Microchip Technology Inc. .021-.013bLower Lead Width .032-.025b1Upper Lead Width .0125-.0075cLead Thickness .438.410.382D2Footprint Length .438.410.382E2Footprint Width .456.453.450D1Molded Package Length .456.453.450E1Molded Package Width .495.490.485DOverall Length .495.490.485EOverall Width .056-.042CH3Side Chamfer .020--CH2Chamfers .048-.042CH1Corner Chamfer .020A3Standoff A2Molded Package to Contact .180.172.165AOverall Height .050ePitch 28NNumber of Pins MAXNOMMINDimension Limits INCHESUnits .062 - .083 Contact Height A1 .090 .105 .120 0.53-0.33 0.81-0.64 0.32-0.19 11.1310.419.70 11.1310.419.70 11.5811.5111.43 11.5811.5111.43 12.5712.4512.32 12.5712.4512.32 1.42-1.07 0.51-- 1.22-1.07 0.51 4.574.374.19 1.27 MAXNOMMIN MILLIMETERS 1.57 - 2.11 2.29 2.67 3.05

 2024-2026 Microchip Technology Inc. and its subsidiaries DS20005820B-page 19 HV232 RECOMMENDED LAND PATTERN SILK SCREEN E G BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Microchip Technology Drawing C04-2026-L4X Rev D 28-Lead Plastic Leaded Chip Carrier (L4X) - Square [PLCC] Dimension Limits Units C2Contact Pad Spacing Contact Pitch INCHES .050 BSC MIN E MAX .425 Contact Pad Length (X28) Contact Pad Width (X28) .100 .026 NOM C1Contact Pad Spacing .425 Contact Pad to Center Pad (X24) G .008 MILLIMETERS

1.27 BSC

10.80 2.54 0.66 NOM 10.80 0.20

DS20005820B-page 20  2024-2026 Microchip Technology Inc. and its subsidiaries APPENDIX A: REVISION HISTORY Revision B (January 2026)

• Added the Obsolete Device label on the first page. Revision A (May 2024)
• Converted Supertex Doc # DSFP-HV232 to Microchip DS20005820A
• Removed “HVCMOS® Technology for high performance” in the Features section
• Changed the package marking format
• Removed the 48-lead LQFP M931 and 28-lead PLCC M904 media types to align packaging specifications with the actual BQM
• Made minor changes throughout the document

 2024-2026 Microchip Technology Inc. DS20005820B-page 21 HV232 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: a) HV232FG-G: 8-Channel, Low-Charge-Injection, High-Voltage Analog Switch with Bleed Resistors, 48-lead LQFP , 250/Tray b) HV232PJ-G: 8-Channel, Low-Charge-Injection, High-Voltage Analog Switch with Bleed Resistors, 28-lead PLCC, 38/Tube PART NO. Device Device: HV232 = 8-Channel, Low-Charge-Injection, High- Voltage Analog Switch with Bleed Resistors Packages: FG = 48-lead LQFP PJ = 28-lead PLCC Environmental: G = Lead (Pb)-free/RoHS-compliant Package Media Types: (blank) = 250/Tray for an FG Package (blank) = 38/Tube for a PJ Package XX Package - X - X Environmental Media Type Options

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