HSP45240_99 INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • This Circuit is Processed in Accordance to MIL-STD- 883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
  • Block Oriented 24-Bit Sequencer
  • Configurable as Two Independent 12-Bit Sequencers
  • 24 x 24 Crosspoint Switch
  • Programmable Delay on 12 Outputs 9-
  • Multi-Chip Synchronization Signals
  • S t a n d a r d µP Interface
  • 100pF Drive on Outputs
  • DC to 40MHz Clock Rate

Applications

  • 1-D, 2-D Filtering
  • Pan/Zoom Addressing
  • FFT Processing
  • Matrix Math OperationsDescription The Intersil HSP45240/883 is a high speed Address Sequencer which provides specialized addressing for func- tions like FFTs, 1-D and 2-D filtering, matrix operations, and image manipulation. The sequencer supports block oriented addressing of large data sets up to 24 bits at clock speeds up to 40MHz. Block Diagram

Ordering Information

TEMP. RANGE (oC) PACKAGE PKG. NO. HSP45240GM-25/883 -55 to 125 68 Ld PGA HSP45240GM-33/883 -55 to 125 68 Ld PGA HSP45240GM-40/883 -55 to 125 68 Ld PGA DLYBLK OUT12-23 OUT0-11 STARTIN STARTOUT ADDVAL DONE BLOCKDONE OEH OEL BUSY START CIRCUITRY SEQUENCE GENERATOR SWITCH CROSS-POINT REG DELAY 1-8 PROCESSOR INTERFACE D0-6, CS, A0, WR FN2816.4 FOR A POSSIBLE SUBSTITUTE PRODUCT call Central Applications 1-888-INTERSIL or email: centapp@intersil.com OBSOLETE PRODUCT CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved

of the device at these or any other conditions above those indicated in the operational sections of this specification is not i mplied.

  1. θJA is measured with the component mounted on an evaluation PC board in free air.

TABLE 1. DC ELECTRICAL SPECIFICATIONS

  1. Interchanging of force and sense conditions is permitted.
  2. Operating Supply Current is proportional to frequency, typical rating is 3mA/MHz.
  3. Tested as follows: t = 1MHz, V

TABLE 2. AC ELECTRICAL SPECIFICATIONS

  1. Transition is measured at ±200mV from steady state voltage with loading as specified by test load circuit and CL = 40pF.

TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS

  1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters ar e

characterized upon initial design and after major process and/or design changes.

  1. Loading is as specified in the test load circuit with C L = 40pF.

TABLE 4. ELECTRICAL TEST REQUIREMENTS TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued)

A2 GND GND B9 OUT14 V CC/2 F11 OUT8 V CC/2 K6 BUSYB V CC/2 A3 OUT23 V CC/2 C1 D2 F10 G1 CSB F5 K7 DONEB V CC/2 A4 V CC VCC C2 D1 F9 G2 A0 F6 K8 OUT0 V CC/2 A5 OUT20 V CC/2 C10 GND GND G10 OUT6 V CC/2 K9 V CC VCC A6 OUT19 V CC/2 C11 OUT12 V CC/2 G11 OUT7 V CC/2 K11 OUT3 V CC/2 A7 V CC VCC D1 D4 F12 H1 CLK F0 L2 OEHB F13 A8 OUT16 V CC/2 D2 D3 F11 H2 GND GND L3 DLYBLK F11 A9 OUT15 V CC/2 D10 OUT10 V CC/2 H10 OUTS V CC/2 L4 STARTOUTB V CC/2 A10 OUT13 V CC/2 D11 OUT11 V CC/2 H11 V CC VCC LS V CC VCC B1 D0 F8 E1 D6 F7 J1 RSTB F14 L6 BLOCKDONEB V CC/2 B3 OUT22 V CC/2 E2 D5 F13 J2 V CC VCC L7 GND GND B4 OUT21 V CC/2 E10 OUT9 V CC/2 J10 GND GND L8 OUT1 V CC/2 B5 GND GND E11 V CC VCC J1 1 OUT4 V CC/2 L9 OUT2 V CC/2 B6 OUT18 V CC/2 F1 WRB F4 K3 OELB F12 B7 OUT17 V CC/2 F2 GND GND K4 START1NB F6 B8 GND GND F10 GND GND K5 ADVALB V CC/2 NOTES: 9. V CC/2 (2.7V ± ±10%) used for outputs only. 10. 47 Ω (±20%) resistor connected to all pins except V CC and GND. 12. 0.1 µF (min) capacitor between VCC and GND per position. D1D2 D0 NC OUT22 OUT21 GND OUT18 OUT17 GND OUT14 NC NC OUT13OUT15OUT16VCCOUT19OUT20VCCOUT23GND L K J H G F E D C B A 2345 67 89 1 0 1 11 NC RST CLK CS WR OEH NC VCC GND GND DLY START VCC BLOCK GND OUT1 OUT2OUT DONE NC OEL START ADD BUSY DONE OUTO V CC NC OUT3IN VAL OUT4 VCC OUT7 OUT8 V CC OUT11 OUT12 GND OUT5 OUT6 GND OUT9 OUT10 GND BLK HSP45240/883

DIE DIMENSIONS: 186 mils x 222 mils x 19 ±1mils METALLIZATION: Type: Si - Al or Si-Al-Cu Thickness: 8kÅ GLASSIVATION: Type: Nitrox Thickness: 10kÅ WORST CASE CURRENT DENSITY: 1.8 x 105A/cm2 Metallization Mask Layout HSP45240/883 GND OUT23 OUT22 VCC OUT21 OUT20 GND OUT19 OUT18 VCC OUT17 OUT16 GND OUT15 OUT14 OUT13 OEH OEL DLYBLK STARTIN STARTOUT ADDVAL VCC BUSY BLOCKDONE DONE GND OUT0 OUT1 VCC OUT2 GND WR CS GND VCC RST CLK OUT12 GND OUT11 OUT10 VCC OUT9 OUT8 GND OUT7 OUT6 VCC OUT5 GND OUT3 OUT4 HSP45240/883 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli- able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com