HSDL-3201

HSDL-3201 HP | Alldatasheet

Document overview

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Technical content

Features

• Ultra Small Surface Mount Package
• Minimal Height: 2.5 mm
• Vcc from 2.7 to 3.6 Volts
• Withstands > 250 mVp-p Power Supply Ripple
• LED Supply Voltage can Range from 2.7 to 6.0 Volts
• Low Shutdown Current – 20 nA Typical IrDAW Data 1.2 Low Power Compliant 115.2 kb/s Infrared Transceiver Technical Data HSDL-3201 (Front and Top Options)
• Complete Shutdown – TxD, RxD, PIN Diode
• One Optional External Component
• Temperature Range: -25°C to 85°C
• 32 mA LED Drive Current
• Integrated EMI Shield
• IEC825-1 Class 1 Eye Safe
• Edge Detection Input – Prevents the LED from Long Turn on Time IrDA 1.2 LOW POWER IrDA 1.0/1.2 STANDARD OR LOW POWER 30° ILLUMINATION CONE CELL PHONES PAGERS PDAs CAMERAS CELL PHONES PAGERS PRINTERS PCs PDAs CAMERAS

20 CM TO LOW POWER DEVICES

30 CM TO STANDARD DEVICES

Applications

• Mobile Telecom – Cellular Phones – Pagers – Smart Phones
• Data Communication – PDAs – Portable Printers
• Digital Imaging – Digital Cameras – Photo-Imaging Printers

Description

The HSDL-3201 is one of a new generation of low-cost Infrared (IR) transceiver modules from Agilent Technologies. It features the smallest footprint in the industry at 2.5 H x 8.0 W x 3.0 D mm. Although the supply voltage can range from 2.7 V to 3.6 V, the LED drive current is internally compensated to a constant 32 mA to assure that link distances meet the IrDA Data 1.2 (low power) physical layer specifications. The HSDL-3201 meets the 20 cm link distance to other IrDA 1.2 low power devices, and a 30 cm link distance to IrDA 1.2 standard devices. I/O Pins Configuration Table Pin Symbol Description Notes 1 GND Ground Connect to system ground.

2 NC No Connection This pin must be left

unconnected. 3V CC Supply Voltage Regulated: 2.7 to 3.6 Volts

4 AGND Analog Ground Connect to a “quiet”

ground.

5 SD Shut Down This pin must be driven

Active High either high or low. Do NOT float the pin.

6 RXD Receiver Data Output is a low pulse for

Output. Active Low. 2.4 µs when a light pulse is seen.

7 TXD Transmitter Data Logic high turns the LED

Input. Active High. on. If held high longer than ~ 20 µs, the LED is turned off. TXD must be driven high or low. Do NOT float the pin. 8 VLED LED Voltage May be unregulated: 2.7 to 6.0 volts. - SHIELD EMI Shield Connect to system ground via a low inductance trace. For best performance, do not directly connect to GND or AGND at the part. Application Circuit HSDL-3201#021/001/011 Pinout, Rear View VLED TXD 7 LED CURRENT SOURCE RXD 6 SHUT DOWN 5 RX PULSE SHAPER TXD

8 VLED

4 AGND

1 GND

1.0 µF SHIELD 87654321 HSDL-3201#008/018 Pinout, Rear View87654321

Recommended Application Circuit Components Component Recommended Value Note C1 1.0 µF1 Absolute Maximum Ratings For implementations where case to ambient thermal resistance is ≤ 50°C/W. Parameter Symbol Min. Max. Units Storage Temperature T S -40 100 °C Operating Temperature T A -25 85 °C LED Supply Voltage V VLED -0.5 7 V Supply Voltage V CC -0.5 7 V Input Voltage: TXD, SD V I 0V CC + 0.5 V Output Voltage: RXD V O -0.5 V CC + 0.5 V Solder Reflow See Reflow Profile, page 19Temperature Profile Transceiver I/O Truth Table The LED and RXD outputs are controlled by the combination of the TXD and SD pins and light falling on the receiver. As shown in the table below, the transmitter is non-inverting; the LED is on when the TXD pin is high and off when TXD is low. The receiver is inverting; the RXD pin is low during IrDA signal pulses and high when the receiver does not see any light. When shutdown (SD pin high), the LED is off (the state of the TXD pin does not matter), and the RXD pin is pulled high with a weak internal pullup. SD TXD LED Receiver RXD Notes High On Don’t care Not Valid 2, 3 Low Low Off IrDA Signal Low 4, 5 No Signal High High Don’t care Off Don’t care High 6 Shutdown Mode Notes When the HSDL-3201 is in Shutdown Mode (SD pin high), the part presents different impedances to the rest of the circuit than when it is in normal mode. RXD Pin: This pin is NOT Tri- state. During shutdown the equivalent circuit is a weak pullup (~300 kΩ ) to V cc. The ESD protection diodes to Vcc and Ground are also present. TXD Pin: Input protection diodes are present. VLED Pin: Possible leakage current of 1.5 nA. SD Pin: Will draw approximately 16 nA when driven high. Marking Information The unit is marked with the letters “A” and the datecode “YWW” on the shield for front options. For top options, the part is marked as “YWW” where Y is the last digit of the year, and WW is the workweek.

Ordering Information

Specify the part number followed by an option number. HSDL-3201#XXX There are five options available: Front Options #011 Taped in a short strip (no reel), 10 per strip #001 Taped and 7” Reel Packaging, 500 per reel #021 Taped and 13” Reel Packaging, 2500 per reel Top Options #018 Taped in a short strip (no reel), 10 per strip #008 Taped and 13” Reel Packaging, 2500 per reel Caution: The BiCMOS inherent to this design of this component increases the component’s susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.

Recommended Operating Conditions Parameter Symbol Min. Max. Units Conditions Notes Operating Temperature T A -25 85 °C Supply Voltage V CC 2.7 3.6 V LED Supply Voltage V LED 2.7 6.0 V TXD, SD Input Logic High V IH 2/3 VCC VCC V Voltage Logic Low V IL 0 1/3 V CC V Receiver Input Logic High EI H 0.0081 500 mW/cm 2 For in-band signals. 7 Irradiance Logic Low EI L 0.3 µW/cm2 For in-band signals. 7 Receiver Data Rate 2.4 115.2 kb/s RXD Output Waveform LED Optical Waveform TXD “Stuck ON” Protection Receiver Wakeup Time Definition Transmitter Wakeup Time Definition tf VOH 90% 50% 10%V OL tpw tr tf LED OFF 90% 50% 10% LED ON tpw tr tpw (MAX.) TXD LED RX LIGHT tRW RXD SD TX LIGHT tTW TXD SD

Electrical & Optical Specifications Specifications hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be anywhere in their operating range. All typical values are at 25 °C and 3.0 V unless otherwise noted. Parameter Symbol Min. Typ. Max. Units Conditions Note Receiver Viewing Angle 2 φ1/2 30 ° Peak Sensitivity λp 880 nm Wavelength RXD Output Logic High V OH VCC -0.2 V CC VI OH=-200 µA, EI ≤ 0.3 µW/cm2 Voltage Logic Low V OL 0 0.4 V I OL=200 µA8 RXD Pulse Width t PW 2.0 2.45 3.0 µs8 RXD Rise Time t R 11 20 ns t PW (EI)=1.6 µs, CL =10 pF RXD Fall Time t F 16 25 ns t PW (EI)=1.6 µs, CL =10 pF Receiver Latency Time t L 25 50 µs9 Receiver Wake Up Time t RW 28 40 µs1 0 Transmitter Radiant Intensity EI H 4 9 28.8 mW/Sr TA=25°C, θ1/2 ≤ 15°, TXD ≥ 2/3 VCC Viewing Angle 2 θ1/2 30 60 ° Peak Wavelength λp 875 nm Spectral Line Half Width Δλ 1/2 35 nm Optical Pulse Width t OPW 2.0 2.24 2.6 µst PW (TXD)=1.6 µs Max. Optical Pulse Width t OPWM 20 30 µs TXD pin stuck high Optical Rise Time t OR 180 600 ns t PW (TXD)=1.6 µs Optical Fall Time t OF 180 600 ns t PW (TXD)=1.6 µs TXD Logic High V IH 2/3 VCC VCC V Levels Low V IL 0 1/3 VCC V TXD Input High I H 25 nA V I ≥ 2/3 VCC Current Low I L -15 nA 0 ≤ VI ≤ 1/3 VCC LED On I VLED 32 mA VVLED=VCC=3.6 V, VI(TXD) ≥ 2/3 VCC Current Off I VLED 1.5 nA VVLED=VCC=3.6 V, VI(TXD) ≤ 1/3 VCC Shutdown I VLED 1.5 nA V I(SD) ≥ 2/3 VCC Transmitter Wake Up Time t TW 12 20 µs1 1 Transceiver SD Logic High V IH 2/3 VCC VCC V Levels Low V IL 0 1/3 VCC V SD Input High I H 16 nA V I ≥ 2/3 VCC Current Low I L -150 nA 0 ≤ VI ≤ 1/3 VCC DC Supply Shutdown I CC1 20 200 nA VCC=3.6 V,VSD ≥ VCC - 0.5, TA=25°C Current Idle I CC2 100 µA VCC=3.6 V, VI(TXD) ≤ 1/3 VCC, EI=0 AC Supply Active, receive ICC3 0.8 3.0 mA V CC=3.6 V, VI(TXD) ≤ 1/3 VCC 12,13 Current Active, I CC4 9.0 mA V CC=3.6 V, VI(TXD) ≥ 2/3 VCC 14 transmit Notes at top of next page.

HSDL-3201#011/001/021 Package Dimensions /n00/n00 2.85 MOUNTING CENTER 4.0 1.025 UNIT: mm TOLERANCE: ± 0.2 mm COPLANARITY = 0.1 mm MAX. CL 2.5 4.0 8.0 2.05 2.55 EMITTERRECEIVER 0.35 0.65 0.80 CL 3.325 6.65 0.6 2.93.0 1.85 /n00/n00 /n00/n00/n00/n00 /n00/n00/n00/n00 1.05 1.25 1.175 2.2 PIN 1

HSDL-3201#011/001/021 Tape and Reel Dimensions 16.4+ 2 21 ± 0.8 UNIT: mm B C ∅ 13.0 ± 0.5 2.0 ± 0.5 2.0 ± 0.5 LABEL 3.4 ± 0.1 8.4 ± 0.1 8.0 ± 0.1 4.0 ± 0.1 1.5 ± 0.1 7.5 ± 0.1 16.0 ± 0.2 1.75 ± 0.1 ∅ 1.5+ 0.1 0.4 ± 0.05 2.8 ± 0.1 POLARITY PIN 8: VLED PIN 1: GND OPTION # "B" "C" QUANTITY 001 021 178 330 500 2500 EMPTY PARTS MOUNTED LEADER EMPTY (40 mm MIN.) (400 mm MIN.) (40 mm MIN.) PROGRESSIVE DIRECTION R 1.0 DETAIL A DETAIL A UNIT: mm

HSDL-3201#008/018 Package Dimensions Pin Symbol Description

1 GND Ground

2 NC No Connection

4 AGND Analog Ground

5 SD Shutdown (Active High)

6 RxD Receive Data

7 TxD Transmit Data

8 VLED LED Voltage

9 EMI Shield EMI Shield

5.1 7.5 2.8 3.325 0.95 x 7 = 6.65 ± 0.15 0.6 ± 0.15 0 ± 0.05 (MAX.) +0.05 -0.2 1.8+0.05 -0.2 3.6 1.55 2.35 CL /n00 UNIT: mm TOLERANCE: ± 0.2 mm COPLANARITY = 0.1 mm MAX. 0.4 ± 0.15 0.95 ± 0.1 0.7 ± 0.1 2.8 3.35 1.55 /n00/n00 /n00/n00/n00/n00 /n00/n00/n00 /n00 0.3

HSDL-3201#008/018 Tape and Reel Dimensions Bo Po W E 1.5 Ko Do F P2D1 B B 5°(MAX.) /n00/n00/n00 5°(MAX.) Ao AA A-A SECTION B-B SECTION SYMBOL Ao Bo Ko Po P1 P2 T SYMBOL E F Do D1 W 10Po UNIT: mm 5° 3.1 ± 0.1 /n00/n00 /n00/n00 /n00/n00 2.6 +0.05 - 0.10 16.0+0.5 ∅ 13.1 DETAIL A (5/1) +0.5 120° 60°TYP. ∅ 99.5 ± 1 ∅ 330 ± 1 ∅ 264 NOTES: 1. 10 SPROKET HOLE PITCH CUMULATIVE TOLERANCE IS ± 0.2 mm. 2. CARRIER CAMBER SHALL NOT BE MORE THAN 1 mm PER 100 mm THROUGH A LENGTH OF 250 mm. 3. Ao AND Bo MEASURED ON A PLACE 0.3 mm ABOVE THE BOTTOM OF THE PACKET. 4. Ko MEASURED FROM A PLACE ON THE INSIDE BOTTOM OF THE POCKET TO TOP SURFACE OF CARRIER. 5. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE. PS T

The HDSL-3201 is shipped in moisture proof packaging. Once opened, moisture absorption begins. Recommended Storage Conditions Storage 10 °C to 30°C Temperature Relative Humidity below 60% RH Time from Unsealing to Soldering After removal from the bag, the parts should be soldered within two days if stored at the recommended storage conditions. If times longer than two days are needed, the parts must be stored in a dry box. Baking If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Package Temp. Time In reels 60 °C ≥ 48 hours 100°C ≥ 4 hours In bulk 125 °C ≥ 2 hours 150°C ≥ 1 hour Baking should only be done once. Recommended Land Pattern for HSDL-3201#011/001/ 021 (Front Options) 0.60 1.25 1.75 1.35 0.10 0.475 1.425 2.375 3.325 CL MOUNTING CENTER SHIELD SOLDER PAD FIDUCIAL 2.05 0.775 UNIT: mm Recommended Land Pattern for HSDL-3201#008/018 (Top Options) 0.60 0.9 /n00/n00 /n00/n00 2.20 3.625 MOUNTING CENTER 0.575 1.60 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 /n00/n00 PITCH 7 x 0.95 /n00/n00/n00 /n00/n00 /n00/n00 /n00/n00 1.275 1.45

It is recommended that only a 0.152 mm (0.006 inches) or a 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. See the table below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. Aperture opening for shield pad is 2.7 mm x 1.25 mm as per land pattern. Stencil Thickness, t (mm) Aperture Size(mm) length, l width, w Appendix A: HSDL-3201#011/001/021 SMT Assembly Application Note METAL STENCIL FOR SOLDER PASTE PRINTING LAND PATTERN PCB STENCIL APERTURE SOLDER MASK APERTURES AS PER LAND DIMENSIONS l w t Solder Pad, Mask, and Metal Stencil

0.2 3.0 8.2 2.6 SOLDER MASK UNITS: mm Adjacent Land Keep-out and Solder Mask Areas Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. It is recommended that two fiducial crosses be place at mid-length of the pads for unit alignment. Note: Wet/Liquid Photo-Imageable solder resist/mask is recommended.

The following PCB layout shows a recommended layout that should result in good electrical and EMI performance. Things to note: 1. The ground plane should be continuous under the part, but should not extend under the shield trace. 2. The shield trace is a wide, low inductance trace back to the system ground. 3. The AGND pin is connected to the ground plane and not to the shield tab. 4. C1 is an optional V cc filter capacitor; it may be left out if the V cc is clean. 5. VLED can be connected to either unfiltered or unregulated power. If C1 is used, and if VLED is connected to V cc, the connection should be before the C1 cap. Component Side Circuit Side VLED TXD RXD SHUTDOWN VCC SHIELD GROUND

Based on calculation and experi- ment, the printed solder paste volume required per castellation pad is 0.22 cubic mm (based on either no-clean or aqueous solder cream types with typically 60% to 65% solid content by volume). Using the recommended stencil results in this volume of solder paste. Pick and Place Misalignment Tolerance and Self-Alignment after Solder Reflow If the printed solder paste volume is adequate, the HSDL-3201 will self align after solder reflow. Units should be properly reflowed in IR/Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter. Direction Definition Tolerance for X- axis Alignment of Castellation Misalignment of castellation to the land pad should not exceed 0.2 mm or about one half the width of the castellation during placement of the unit. The castellations will self-align to the pads during solder reflow. Tolerance for Rotational (θ) Misalignment Mounted units should not be rotated more than ± 3 degrees with reference to center X-Y as shown in the direction definition. Units that are rotated more than ± 3 degrees will not self align after solder reflow. Units with less than a ± 3 degree misalign- ment will self-align after solder reflow. Allowable Misalignment Direction Tolerance X ≤ 0.2 mm Y See text θ≤ ± 3 degrees Y- axis Misalignment of Castellation In the Y direction, the HSDL-3201 does not self align after solder reflow. Agilent recommends that the part be placed in line with the fiducial mark (mid-length of land pad.) This will enable sufficient land length (minimum of one half of the land pad) to form a good joint. See the drawing below. Y θ X MINIMUM 1/2 THE LENGTH OF THE LAND PAD EDGE FIDUCIAL

Process Zone Symbol Δ T Maximum ΔT/Δtime Heat Up P1, R1 25 °C to 125°C4 °C/s Solder Paste Dry P2, R2 125 °C to 170°C 0.5 °C/s Solder Reflow P3, R3 170 °C to 230°C (245°C max.) 4 °C/s P3, R4 230 °C to 170°C- 4 °C/s Cool Down P4, R5 170 °C to 25°C- 3 °C/s The reflow profile is a straight line representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different ΔT/Δtime temperature change rates. The ΔT/Δtime rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3201 castellation pins are heated to a temperature of 125°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4°C per second to allow for even heating of both the PC board and HSDL-3201 castellations. Process zone P2 should be of sufficient time duration (greater than 60 seconds), to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 170°C (338°F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 230°C (446°F) for optimum results. The dwell time above the liquidus point of solder should be between 15 and 90 seconds. It usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 90 seconds, the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 170°C (338°F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed 3°C per second maximum. This limitation is necessary to allow the PC board and HSDL-3201 castellations to change dimensions evenly, putting minimal stresses on the HSDL-3201 transceiver. t-TIME (SECONDS) T – TEMPERATURE – (°C) 200 170 125 100 50 150 100 200 250 300 150 183 230 HEAT UP SOLDER PASTE DRY SOLDER REFLOW COOL DOWN R3 R4 90 sec. MAX. ABOVE 183°C MAX. 245°C

To insure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions ensure that the IrDA cone angles are met without vignetting. The maximum dimensions minimize the effects of stray light. The minimum size corresponds to a cone angle of 30 degrees, the maximum, to a cone angle of 60 degrees. X is the width of the window, Y is the height of the window, and Z is the distance from the HSDL-3201 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens is 5.1 mm. The equations for the size of the window are as follows: X = 5.1 +2(Z + D) tan θ Y = 2(Z + D) tan θ Where θ is the required half angle for viewing. For the IrDA minimum, it is 15 degrees, for the IrDA maximum it is 30 degrees. (D is the depth of the LED image inside the part, 3.17 mm). These equations result in the following tables and graphs: Minimum and Maximum Window Sizes Dimensions are in mm. Depth (Z) Y min. X min. Y max. X max. 0 1.70 6.80 3.66 8.76 1 2.23 7.33 4.82 9.92 2 2.77 7.87 5.97 11.07 3 3.31 8.41 7.12 12.22 4 3.84 8.94 8.28 13.38 5 4.38 9.48 9.43 14.53 6 4.91 10.01 10.59 15.69 7 5.45 10.55 11.74 16.84 8 5.99 11.09 12.90 18.00 9 6.52 11.62 14.05 19.15 10 7.06 12.16 15.21 20.31 Window Height Y vs. Module Depth Z Window Width X vs. Module Depth Z /n00/n00/n00/n00/n00 /n00/n00/n00/n00 Y X /n00/n00 /n00 Z WINDOW HEIGHT Y – mm MODULE DEPTH Z – mm 01 0 ACCEPTABLE RANGE 60° CONE 30° CONE WINDOW WIDTH X – mm MODULE DEPTH Z – mm 01 0 ACCEPTABLE RANGE 60° CONE 30° CONE

From an optics standpoint, the window should be flat. This ensures that the window will not alter either the radiation pattern of the LED, or the receive pattern of the photodiode. If the window must be curved for mechanical design reasons, place a curve on the back side of the window that has the same radius as the front side. While this will not completely eliminate the lens effect of the front curved surface, it will reduce the effects. The amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. Once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. The following drawings show the effects of a curved window on the radiation pattern. In all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. Flat Window (First choice) Curved Front, Flat Back (Do not use) Curved Front and Back (Second choice)

interference conditions in which the receiver is to operate correctly. The conditions are to be applied separately: 1. Electromagnetic field:

3 V/m maximum (please refer

to IEC 801-3, severity level 3 for details). 2. Sunlight: 10 kilolux maximum at the optical port. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased to provide 490 µW/cm 2 (with no modulation) at the optical port. The light source faces the optical port. This simulates sunlight within the IrDA spectral range. The effect of longer wavelength radiation is covered by the incandescent condition. 3. Incandescent Lighting: 1000 lux maximum. This is produced with general service, tungsten-filament, gas-filled, inside frosted lamps in the

60 Watt to 100 Watt range to

generate 1000 lux over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The source is expected to have a filament temperature in the 2700 to

3050 Kelvin range and a

spectral peak in the 850 to 1050 nm range. 4. Fluorescent Lighting: 1000 lux maximum. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased and modulated to provide an optical square wave signal (0 µW/cm 2 minimum and 0.3 µW/cm2 peak amplitude with 10% to 90% rise and fall times less than or equal to 100 ns) over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The frequency of the optical signal is swept over the frequency range from 20 kHz to 200 kHz. Due to the variety of fluorescent lamps and the range of IR emissions, this condition is not expected to cover all circumstances. It will provide a common floor for IrDA operation.

www.agilent.com/semiconductors For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (408) 654-8675 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6271 2451 India, Australia, New Zealand: (+65) 6271 2394 Japan: (+81 3) 3335-8152(Domestic/Interna- tional), or 0120-61-1280(Domestic Only) Korea: (+65) 6271 2194 Malaysia, Singapore: (+65) 6271 2054 Taiwan: (+65) 6271 2654 Data subject to change. Copyright © 2002 Agilent Technologies, Inc. Obsoletes 5980-1768E May 9, 2002 5988-6600EN