HS-117RH_03 INTERSIL | Alldatasheet
Document overview
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- PDF pages: 2
Technical content
Features
- Electrically Screened to DSSC SMD # 5962-99547
- QML Qualified per MIL-PRF-38535 Requirements
- Radiation Environment - 300 krad (Si) (Max) - Latch-up Immune
- Superior Temperature Stability
- Overcurrent and Over temperature Protection
Applications
- Adjustable Linear Voltage Regulators
- Adjustable Linear Current Regulators HSYE-117RH (SMD.5 CLCC) BOTTOM VIEW NOTE: No current JEDEC outline for the SMD.5 package. Refer to SMD for package dimensions. The TO-257 is a totally isolated metal package. 1 3 OUT ADJUST IN ADJUST OUT IN3
Ordering Information
MKT. NUMBER TEMP. RANGE (oC) 5962F9954701VUC HS2-117RH-Q -55 to 125 5962F9954701QUC HS2-117RH-8 -55 to 125 5962F9954701VXC HS9S-117RH-Q -55 to 125 5962F9954701QXC HS9S-117RH-8 -55 to 125 5962F9954701VYC HSYE-117RH-Q -55 to 125 5962F9954701QYC HSYE-117RH-8 -55 to 125 HS2-117RH/Proto HS2-117RH/Proto -55 to 125 HS9S-117RH/Proto HS9S-117RH/Proto -55 to 125 HSYE-117RH/Proto HSYE-117RH/Proto -55 to 125 1 - ADJUST 2 - IN 3 - OUT Data Sheet October 2003 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that da ta sheets are current before placing orders. Information furnishe d by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com Die Characteristics DIE DIMENSIONS 2616µm x 2794µm (103 mils x 110 mils) 483µm ±25.4µm (19 mils ±1 mil) INTERFACE MATERIALS Glassivation Type: Silox (SiO 2) Thickness: 8.0kÅ ±1.0kÅ Top Metallization Type: AlSiCu Thickness: 16.0kÅ ±2kÅ Substrate Radiation Hardened Silicon Gate, Dielectric Isolation Backside Finish Gold ASSEMBLY RELATED INFORMATION Substrate Potential Unbiased (DI) ADDITIONAL INFORMATION Worst Case Current Density <2.0 x 105 A/cm2 Transistor Count Metallization Mask Layout HS-117RH VOUTVOUT VINVIN ADJ V OUTK HS-117RH