HS-117RH INTERSIL | Alldatasheet
Document overview
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Technical content
Features
- Electrically Screened to DSSC SMD # 5962-99547
- QML Qualified per MIL-PRF-38535 Requirements
- Radiation Environment - 300kRAD(Si) (Max) - Latch-up Immune - Negligible Low Dose Rate Effects Sensitivity
- Superior Temperature Stability
- Over-Temp and Over-Current/Voltage Protection
Applications
- Switch Mode DC - DC Power Conversion
- Housekeeping Supplies for Motors
- Power Supplies for Robotic Control HSYE-117RH (SMD.5 CLCC) BOTTOM VIEW NOTE: No current JEDEC outline for the SMD.5 package. Refer to SMD for package dimensions. The TO-257 is a totally isolated metal package. ADJUST OUT IN3
Ordering Information
MKT. NUMBER TEMP. RANGE (oC) 5962F9954701VXC HS9S-117RH-Q -55 to 125 5962F9954701QXC HS9S-117RH-8 -55 to 125 5962F9954701/VYA HSYE-117RH-Q -55 to 125 5962F9954701/QYA HSYE-117RH-8 -55 to 125 HS9S-117RH/Proto HS9S-117RH/Proto -55 to 125 HSYE-117RH/Proto HSYE-117RH/Proto -55 to 125 1 - ADJUST 2 - IN 3 - OUT Data Sheet February 2000 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143| Copyright © Intersil Corporation 2000
All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitewww.intersil.com Die Characteristics DIE DIMENSIONS 2616µm x 2794µm (103 mils x 110 mils) 483µm ±25.4µm (19 mils±1 mil) INTERFACE MATERIALS Glassivation: Type: Silox (SiO2) Thickness: 8.0kÅ ±1.0kÅ Top Metallization: Type: AlSiCu Thickness: 16.0kÅ ±2kÅ Substrate: Radiation Hardened Silicon Gate, Dielectric Isolation Backside Finish: Gold ASSEMBLY RELATED INFORMATION Substrate Potential: Unbiased (DI) ADDITIONAL INFORMATION Worst Case Current Density: <2.0 x 105 A/cm2 Transistor Count: Metallization Mask Layout HS-117RH VOUTVOUT VINVIN ADJ V OUTK HS-117RH