HS-0546RH INTERSIL | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 6

Technical content

Features

  • Electrically Screened to SMD # 5962-95693
  • QML Qualified per MIL-PRF-38535 Requirements 4RAD(Si)
  • No Latch-Up
  • No Channel Interaction During Overvoltage
  • Guaranteed r ON Matching
  • Break-Before-Make Switch

Applications

  • Data Acquisition Systems
  • Control Systems
  • TelemetryPinouts HS-0546RH GDIP1-T28 (CERDIP) OR CDIP2-T28 (SBDIP) TOP VIEW HS-0547RH GDIP1-T28 (CERDIP) OR CDIP2-T28 (SBDIP) TOP VIEW

Ordering Information

MKT. NUMBER TEMP. RANGE (oC) 5962D9569301V9A HS0-0546RH-Q 25 5962D9569301VXA HS1-0546RH-Q -55 to 125 5962D9569301VXC HS1B-0546RH-Q -55 to 125 5962D9569302V9A HS0-0547RH-Q 25 5962D9569302VXA HS1-0547RH-Q -55 to 125 5962D9569302VXC HS1B-0547RH-Q -55 to 125 VSUPPLY NC NC IN 16 IN 15 IN 14 IN 13 IN 12 IN 11 IN 10 IN 9 GND VREF ADDRESS A3 OUT IN 8 IN 7 IN 6 IN 5 IN 3 IN 1 ENABLE ADDRESS A0 ADDRESS A1 ADDRESS A0 SUPPLY IN 4 IN 2 +VSUPPLY OUT B NC IN 8B IN 7B IN 6B IN 5B IN 4B IN 3B IN 2B IN 1B GND V REF NC OUT A IN 8A IN 7A IN 6A IN 5A IN 3A IN 1A ENABLE ADDRESS A0 ADDRESS A1 ADDRESS A2 SUPPLY IN 4A IN 2A Data Sheet August 1999 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207| Copyright © Intersil Corporation 1999

†DIGITAL INPUT OVER- CLAMP AND SIGNAL ISOLATION VOLTAGE 5V REF †††† DRIVER DECODER/ IN1 IN2 IN16 A1 A2 A3 EN OUT PROTECTION LEVEL SHIFT VREF † † † A1 A2 EN A0VREF IN1B LEVEL SHIFT OVER- CLAMP AND SIGNAL ISOLATION VOLTAGE 5V REF IN1A IN8A IN8B OUT A DRIVER DECODER/ OUT B †DIGITAL INPUT PROTECTION HS-0546RH TRUTH TABLE A3 A2 A1 A0 EN “ON” CHANNEL XXXXL NONE LLLLH 1 LLLH H 2 LLHLH 3 L LHHH 4 LHLLH 5 LHLHH 6 LHHLH 7 LHHHH 8 HLLLH 9 HLLHH 1 0 HLHLH 1 1 HLHHH 1 2 HHL LH 1 3 HHLHH 1 4 HHHLH 1 5 HHHHH 1 6 HS-0547RH TRUTH TABLE A2 A1 A0 EN “ON” CHANNEL PAIR X X X L NONE LLLH 1 LLH H 2 LHLH 3 LHHH 4 HLLH 5 HLHH 6 HHLH 7 HHHH 8 HS-0546RH, HS-0547RH

Burn-In/Life Test Circuits DYNAMIC AND LIFE TEST NOTES: 1. The Dynamic Test Circuit is utilized for all life testing. 2. V1 = +15V minimum, +16V maximum. 3. V2 = -15V maximum, -16V minimum. 4. R1, R2 = 10kΩ ,±5%, 1/4 or 1/2W (per socket). 5. C1, C2 = 0.01µF minimum (per socket) or 0.1µF minimum (per row). 6. D1, D2 = 1N4002 or equivalent (per board). 40% - 60% duty cycle; VIL = 0.8V maximum; VIH = 4.0V minimum. STATIC NOTES: 8. V1 =+5V minimum,+6V maximum. 9. V2 =+15V minimum,+16V maximum. 10. V3 = -15V maximum, -16V minimum. 11. R1, R2 = 10kΩ , ± 5%, 1/4 or 1/2W (per socket). 12. C1, C2 = 0.01µF minimum (per socket) or 0.1µF minimum (per row). 13. D1, D2 = 1N4002 or equivalent (per board). D2 C2 V2R2 D1C1 D2 C2 V3R2 D1C1 10kΩ +15V +1V +5V NC -15V 10kΩ HS-0546RH, HS-0547RH

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com Die Characteristics DIE DIMENSIONS: 83.9 mils x 159 mils x 19 mils INTERFACE MATERIALS: Glassivation: Type: Nitride Thickness: 7kÅ ±0.7kÅ Top Metallization: Type: Al Thickness: 16kÅ ±2kÅ Substrate: CMOS, DI ASSEMBLY RELATED INFORMATION: Substrate Potential: Unbiased (DI) ADDITIONAL INFORMATION: Worst Case Current Density: 1.4 x 105 A/cm2 Transistor Count: HS-0546 - 485 HS-0547 - 485 Metallization Mask Layout HS-0546RH HS-0547RH EN A1A0 A3 A2 V REF GND IN 9 IN 10 IN 11 IN 12 IN 13 IN 14 IN 15 IN 16 IN 1 IN 2 IN 3 IN 4 IN 5 IN 6 IN 7 IN 8 -V OUT +V NC EN A1A0 NC A2 V REF GND IN 1B IN 2B IN 3B IN 4B IN 5B IN 6B IN 7B IN 8B IN 1A IN 2A IN 3A IN 4A IN 5A IN 6A IN 7A IN 8A -V OUT A +V OUT B HS-0546RH, HS-0547RH