HS-26CT31RH-T INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • QML Class T, Per MIL-PRF-38535
  • Radiation Performance
  • EIA RS-422 Compatible Outputs (Except for IOS)
  • TTL Compatible Inputs
  • High Impedance Outputs when Disabled or Powered Down
  • Low Power Dissipation 2.75mW Standby (Max)
  • Single 5V Supply
  • Low Output Impedance 10Ω or Less
  • Full -55 oC to 125oC Military Temperature Range Pinouts HS1-26CT31RH-T (SBDIP), CDIP2-T16 TOP VIEW HS9-26CT31RH-T (FLATPACK), CDFP4-F16 TOP VIEW

Ordering Information

TEMP. RANGE (oC) 5962R9563201TEC HS1-26CT31RH-T -55 to 125 HS1-26C31RH/Proto HS1-26C31RH/Proto -55 to 125 5962R9563201TXC HS9-26C31RH-T -55 to 125 HS9-26C31RH/Proto HS9-26C31RH/Proto -55 to 125 NOTE: Minimum order quantity for -T is 150 units through distribution, or 450 units direct. AIN AO AO ENABLE BO BO GND BIN VDD DO DO ENABLE CO CO CIN DIN AIN AO AO ENABLE BO BO BIN GND 11 6 VDD DIN DO DO ENABLE CO CO CIN Data Sheet July 1999 File Number 4590.1

OFF (0V) X X X HI-Z HI-Z ENABLE ENABLE AIN AO BIN BO CIN CO DIN DO DO CO BO AO HS-26CT31RH-T

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com Die Characteristics DIE DIMENSIONS: 2450µm x 4950µm x 533µm ±25.4µm (97 x 195 x 21mils±1mil) METALLIZATION: M1: Mo/Tiw Thickness: 5800Å M2: Al/Si/Cu Thickness: 10k Å ±1kÅ SUBSTRATE POTENTIAL: Internally connected to VDD. May be left floating. BACKSIDE FINISH: Silicon PASSIVATION: Type: SiO2 Thickness: 8kÅ ±1kÅ WORST CASE CURRENT DENSITY: < 2.0e5 A/cm2 TRANSISTOR COUNT: 285 PROCESS: Radiation Hardened CMOS, AVLSI Metallization Mask Layout HS-26CT31RH (14) DO (13)DO (12)ENABLE (11)CO (10) CO AO (2) AO (3) ENABLE (4) BO (5) BO (6) BIN (7) GND (8) CIN (9) GND (8) (1) AIN (16) VDD (15) DIN (16) VDD HS-26CT31RH-T