HS-201HSRH INTERSIL | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 2
Technical content
Features
- Electrically Screened to DSCC SMD 5962-99618
- QML Qualified per MIL-PRF-38535
- Radiation Performance - Only Very Slightly Sensitive to Low Dose Rates (Vertical PNP and NPN device architectures)
- Fast Switching Times
- Pin Compatible with Industry Standard 201 Types
- TTL Compatible
Applications
- High Speed Multiplexing
- Sample and Hold Circuits
- Digital Filters
- Operational Amplifier Gain Switching Networks
- Integrator Reset Circuits Pinout HS1-201HSRH, SBDIP (CDIP2-T16) HS9-201HSRH, FLATPACK (CDFP4-F16) TOP VIEW
Ordering Information
MKT. NUMBER TEMP. RANGE ( oC) 5962F9961801VEC HS1-201HSRH-Q -55 to 125 5962F9961801QEC HS1-201HSRH-8 -55 to 125 5962F9961801VXC HS9-201HSRH-Q -55 to 125 5962F9961801QXC HS9-201HSRH-8 -55 to 125 5962F9961801V9A HS0-201HSRH-Q -55 to 125 HS1-201HSRH/PROTO HS1-201HSRH/PROTO -55 to 125 OUT1 IN1 GND IN4 OUT4 IN2 NC IN3 OUT3 OUT2 Data Sheet June 2000
All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitewww.intersil.com Die Characteristics DIE DIMENSIONS 2667µm x 4623µm (105 mils x 182 mils) Thickness: 483µm ±25.4µm (19 mils±1 mil) INTERFACE MATERIALS Glassivation Type: Phosphorus Silicon Glass (PSG) Thickness: 8.0kÅ +/-1.0kÅ Metallization Type: Ti/AlCu Thickness: 16.0kÅ +/- 2kÅ Substrate Rad Hard Silicon Gate, Dielectric Isolation Backside Finish Silicon ASSEMBLY RELATED INFORMATION Substrate Potential Unbiased (DI) ADDITIONAL INFORMATION Worst Case Current Density <2.0 x 105 A/cm2 Transistor Count 328 Metallization Mask Layout HS-201HSRH OUT4 IN4 GND V- IN1 OUT3 IN3 V+ IN2 OUT2 OUT1 HS-201HSRH