HS-139RH_04 INTERSIL | Alldatasheet
Document overview
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Technical content
Features
- QML Qualified Per MIL-PRF-38535 Requirements
- Radiation Environment - Latch-up Free Under any Conditions - Low Dose Rate Effects Immunity
- 100V Output Voltage Withstand Capability
- ESD Protection to >3000V
- Differential Input Voltage Range Equal to the Supply Voltage
Applications
- Pulse Generators
- Timing Circuitry
- Level Shifting
- Analog to Digital Conversion Pinouts s HS-139RH (SBDIP CDIP2-T14) TOP VIEW HS-139RH (FLATPACK CDFP3-F14) TOP VIEW
Ordering Information
MKT. NUMBER TEMP. RANGE (oC) 5962F9861301VCC HS1-139RH-Q -55 to 125 5962F9861301QCC HS1-139RH-8 -55 to 125 HS1-139RH/Proto HS1-139RH/Proto -55 to 125 5962F9861301VXC HS9-139RH-Q -55 to 125 5962F9861301QXC HS9-139RH-8 -55 to 125 HS9-139RH/Proto HS9-139RH/Proto -55 to 125 OUT 2 OUT 1 - IN 1 + IN 1 - IN 2 + IN 2 OUT 3 OUT 4 GND + IN 4 - IN 4 + IN 3 - IN 3 1OUT 2 OUT 1 - IN 1 + IN 1 - IN 2 +IN 2 OUT 3 OUT 4 GND + IN 4 - IN 4 + IN 3 - IN 3 Data Sheet December 22, 2004 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1999, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnishe d by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN3573.3 December 22, 2004 Die Characteristics DIE DIMENSIONS: 3750µm x 2820µm (148 mils x 111 mils) 483µm ± 25.4µm (19 mils ± 1 mil) INTERFACE MATERIALS: Glassivation: Type: Silox (SiO2) Thickness: 8.0kÅ ± 1.0kÅ Top Metallization: Type: AlSiCu Thickness: 16.0kÅ ± 2kÅ Substrate: Radiation Hardened Silicon Gate, Dielectric Isolation Backside Finish: Silicon ASSEMBLY RELATED INFORMATION: Substrate Potential: Unbiased (DI) ADDITIONAL INFORMATION: Worst Case Current Density: <2.0 x 105 A/cm2 Transistor Count: Metallization Mask Layout HS-139RH GND +IN4 -IN4 V+ -IN1 +IN1 +IN3 -IN3 +IN2 -IN2 OUT4 OUT3 OUT2 OUT1 (9) (8) (7) (6) (5)(4)(3) (2) (1) (14) (13) (12) (11) (10) HS-139RH