HS-OP470ARH RENESAS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 6

Technical content

Features

  • Electrically screened to SMD # 5962-98533
  • QML qualified per MIL-PRF-38535 requirements
  • Radiation acceptance testing - HS-OP470AEH
  • Radiation acceptance testing - HS-OP470ARH
  • L o w n o i s e

Applications

  • High Q, active filters
  • Voltage regulators
  • I n t e g r a t o r s
  • Signal generators
  • Voltage references
  • Space environments OUT 1 -IN1 +IN1 +IN2 -IN2 OUT 2 OUT 3 OUT 4 -IN3 +IN3 +IN4 -IN4

HS-OP470ARH, HS-OP470AEH FN4471 Rev.4.0 Page 2 of 5 May 18, 2021

Ordering Information

NUMBER (Note 1) PART NUMBER (Note 2) RADIATION HARDNESS (Total Ionizing Dose) PACKAGE

DESCRIPTION

(RoHS Compliant) PKG. DWG. # CARRIER TYPE TEMP. RANGE 5962R9853302VXC HS9-OP470AEH-Q HDR to 100krad(Si), LDR to 50krad(Si) 14 Ld Flatpack K14.A Tray -55 to +125°C 5962R9853302V9A HS0-OP470AEH-Q ( Note 3)D i e - - N/A HS0-OP470AEH/SAMPLE (Notes 3, 4) N/A Die - - HS9-OP470AEH/PROTO (Note 4) 14 Ld Flatpack K14.A Tray 5962R9853301QXC HS9-OP470ARH-8 No longer available or supported HDR to 100krad(Si) 14 Ld Flatpack K14.A Tray 5962R9853301VXC HS9-OP470ARH-Q No longer available or supported 5962R9853301V9A HS0-OP470ARH-Q ( Note 3) No longer available or supported Die - - N/A HS0-OP470ARH/SAMPLE (Notes 3, 4) No longer available or supported N/A Die - - HS9-OP470ARH/PROTO (Note 4) No longer available or supported 14 Ld Flatpack K14.A Tray HS-OP470AEHEV1Z (Note 5) Evaluation Board 1. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed must be used when ordering. 2. These Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. 3. Die product tested at T A = + 25°C. The wafer probe test includes functional and parametric testing sufficient to make the die capable of meeting the electrical performance outlined in the SMD. 4. The /PROTO and /SAMPLE are not rated or certified for Total Ioni zing Dose (TID) or Single Event Effect (SEE) immunity. These parts are intended for engineering evaluation purposes only. The /PROTO parts meet the electrical limits and conditions across temperature specified in the DLA SMD and are in the same form and fit as the qualified device. The /SAMPLE parts are capable of meeting the electrical limits and conditions specified in the DLA SMD. The /SAMPLE parts do not receive 100% screening across temperature to the DLA SMD electrical limits. These part types do not come with a Certificate of Conformance because they are not DLA qualified devices. 5. Evaluation board uses the /PROTO parts. The /PROTO parts are no t rated or certified for Total Ionizing Dose (TID) or Single Event Effect (SEE) immunity.

HS-OP470ARH, HS-OP470AEH FN4471 Rev.4.0 Page 3 of 5 May 18, 2021 Die Characteristics DIE DIMENSIONS: 95mils x 99mils x 19 mils ±1mil (2420µm x 2530µm x 483µm ±25.4µm) INTERFACE MATERIALS: Glassivation: Type: Silox (SIO2) 1:6:1 Thickness: 8kÅ ±0.8kÅ (1kÅ undopped, 6kÅ dopped, cap 1kÅ undopped) Top Metallization: Type: Al/Cu 16kÅ ±2kÅ Substrate: Dielectrically Isolated (DI) Backside Finish: Silicon ASSEMBLY RELATED INFORMATION: Substrate potential: Unbiased Special assembly instructions None ADDITIONAL INFORMATION: Worst Case Current Density: <2.0 x 105 A/cm2 Transistor Count: 175 Metallization Mask Layout +IN2 V+ +IN1 -IN1 OUT1 OUT4 -IN4-IN3 OUT3 OUT2 -IN2 +IN4V-+IN3

HS-OP470ARH, HS-OP470AEH FN4471 Rev.4.0 Page 4 of 5 May 18, 2021 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please visit our website to make sure you have the latest revision. DATE REVISION CHANGE May 18, 2021 4.0 Updated Radiation Acceptance testing features bullets. Updated the Ordering Information table. Updated Die Characteristics for Glassivation, Top Metalization, Substrate, and Assembly Related Information to match information in the SMD 5962-98533. Sep 21, 2018 3.0 Added Related Literature section. Updated the Ordering Information table by adding HS0-OP470AEH/SAMPLE and HS0-OP470AEH/PROTO parts, removing part marking column, and adding Notes 3 and 4. Added Revision History section. Updated Disclaimer.

HS-OP470ARH, HS-OP470AEH FN4471 Rev.4.0 Page 5 of 5 May 18, 2021 Ceramic Metal Seal Flatpack Packages (Flatpack) NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. Alternatel y, a tab (dimension k) may be used to identify pin one. 2. If a pin one identification mark is used in addition to a tab, the limits of dimension k do not apply. 3. This dimension allows for off-c enter lid, meniscus, and glass over- run. 4. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 5. N is the maximum number of terminal positions. 6. Measure dimension S1 at all four corners. 7. For bottom-brazed lead packages, no organic or polymeric materi- als shall be molded to the bottom of the package to cover the leads. 8. Dimension Q shall be measured at the point of exit (beyond the me- niscus) of the lead from the body. Dimension Q minimum shall be reduced by 0.0015 inch (0.038mm) maximum when solder dip lead finish is applied. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH. -D- -C-

0.004 H A - BM DS S

-A- -B-

0.036 H A - BM DS S

e E A Q L D A SEATING AND LE2 E3 E3 BASE PLANE -H- b C M (c) (b) SECTION A-A BASE LEAD FINISH METAL PIN NO. 1 ID AREA A M K14.A MIL-STD-1835 CDFP3-F14 (F-2A, CONFIGURATION B)

14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE

A 0.045 0.115 1.14 2.92 - b 0.015 0.022 0.38 0.56 - b1 0.015 0.019 0.38 0.48 - c 0.004 0.009 0.10 0.23 - c1 0.004 0.006 0.10 0.15 - D - 0.390 - 9.91 3 E 0.235 0.260 5.97 6.60 - E 1 -0 . 2 9 0 -7 . 1 1 3 E3 0.030 - 0.76 - 7 e 0.050 BSC 1.27 BSC - k 0.008 0.015 0.20 0.38 2 L 0.270 0.370 6.86 9.40 - Q 0.026 0.045 0.66 1.14 8 S1 0.005 - 0.13 - 6 N1 4 1 4- Rev. 0 5/18/94 For the most recent package outline drawing, see K14.A.

TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com Contact Information For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners. IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Rev.1.0 Mar 2020)