HS-5104ARH INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • Electrically Screened to SMD # 5962-95690
  • QML Qualified per MIL-PRF-38535 Requirements
  • Radiation Environment 5RAD(Si)
  • Low Noise

Applications

  • High Q, Active Filters
  • Voltage Regulators
  • Integrators
  • Signal Generators
  • Voltage References
  • Space Environments Pinouts HS-5104ARH (SBDIP) CDIP2-T14 TOP VIEW HS-5104ARH (FLATPACK) CDFP3-F14 TOP VIEW

Ordering Information

MKT. NUMBER TEMP.RANGE (oC) 5962R9569001V9A HS0-5104ARH-Q 25 5962R9569001VCC HS1-5104ARH-Q -55 to 125 5962R9569001VXC HS9-5104ARH-Q -55 to 125 HS1-5104ARH/PROTO HS1-5104ARH/PROTO -55 to 125 OUT 1 -IN1 +IN1 +IN2 -IN2 OUT 2 OUT 3 OUT 4 -IN3 +IN3 +IN4 -IN4 OUT 1 -IN1 +IN1 +IN2 -IN2 OUT 2 OUT 3 OUT 4 -IN3 +IN3 +IN4 -IN4 Data Sheet August 1999 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

NOTES: 2. C1 = C2 = 0.01µF/Socket (Min) or 0.1µF/Row (Min) 3. D1 = D2 = IN4002 or Equivalent/Board Irradiation Circuit NOTES: 5. +V = 15V 6. -V = -15V 7. Group E Sample Size = 4 Die Per Wafer 1 4 2 3C1 C2D2 +- +- +-+- +15V -15V (ONE OF FOUR) HS-5104ARH

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com Die Characteristics DIE DIMENSIONS: 95 mils x 99 mils x 19 mils±1 mils (2420µm x 2530µm x 483µm ±25.4µm) INTERFACE MATERIALS: Glassivation: Type: Nitride (SI3N4) over Silox (SIO2, 5% Phos.) Silox Thickness: 12kÅ ±2kÅ Nitride Thickness: 3.5kÅ ±1.5kÅ Top Metallization: Type: Al, 1% Cu Thickness: 16kÅ ±2kÅ Substrate: Bipolar Dielectric Isolation Backside Finish: Silicon ASSEMBLY RELATED INFORMATION: Substrate Potential (Powered Up): Unbiased ADDITIONAL INFORMATION: Worst Case Current Density: <2.0 x 105 A/cm2 Transistor Count: 175 Metallization Mask Layout HS-5104ARH +IN2 V+ +IN1 -IN1 OUT1 OUT4 -IN4-IN3 OUT3 OUT2 -IN2 +IN4V-+IN3 HS-5104ARH