HS-4423RH_14 INTERSIL | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 3

Technical content

Features

  • Electrically screened to DLA SMD # 5962-99511
  • QML qualified per MIL-PRF-38535 requirements
  • EH version acceptance tested to 50krad(Si) (LDR)
  • R a d i a t i o n e n v i r o n m e n t - Latch-up immune - Low dose rate immune
  • Low voltage lock-out feature
  • Consistent delay times with V CC changes
  • L o w p o w e r c o n s u m p t i o n - 40mW with inputs high - 20mW with inputs low

Applications

  • Switching power supplies
  • D C / D C c o n v e r t e r s
  • M o t o r c o n t r o l l e r s Pin Configuration HS-4423RH, HS-4423EH, HS-4423BRH, HS-4423BEH (FLATPACK CDFP4-F16) TOP VIEW NC IN A NC GND A GND B NC IN B NC 11 6 NC OUT A OUT A VCC VCC OUT B OUT B NC NOTE: Pins 4 and 5, 10 and 11, 12 and 13, 14 and 15 are double-bonded to their same electrical points on the die. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2002, 2014. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. February 11, 2014 FN4564.5

HS-4423RH, HS-4423EH, HS-4423BRH, HS-4423BEH 2 FN4564.5 February 11, 2014

Ordering Information

(Note 2) PART NUMBER (Note 1) TEMPERATURE RANGE (°C) PACKAGE (RoHS Compliant) PKG. DWG. # 5962F9951101VXC HS9-4423RH-Q -55 to +125 16 Ld Flatpack K16.A 5962F9951101QXC HS9-4423RH-8 -55 to +125 16 Ld Flatpack K16.A HS9-4423RH/PROTO HS9-4423RH/PROTO -55 to +125 16 Ld Flatpack K16.A 5962F9951102VXC HS9-4423BRH-Q -55 to +125 16 Ld Flatpack K16.A 5962F9951102QXC HS9-4423BRH-8 -55 to +125 16 Ld Flatpack K16.A 5962F9951103VXC HS9-4423EH-Q -55 to +125 16 Ld Flatpack K16.A 5962F9951104VXC HS9-4423BEH-Q -55 to +125 16 Ld Flatpack K16.A HS9-4423BRH/PROTO HS9-4423BRH/PROTO -55 to +125 16 Ld Flatpack K16.A 5962F9951101V9A HS0-4423RH-Q -55 to +125 Die 5962F9951103V9A HS0-4423EH-Q -55 to +125 Die NOTES: 1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. 2. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed in the “Ordering Information” table must be used when ordering.

HS-4423RH, HS-4423EH, HS-4423BRH, HS-4423BEH Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN4564.5 February 11, 2014 For additional products, see www.intersil.com/en/products.html Die Characteristics DIE DIMENSIONS: 4890µm x 3370µm (193 mils x 133 mils) Thickness: 483µm ± 25.4µm (19 mils ± 1 mil) INTERFACE MATERIALS: Glassivation: Type: PSG (Phosphorous Silicon Glass) Thickness: 8.0kÅ ± 1.0kÅ Top Metallization: Type: AlSiCu Thickness: 16.0kÅ ± 2kÅ Substrate: Radiation Hardened Silicon Gate, Dielectric Isolation Backside Finish: Silicon ASSEMBLY RELATED INFORMATION: Substrate Potential: Unbiased (DI) ADDITIONAL INFORMATION: Worst Case Current Density: <2.0 x 105 A/cm2 Transistor Count: 125 Metallization Mask Layout HS-4423RH, HS-4423EH, HS-4423BRH, HS-4423BEH GND (5) IN B (7) OUT B (10) OUT B (11) VCC (12) VCC (13) GND (4) IN A (2) OUT A (15) OUT A (14)