HS-201HSRH RENESAS | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 7
Technical content
Features
- Electrically screened to DLA SMD# 5962-99618
- QML qualified per MIL-PRF-38535
- Radiation performance
- Fast switching times
- Pin compatible with industry standard 201 types
- TTL compatible
Applications
- High speed multiplexing
- Sample and hold circuits
- Digital filters
- Operational amplifier gain switching networks
- Integrator reset circuits Pin Configuration HS1-201HSRH, HS1-201HSEH SBDIP (CDIP2-T16) HS9-201HSRH, HS9-201HSEH FLATPACK (CDFP4-F16) TOP VIEW IN1 GND IN4 IN2 NC IN3
HS-201HSRH, HS-201HSEH FN4874 Rev 4.00 Page 2 of 7 February 21, 2017
Ordering Information
(Note 2) INTERNAL MKT. NUMBER (Note 1) TEMP. RANGE (°C) PACKAGE (RoHS COMPLIANT) PKG. DWG. # 5962F9961801VEC HS1-201HSRH-Q -55 to +125 16 Ld SBDIP D16.3 5962F9961802VEC HS1-201HSEH-Q -55 to +125 16 Ld SBDIP D16.3 5962F9961801QEC HS1-201HSRH-8 -55 to +125 16 Ld SBDIP D16.3 5962F9961801VXC HS9-201HSRH-Q -55 to +125 16 Ld Flatpack K16.A 5962F9961802VXC HS9-201HSEH-Q -55 to +125 16 Ld Flatpack K16.A 5962F9961801QXC HS9-201HSRH-8 -55 to +125 16 Ld Flatpack K16.A 5962F9961801V9A HS0-201HSRH-Q -55 to +125 Die 5962F9961802V9A HS0-201HSEH-Q -55 to +125 Die N/A HS1-201HSRH/PROTO ( Note 3 ) -55 to +125 16 Ld SBDIP D16.3 N/A HS9-201HSRH/PROTO ( Note 3) -55 to +125 16 Ld Flatpack K16.A N/A HS0-201HSRH/SAMPLE ( Note 3) -55 to +125 Die NOTES: 1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. 2. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The listed SMD numbers must be used when ordering. 3. The /PROTO and /SAMPLE are not rated or certified for Total Ionizing Dose (TID) or Single Event Effect (SEE) immunity. These parts are intended for engineering evaluation purposes only. The /PROTO parts meet the electrical limits and conditions over-temperature specified in the DLA SMD and are in the same form and fit as the qualified device. The /SAMPLE die is capable of meeting the electrical limits and conditions specified in the DLA SMD at +25°C only. The /SAMPLE is a die and does not receive 100% screening over-temperature to the DLA SMD electrical limits. These part types do not come with a Certificate of Conformance because there is no Radiation Assurance testing and they are not DLA qualified devices.
FIGURE 1. HS-201HSRH AND HS-201HSEH MASK LAYOUT
otherwise under any patent or patent rights of Intersil or its subsidiaries. © Copyright Intersil Americas LLC 2000-2017. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. TABLE 1. LAYOUT X-Y COORDINATES
03 S1 935 280
04 V- 1733 280
05 GND 3345 280
06 S4 4097 280
11 S3 4097 2433
12 No Pad - -
13 V+ 1733 2433
14 S2 935 2433
- Origin of coordinates is the u pper right hand corner of the die.
- Pad numbers are increased counter clockwise around the die.
HS-201HSRH, HS-201HSEH FN4874 Rev 4.00 Page 5 of 7 February 21, 2017 About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing, and high-end consumer markets. For the most updated datasheet, application notes, related documentation, and related parts, see the respective product information page found at www.intersil.com. For a listing of definitions and abbreviations of common terms used in our documents, visit: www.intersil.com/glossary. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please visit our website to make sure that you have the latest revision. DATE REVISION CHANGE February 21, 2017 FN4874.4 Changed die dimensio n from 2790µm x 4950µm (110 mils x 195 mils) to 4950µm x 2970µm (195mils x 117 mils). Added Table 1 “LAYOUT X-Y COORDINATES”. Changed pin names to match the pin names in the SMD data sheet. Added Revision History and About Intersil sections.
HS-201HSRH, HS-201HSEH FN4874 Rev 4.00 Page 6 of 7 February 21, 2017 Package Outline Drawing K16.A
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
Rev 2, 1/10 SIDE VIEW TOP VIEW SECTION A-A -D- -C- SEATING AND BASE PLANE -H- BASE LEAD FINISH METAL PIN NO. 1 ID AREA 0.022 (0.56) 0.015 (0.38) 0.050 (1.27 BSC) 0.440 (11.18) 0.005 (0.13) MIN MAX 0.115 (2.92) 0.026 (0.66) 0.285 (7.24) 0.245 (6.22) 0.009 (0.23) 0.004 (0.10) 0.370 (9.40) 0.250 (6.35) 0.03 (0.76) MIN 0.13 (3.30) MIN 0.006 (0.15) 0.004 (0.10) 0.009 (0.23) 0.004 (0.10) 0.019 (0.48) 0.015 (0.38) 0.0015 (0.04) MAX 0.022 (0.56) 0.015 (0.38) 0.015 (0.38) 0.008 (0.20) PIN NO. 1 ID OPTIONAL 1 2 LEAD FINISH adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. Alternately, a tab may be used to identify pin one. of the tab dimension do not apply. 3. The maximum limits of lead dimensions (section A-A) shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. shall be molded to the bottom of the package to cover the leads. meniscus) of the lead from the body. Dimension minimum shall be reduced by 0.0015 inch (0.038mm) maximum when solder dip lead finish is applied. NOTES: Dimensioning and tolerancing per ANSI Y14.5M - 1982. Controlling dimension: INCH. Index area: A notch or a pin one identification mark shall be located If a pin one identification mark is used in addition to a tab, the limits Measure dimension at all four corners. For bottom-brazed lead packages, no organic or polymeric materials Dimension shall be measured at the point of exit (beyond the For the most recent package outline drawing, see K16.A.
HS-201HSRH, HS-201HSEH FN4874 Rev 4.00 Page 7 of 7 February 21, 2017 Ceramic Dual-In-Line Metal Seal Packages (SBDIP) NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. Dimension Q shall be measured from the seating plane to the base plane. 6. Measure dimension S1 at all four corners. 7. Measure dimension S2 from the top of the ceramic body to the nearest metallization or lead. 8. N is the maximum number of terminal positions. 9. Braze fillets shall be concave. 10. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 11. Controlling dimension: INCH. bbb C A - BS c Q L A SEATING BASE D PLANE PLANE S S -D--A- -C- eA -B- aaa C A - BM DS Sccc C A - BM DS S D E b A e M (c) (b) SECTION A-A BASE LEAD FINISH METAL eA/2 M A D16.3 MIL-STD-1835 CDIP2-T16 (D-2, CONFIGURATION C)
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE
A- 0.200 - 5.08 - b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 D- 0.840 - 21.34 - E 0.220 0.310 5.59 7.87 - e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC - eA/2 0.150 BSC 3.81 BSC - L 0.125 0.200 3.18 5.08 - Q 0.015 0.060 0.38 1.52 5 S1 0.005 - 0.13 -6 S2 0.005 - 0.13 -7 a9 0 o 105o 90o 105o - aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - ccc - 0.010 - 0.25 - M- 0.0015 - 0.038 2 N1 6 1 6 8 Rev. 0 4/94 For the most recent package outline drawing, see D16.3.