HH03N100B501CT | DigiCamel IC Datasheet

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HH15N100G500CT WALSIN | Alldatasheet

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Multilayer Ceramic Capacitors Approval Sheet Page 1 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 *Contents in this sheet are subject to change without prior notice. MULTILAYER CERAMIC CAPACITORS High Q / Low ESR Series (HH) 0201 to 0805 Sizes NP0 Dielectric Halogen Free & RoHS Compliance

Multilayer Ceramic Capacitors Approval Sheet Page 2 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 1. INTRODUCTION MLCC consists of a conducting material and electrodes. To manufacture a chip-type SMT and achieve miniaturization, high density and high efficiency, ceramic condensers are used. WTC HH series MLCC is used at high frequencies generally have a small temperature coefficient of capacitance, typical within the ±30ppm/° C required for NP0 (C0G) classification and have excellent conductivity internal electrode. Thus, WTC HH series MLCC will be with the feature of low ESR and high Q characteristics. 4. HOW TO ORDER HH 15 N 100 G 500 C T Series HH =High Q/ Low ESR Size 03 =0201 (0603) 15 =0402 (1005) 18 =0603 (1608) 21 =0805 (2012) Dielectric N =NP0 (C0G) Capacitance Two significant digits followed by no. of zeros. And R is in place of decimal point. eg.: R47=0.47pF 0R5=0.5pF 1R0=1.0pF 100=10x10 =10pF Tolerance A=±0.05pF B =±0.1pF C =±0.25pF D =±0.5pF F=±1% G =±2% J=±5% Rated voltage Two significant digits followed by no. of zeros. And R is in place of decimal point. 100=10 VDC 160 =16 VDC 250 =25 VDC 500 =50 VDC 101 =100 VDC 201 =200 VDC 251 =250 VDC 501 =500 VDC 631 =630 VDC Termination C =Cu/Ni/Sn Packaging T=7” reeled G =13” reeled 2. FEATURES a. High Q and low ESR performance at high frequency. b. Quality improvement of telephone calls for low power loss and better performance. 3. APPLICATIONS a. Mobile telecommunication: Mobile phone, WLAN. b. RF module: Power amplifier, VCO. c. Tuners.

Multilayer Ceramic Capacitors Approval Sheet Page 3 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 5. EXTERNAL DIMENSIONS 6. GENERAL ELECTRICAL DATA Dielectric NP0 Size 0201, 0402, 0603, 0805 Capacitance* 0.1pF to 3300pF Capacitance tolerance Cap ≤5pF #1 : A (±0.05pF), B (±0.1pF), C (±0.25pF) 5pF<Cap<10pF: C (±0.25pF), D (±0.5pF) Rated voltage (WVDC) 10V, 16V, 25V, 50V, 100V, 200V, 250V, 500V, 630V Q* Cap<30pF: Q ≥400+20C Cap ≥30pF: Q ≥1000 Insulation resistance at Ur ≥10G Ω or RxC ≥100 Ω-F whichever is smaller. Operating temperature -55 to +125° C Capacitance change ±30ppm Termination Ni/Sn (lead-free termination) #1: NP0, 0.1pF product only provide B tolerance * Measured at the conditions of 25° C ambient temperature and 30~70% related humidity. 7. PACKAGING DIMENSION AND QUANTITY Size Thickness (mm)/Symbol Paper tape Plastic tape 7” reel 13” reel 7” reel 13” reel 0201 0.30±0.03 L 15,000 70,000 - - 0402 0.50±0.05 N 10,000 50,000 - - 0603 0.80±0.07 S 4,000 15,000 - - 0.80 +0.15/-0.10 X 0805 0.60±0.10 A 4,000 15,000 - - 0.80±0.10 B 1.25±0.10 D - - 3,000 10,000 Unit: pieces T W L MB MB Fig. 1 The outline of MLCC Size Inch (mm) L (mm) W (mm) T (mm)/Symbol Remark M B (mm) +0.05/-0.10 0603 (1608) 0.40±0.15 1.60 +0.15/-0.10 0.80 +0.15/-0.10 0.80 +0.15/-0.10 X 0.60±0.10 A 1.25±0.10 D # # Reflow soldering only is recommended.

Multilayer Ceramic Capacitors Approval Sheet Page 4 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 8. CAPACITANCE RANGE DIELECTRIC NP0 SIZE 0201 0402 0603 0805 Rated Voltage 10 16 25 50 16 25 50 100 16 25 50 100 200 50 100 200 250 500 630 Capacitance 0.1pF (0R1) N N N N 0.2pF (0R2) N N N N 0.3pF (0R3) L L L L N N N N 0.4pF (0R4) L L L L N N N N 0.5pF (0R5) L L L L N N N N S S S S S B B 0.6pF (0R6) L L L L N N N N S S S S S B B 0.7pF (0R7) L L L L N N N N S S S S S B B 0.8pF (0R8) L L L L N N N N S S S S S B B 0.9pF (0R9) L L L L N N N N S S S S S B B 1.0pF (1R0) L L L L N N N N S S S S S B B B B B B 1.2pF (1R2) L L L L N N N N S S S S S B B B B B B 1.5pF (1R5) L L L L N N N N S S S S S B B B B B B 1.8pF (1R8) L L L L N N N N S S S S S B B B B B B 2.2pF (2R2) L L L L N N N N S S S S S B B B B B B 2.7pF (2R7) L L L L N N N N S S S S S B B B B B B 3.3pF (3R3) L L L L N N N N S S S S S B B B B B B 3.9pF (3R9) L L L L N N N N S S S S S B B B B B B 4.7pF (4R7) L L L L N N N N S S S S S B B B B B B 5.6pF (5R6) L L L L N N N N S S S S S B B B B B B 6.8pF (6R8) L L L L N N N N S S S S S B B B B B B 8.2pF (8R2) L L L L N N N N S S S S S B B B B B B 10pF (100) L L L L N N N N S S S S S B B B B B B 12pF (120) L L L L N N N N S S S S B B B B B B 15pF (150) L L L L N N N N S S S S B B B B B B 18pF (180) L L L L N N N N S S S S B B B B B B 22pF (220) L L L L N N N N S S S S B B B B B B 27pF (270) L L L L N N N N S S S S B B B B B B 33pF (330) L L L L N N N N S S S S B B B B B B 39pF (390) N N N N S S S S B B B B B B 47pF (470) N N N N S S S S B B B B B B 56pF (560) N N N N S S S S B B B B B B 68pF (680) N N N N S S S S B B B B B B 82pF (820) N N N N S S S S B B B B B B 100pF (101) N N N N S S S S B B B B B B 120pF (121) N N N N S S S S D D D D D D 150pF (151) N N N N S S S S D D D D D D 180pF (181) N N N N S S S S D D D D 220pF (221) N N N N S S S S D D D D 270pF (271) N N N S S S S D D D D 330pF (331) N N N S S S S D D D D 390pF (391) N N N S S S S D D D D 470pF (471) N N N S S S S 560pF (561) S S S S 680pF (681) S S S S 820pF (821) S S S S 1,000pF (102) S S S S 1,200pF (122) X X X 1,500pF (152) X X X 1,800pF (182) X X X 2,200pF (222) X X X 2,700pF (272) X X X 3,300pF (332) X X X 1. The letter in cell is expressed the symbol of product thickness. 2. For more information about products with special capacitance or other data, please contact WTC local representative.

Multilayer Ceramic Capacitors Approval Sheet Page 5 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 9. ELECTRICAL CHARACTERISTICS Fig. 3 ESR vs. Frequency (0402 size) Z vs Frequency 0201 1.0 10.0 100.0 1000.0 100 1000 10000 Freq(MHz) Z(ohm) 1 pF 4.7 pF 10 pF 33 pF Fig. 6 Impedance vs. Frequency. (0201 size) Fig. 7 Impedance vs. Frequency (0402 size) Q vs Frequency 0201 100 1000 10000 100 1000 10000 Freq(MHz) Q 1 pF 4.7 pF 10 pF 33 pF Fig. 4 Q vs. Frequency (0201 size) Fig. 5 Q vs. Frequency (0402 size) ESR vs Frequency 0201 0.010 0.100 1.000 100 1000 10000 Freq(MHz) ESR(ohm) 1 pF 4.7 pF 10 pF 33 pF Fig. 2 ESR vs. Frequency (0201 size)

Multilayer Ceramic Capacitors Approval Sheet Page 6 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 Fig. 8 ESR vs. Frequency (0603 size) ESR vs Frequency 0805 0.010 0.100 1.000 100 1000 10000 Freq(MHz) ESR(ohm) 1 pF 4.7 pF 10 pF 100 pF Fig. 9 ESR vs. Frequency (0805 size) Fig.12 Impedance vs. Frequency. (0603 size) Fig.14 Self resonance frequency vs. Capacitance Z vs Frequency 0805 0.1 1.0 10.0 100.0 1000.0 100 1000 10000 Freq(MHz) Z(ohm) 1 pF 4.7 pF 10 pF 100 pF Fig.13 Impedance vs. Frequency (0805 size) Fig. 10 Q vs. Frequency (0603 size) Q vs Frequency 0805 100 1000 10000 100 1000 10000 Freq(MHz) Q 1 pF 4.7 pF 10 pF 100 pF Fig. 11 Q vs. Frequency (0805 size)

Multilayer Ceramic Capacitors Approval Sheet Page 7 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 10. RELIABILITY TEST CONDITIONS AND REQUIREMENTS No. Item Test Conditions Requirements 1. Visual and Mechanical --- * No remarkable defect. * Dimensions to conform to individual specification sheet. 2. Capacitance Cap ≤1000pF, 1.0±0.2Vrms, 1MHz±10% Cap>1000pF, 1.0±0.2Vrms, 1KHz±10% At 25° C ambient temperature. * Shall not exceed the limits given in the detailed spec. 3. Q/ D.F. (Dissipation Factor) * NP0: Cap ≥30pF, Q ≥1000; Cap<30pF, Q ≥400+20C 4. Dielectric Strength * To apply voltage: ( ≤100V ) 250% of rated voltage. * Duration: 1 to 5 sec. * Charge and discharge current less than 50mA. * No evidence of damage or flash over during test. * To apply voltage: 200V~300V ≥2 times VDC 500V~999V ≥1.5 times VDC * Cut-off, set at 10mA * TEST= 15 sec. * RAMP=0 5. Insulation Resistance Rated voltage:<200V To apply rated voltage for max. 120 sec. ≥10G Ω Rated voltage:200~630V To apply rated voltage (500V max.) for 60 sec. ≥10G Ω or RxC ≥100 Ω-F whichever is smaller 6. Temperature Coefficient With no electrical load. Operating temperature: -55~125° C at 25° C * Capacitance change: within ±30ppm/° C 7. Adhesive Strength of Termination * Pressurizing force ： 2N (0201) and 5N ( ≤0603) and 10N (>0603) * Test time: 10±1 sec. * No remarkable damage or removal of the terminations. 8. Vibration Resistance * Vibration frequency: 10~55 Hz/min. * Total amplitude: 1.5mm * Test time: 6 hrs. (Two hrs each in three mutually perpendicular directions.) * Cap./DF(Q) Measurement to be made after de-aging at 150° C for 1hr then set for 24±2 hrs at room temp. * No remarkable damage. * Cap change and Q/D.F.: To meet initial spec. Solderability * Solder temperature: 235±5° C * Dipping time: 2±0.5 sec. 95% min. coverage of all metalized area. 10. Bending Test * The middle part of substrate shall be pressurized by means of the pressurizing rod at a rate of about 1 mm per second until the deflection becomes 1 mm and then the pressure shall be maintained for 5±1 sec. * Measurement to be made after keeping at room temp. for 24±2 hrs. * No remarkable damage. * Cap change: within ±5.0% or ±0.5pF whichever is larger. (This capacitance change means the change of capacitance under specified flexure of substrate from the capacitance measured before the test.) 11. Resistance to Soldering Heat * Solder temperature: 260±5° C * Dipping time: 10±1 sec * Preheating: 120 to 150° C for 1 minute before immerse the capacitor in a eutectic solder. * Cap. / DF(Q) / I.R. Measurement to be made after de-aging at 150° C for 1hr then set for 24±2 hrs at room temp. * No remarkable damage. * Cap change: within ±2.5% or ±0.25pF whichever is larger. * 25% max. leaching on each edge.

Multilayer Ceramic Capacitors Approval Sheet Page 8 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 No. Item Test Condition Requirements 12. Temperature Cycle * Conduct the five cycles according to the temperatures and time. Step Temp. (° C) Time (min.) 1 Min. operating temp. +0/-3 30±3 2 Room temp. 2~3 3 Max. operating temp. +3/-0 30±3 4 Room temp. 2~3 * Cap. / DF(Q) / I.R. Measurement to be made after de-aging at 150° C for 1hr then set for 24±2 hrs at room temp. * No remarkable damage. * Cap change ：within ±2.5 ％ or ±0.25pF whichever is larger. 13. Humidity (Damp Heat) Steady State * Test temp.: 40±2° C * Humidity: 90~95% RH * Test time: 500+24/-0hrs. * Cap. / DF(Q) / I.R. Measurement to be made after de-aging at 150° C for 1hr then set for 24±2 hrs at room temp. * No remarkable damage. * Cap change: within ±5.0% or ±0.5pF whichever is larger. * Q/D.F. value: NP0: Cap ≥30pF, Q ≥350; 10pF ≤Cap<30pF, Q ≥275+2.5C Cap<10pF; Q ≥200+10C * I.R.: ≥1G Ωor RxC ≥50 Ω-F whichever is smaller. 14. Humidity (Damp Heat) Load * Test temp.: 40±2° C * Humidity: 90~95%RH * Test time: 500+24/-0 hrs. * To apply voltage ：rated voltage (Max. 500V) * Cap. / DF(Q) / I.R. Measurement to be made after de-aging at 150° C for 1hr then set for 24±2 hrs at room temp. * No remarkable damage. * Cap change: within ±7.5% or ±0.75pF whichever is larger. * Q/D.F. value: NP0: Cap ≥30pF, Q ≥200; Cap<30pF, Q ≥100+10/3C * I.R.: ≥500M Ω or RxC ≥25 Ω-F whichever is smaller. 15. High Temperature Load (Endurance) * Test temp.: NP0: 125±3° C * To apply voltage: (1) <500V: 200% of rated voltage. (2) 500V: 150% of rated voltage. (3) ≥630V: 120% of rated voltage. * Test time: 1000+24/-0 hrs. * Cap. / DF(Q) / I.R. Measurement to be made after de-aging at 150° C for 1hr then set for 24±2 hrs at room temp. * No remarkable damage. * Cap change: within ±3.0% or ±0.3pF whichever is larger. * Q/D.F. value: NP0: Cap ≥30pF, Q ≥350 10pF ≤Cap<30pF, Q ≥275+2.5C Cap<10pF, Q ≥200+10C * I.R.: ≥1G Ω or RxC ≥50 Ω-F whichever is smaller.

Multilayer Ceramic Capacitors Approval Sheet Page 9 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 APPENDIXES ◙ Tape & reel dimensions Size 0201 0402 0603 0805 Thickness L N S, X A B C, D, I A0 0. 40 +/-0.10 0.70 +/-0.20 1.05 +/-0.30 1.50 +/-0.20 1.50 +/-0.20 < 1.80 B 0 0. 70 +/-0.10 1.20 +/-0.20 1.80 +/-0.30 2.30 +/-0.20 2.30 +/-0.20 < 2.70 +/-0.1 W 8.00 +/-0.30 8.00 +/-0.30 8.00 +/-0.30 8.00 +/-0.30 8.00 +/-0.30 8.00 +/-0.30 P0 4.00 +/-0.10 4.00 +/-0.10 4.00 +/-0.10 4.00 +/-0.10 4.00 +/-0.10 4.00 +/-0.10 10xP 0 40.00 +/-0.10 40.00 +/-0.10 40.00 +/-0.20 40.00 +/-0.20 40.00 +/-0.20 40.00 +/-0.20 P1 2.00 +/-0.05 2.00 +/-0.05 4.00 +/-0.10 4.00 +/-0.10 4.00 +/-0.10 4.00 +/-0.10 P2 2.00 +/-0.05 2.00 +/-0.05 2.00 +/-0.05 2.00 +/-0.05 2.00 +/-0.05 2.00 +/-0.05 D 0 1.50 +0.1/-0 1.50 +0.1/-0 1.50 +0.1/-0 1.50 +0.1/-0 1.50 +0.1/-0 1.50 +0.1/-0 D 1 - - - - - 1.00 +/-0.10 E 1.75 +/-0.10 1.75 +/-0.10 1.75 +/-0.10 1.75 +/-0.10 1.75 +/-0.10 1.75 +/-0.10 F 3.50 +/-0.05 3.50 +/-0.05 3.50 +/-0.05 3.50 +/-0.05 3.50 +/-0.05 3.50 +/-0.05 Fig. 16 The dimension of plastic tape Fig. 15 The dimension of paper tape Fig. 17 The dimension of reel Size 0201, 0402, 0603, 0805 Reel size 7” 10” 13”

Multilayer Ceramic Capacitors Approval Sheet Page 10 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 ◙ Example of customer label *Customized label is available upon request ◙ Constructions ◙ Storage and handling conditions (1) To store products at 5 to 40 °C ambient temperature and 20 to 70%. related humidity conditions. (2) The product is recommended to be used within one year after shipment. Check solderability in case of shelf life extension is needed. Cautions: a. The corrosive gas reacts on the terminal electrodes of capacitors, and results in the poor solderability. Do not store the capacitors in the ambience of corrosive gas (e.g., hydrogen sulfide, sulfur dioxide, chlorine, ammonia gas etc.) b. In corrosive atmosphere, solderability might be degraded, and silver migration might occur to cause low reliability. c. Due to the dewing by rapid humidity change, or the photochemical change of the terminal electrode by direct sunlight, the solderability and electrical performance may deteriorate. Do not store capacitors under direct sunlight or dewing condition. To store products on the shelf and avoid exposure to moisture. Fig. 18 The construction of MLCC a. Customer name b. WTC order series and item number c. Customer P/O d. Customer P/N e. Description of product f. Quantity g. Bar code including quantity & WTC P/N or customer h. WTC P/N i. Shipping date j. Order bar code including series and item numbers k. Serial number of label No. Name NP0

1 Ceramic material CaZrO 3 based

2 Inner electrode Ni

4 Middle layer Ni

5 Outer layer Sn

Multilayer Ceramic Capacitors Approval Sheet Page 11 of 11 ASC_ HQ_Low ESR_(HH)_006V_AS Dec. 2018 ◙ Recommended soldering conditions The lead-free termination MLCCs are not only to be used on SMT against lead-free solder paste, but also suitable against lead-containing solder paste. If the optimized solder joint is requested, increasing soldering time, temperature and concentration of N 2 within oven are recommended. Fig. 19 Recommended reflow soldering profile for SMT process with SnAgCu series solder paste. Fig. 20 Recommended wave soldering profile for SMT process with SnAgCu series solder.

Product Information

HH03N100B501CT specifications and overview.

Summary

High Q and low ESR performance at high frequency

Description

High Q and low ESR performance at high frequency

Source title HH03N100B501CT Datasheet(PDF) - WALSIN TECHNOLOGY CORPORATION

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