HD75161A RENESAS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 12

Technical content

Features

  • Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD75161AP DILP-20 pin DP-20N, -20NEV P — Pin Arrangement (Top view) TE REN IFC NRFD DAV EOI NDAC 8ATN 9SRQ GND 10 GPIB I/O PORTS

20 VCC

Rev.2.00, Jul.16.2004, page 2 of 11 Table Of Abbreviation DRIVERS Name Identity Class DC Direction Control Control TE Talk Enable ATN Attention Bus Management SRQ Service Request REN Remote Enable IFC Interface Clear EOI End Or Identify DAV Data Valid NDAC Not Data Accepted Data Transfer NRFD Not Ready For Data Function Table Bus management Channels Data transfer Channels Controls ATN*1 SRQ REN IFC DAV NDAC NRFD DC TE ATN Controlled By DC EOI Controlled by TE HH H R T R R T T R R HH L R L L HTRTTRR T T LL L T HL X R T R R R R T T LH X T R T T T T R R H : High level L : Low level X : Irrelevant R: R e c e i v e r T : Transmit Notes: 1. ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC and TE inputs are in the same state. 2. Direction of data transmittion is from the terminal side to the bus side and the direction of data receiving is from the bus side to the terminal side. Data transfer is noninverting in both directions. Absolute Maximum Ratings Item Symbol Rating Unit Supply Voltage VCC 7V Input Voltage VIC 5.5 V Output Current IOL 100 mA Power Dissipation (Ta = 25°C) PT 1150 mW Operating Temperature Range Topr 0 to 70 °C Storage Temperature Range Tstg –65 to +150 °C Note: 1. The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.

Rev.2.00, Jul.16.2004, page 3 of 11 Recommended Operating Conditions Item Symbol Min Typ Max Unit Supply Voltage VCC 4.75 5.00 5.25 V Output Current Bus Ports With 3 State Outputs I OH — — –5.2 mA Terminal Ports — — –800 µA Output Current Bus Ports With 3 State Outputs I OL ——4 8m A Terminal Ports — — 16 Operating Temperature Topr 0 — 70 °C Logic Diagram ATN EOI SRQ REN IFC DAV NDAC DC TE R D R D R D R D R D R D R D R D NRFD ATN EOI SRQ REN IFC DAV NDAC NRFD GPIB I/O PORTS TERMINAL I/O PORTS

Rev.2.00, Jul.16.2004, page 4 of 11 Item Symbol V CC Min Max Unit Conditions Input Voltage VIH 2 ——V VIL ——0 . 8 Input Clamp Voltage VIK — — –1.5 V I I = –18 mA Hysteresis Bus VT + – VT – 0 . 4 ——V Output Voltage Terminal V OH 2 . 7 ——V I OH = –800 µA Bus 2.5 — — IOH = –5.2 mA Terminal V OL ——0 . 5 V I OL = 16 mA B u s ——0 . 5 I OL = 48 mA Input Current Terminal I I — — 100 µA V I = 5.5 V Terminal And I IH ——2 0 V I = 2.7 V Control Inputs I IL — — –100 V I = 0.5 V Voltage at Bus Port VI/O (bus) 2.5 — 3.7 V Driver I I(bus) = 0 — — –1.5 Disabled I I(bus) = –12 mA Current Into Bus V CC ON I I/O (bus) –1.3 — — mA Driver V I(bus) = –1.5 V to 0.4 V Port 0 — –3.2 Disabled V I(bus) = 0.4 V to 2.5 V ——+ 2 . 5 –3.2 VI(bus) = 2.5 V to 3.7 V 0— 2 . 5 VI(bus) = 3.7 V to 5 V 0.7 — 2.5 VI(bus) = 5 V to 5.5 V VCC O F F ——4 0µ A V CC = 0, V I(bus) = 0 V to 2.5 V Short Circuit Terminal I OS –15 — –75 mA Output Current Bus –25 — –125 Supply Voltage ICC — — 100 mA No Load TE, DC, low Bus port Capacitance CI/O (bus) —3 0—p F V CC = 5 V or 0 V, VI/O = 0 to 2 V, f = 1 MHz Note: 1. V CC = 5 V, Ta = 25°C Switching Characteristics (VCC = 5 V, Ta = 25°C) Item Symbol Input Output Min Typ Max Unit Test Circuit Test Conditions Propagation Delay t PLH Terminal BUS — 14 20 ns 1 C L = 30 pF Time tPHL —1 42 0 RL = 38.3 Ω to 2.3 V tPLH BUS Terminal — 12 20 2 C L = 30 pF tPHL —1 62 2 RL = 240 Ω to 5 V Output Enable Time t ZH TE DC BUS — — 60 3 C L = 15 pF Output Disable Time t HZ ATTN, EO1 — — 45 RL = 480 Ω to 0 V Output Enable Time t ZL REN, IFC — — 60 CL = 15 pF Output Disable Time t LZ and DAY — — 55 RL = 38.3 Ω to 2.3 V Output Enable Time t ZH TE DC Terminal — — 55 4 C L = 15 pF Output Disable Time t HZ ——5 0 RL = 3 kΩ to 0 V Output Enable Time t ZL ——4 5 CL = 15 pF Output Disable Time t LZ ——5 5 RL = 280 Ω to 5 V

Rev.2.00, Jul.16.2004, page 5 of 11 Switching Time Test Method 1. tPLH, tPHL C = 30 pF L Test Point R = 38.3 L Ω 2.3 V Waveforms-1 Terminal Input 10 % 90 % tr tf 1.5 V 90 % 0 V 3 V 1.5 V 10 % Bus Output tPLH tPHL 2 V 0.8 V VOH VOL

Rev.2.00, Jul.16.2004, page 6 of 11 2. tPLH, tPHL C = 30 pF L Test Point R = 240 L Ω 5 V Waveforms-2 Bus Input 10 % 90 % tr tf 1.5 V 90 % 0 V 3 V 1.5 V 10 % Terminal Output tPLH tPHL 1.5 V 1.5 V VOH VOL

Rev.2.00, Jul.16.2004, page 7 of 11 3. tZH, tHZ, tZL, tLZ C = 15 pF L 2.3 V Test Point R = 38.3 L Ω R = 480 L Ω Waveforms-3 Control Input 10 % 90 % 1.5 V 90 % 0 V 3 V 10 % Bus Output S1 Closed S2 Open t ZH tHZ 2 V VOH VOL tr tf 0.8 V tZL tLZ 2.3 V 0.8 V 90 % 10 % 1.5 V Bus Output S1 Open S2 Closed

Rev.2.00, Jul.16.2004, page 8 of 11 4. tZH, tHZ, tZL, tLZ Test Point C = 15 pF L 5 V R = 280 L Ω R = 3 k L Ω Waveforms-4 Control Input 10 % 90 % 1.5 V 90 % 0 V 3 V 10 % Terminal Output S1 Closed S2 Open t ZH tHZ 1.5 V VOH VOL tr tf 1.5 V tZL tLZ 5 V 90 % 10 % 1.5 V Terminal Output S1 Open S2 Closed 0 V Notes: 1. The pulse generator has the following characteristics: PRR = 1 MHz, 50% duty cycle, t r ≤ 6 ns, tf ≤ 6 ns, Zout = 50 Ω 2. C L includes probe and jig capacitance. 3. All diodes are 1S2074(H).

Rev.2.00, Jul.16.2004, page 9 of 11 Characteristics Of Driver And Receiver 0 –10 V = 5.25 VCC T = 25a °C –20 –30 –40 –50 5.00 V 4.75 V 0 –20 V = 5.25 VCC T = 25a °C –40 –60 –80 –100 5.00 V 4.75 V 0.5 0 10 V = 5.25 VCC T = 25a °C 0.4 0.3 0.2 0.1 20 30 40 V = 5.00 VCC V = 4.75 VCC 0.5 V = 5.25 VCC T = 25a °C 0.4 0.3 0.2 0.1 12 18 24 30 V = 5.00 VCC V = 4.75 VCC High Level Output Voltage VOH (V) High Level Output Current IOH (mA) (a) Driver Output (b) Driver Output Low Level Output Voltage VOL (V) Low Level Output Voltage VOL (V) Low Level Output Current IOL (mA) High Level Output Voltage VOH (V) High Level Output Current IOH (mA) (c) Receiver Output (d) Receiver Output Low Level Output Current IOL (mA)

Rev.2.00, Jul.16.2004, page 10 of 11 V = 5 VCC 0.4 V +TV –T T = 25a °C 0.8 1.2 1.6 2.0 High Level Output Voltage VOUT (V) High Level Input Voltage VIN (V) (e) Input / Output Characteristics at Receiver

Rev.2.00, Jul.16.2004, page 11 of 11 Package Dimensions Package Code JEDEC JEITA Mass (reference value) DP-20N Conforms 1.26 g

0.51 Min

2.54 Min 5.08 Max 7.62 0.25 + 0.11 24.50

25.40 Max

0.89 1.30 6.30

7.00 Max1 10

0˚ – 15˚

1.27 Max

As of January, 2003 Unit: mm Package Code JEDEC JEITA Mass (reference value) DP-20NEV Conforms 1.26 g 2.54 Min 5.08 Max 7.62 *NI/Pd/AU Plating 24.50 0.89 1.30 6.30 0˚ – 15˚ Unit: mm

Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 RENESAS SALES OFFICES © 2004. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .1.0