74HC540 PHILIPS | Alldatasheet

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Technical content

Product specification File under Integrated Circuits, IC06 December 1990 INTEGRATED CIRCUITS 74HC/HCT540 Octal buffer/line driver; 3-state; inverting For a complete data sheet, please also download:

  • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
  • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
  • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

Philips Semiconductors Product specification Octal buffer/line driver; 3-state; inverting 74HC/HCT540

FEATURES

  • Inverting outputs
  • Output capability: bus driver
  • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT540 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT540 are octal inverting buffer/line drivers with 3-state outputs. The 3-state outputs are controlled by the output enable inputs OE 1 and OE 2. A HIGH onOE n causes the outputs to assume a high impedance OFF-state. The “540” is identical to the “541” but has inverting outputs. QUICK REFERENCE DATA GND = 0 V; T amb = 25°C; tr = tf= 6 ns Notes 1. C PD is used to determine the dynamic power dissipation (PD inµW): PD = CPD × VCC 2 × fi+∑ (CL × VCC 2 × fo) where: fi= input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC 2 × fo) = sum of outputs C L = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI= GND to VCC For HCT the condition is VI= GND to VCC − 1.5 V

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT HC HCT tPHL / tPLH propagation delay An toYn C L = 15 pF; VCC = 5 V 9 11 ns C I input capacitance 3.5 3.5 pF C PD power dissipation capacitance per buffer notes 1 and 2 39 44 pF

Philips Semiconductors Product specification Octal buffer/line driver; 3-state; inverting 74HC/HCT540 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 19 OE 1,OE 2 output enable input (active LOW) 2, 3, 4, 5, 6, 7, 8, 9 A 0 to A7 data inputs

10 GND ground (0 V)

18, 17, 16, 15, 14, 13, 12, 11 Y0 toY7 bus outputs

20 V CC positive supply voltage

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

Philips Semiconductors Product specification Octal buffer/line driver; 3-state; inverting 74HC/HCT540 Fig.4 Functional diagram. FUNCTION TABLE Notes 1. H = HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state INPUTS OUTPUT OE 1 OE 2 A n Yn L L X H L L H X L H X X H L Z Z Fig.5 Logic diagram.

Philips Semiconductors Product specification Octal buffer/line driver; 3-state; inverting 74HC/HCT540 DC CHARACTERISTICS FOR 74HC For the DC characteristics see“74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: bus driver ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf= 6 ns; CL = 50 pF SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HC VCC (V) WAVEFORMS+25 −40 to+85 −40 to+125 tPHL / tPLH propagation delay An toYn 100 125 150 ns 2.0 4.5 6.0 Fig.6 t PZH / tPZL 3-state output enable time OE toYn 160 200 240 ns 2.0 4.5 6.0 Fig.7 t PHZ / tPLZ 3-state output disable time OE toYn 160 200 240 ns 2.0 4.5 6.0 Fig.7 t THL / tTLH output transition time 14 ns 2.0 4.5 6.0 Fig.6

Philips Semiconductors Product specification Octal buffer/line driver; 3-state; inverting 74HC/HCT540 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see“74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: bus driver ICC category: MSI Note to HCT types The value of additional quiescent supply current (ΔICC ) for a unit load of 1 is given in the family specifications. To determineΔICC per input, multiply this value by the unit load coefficient shown in the table below. AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf= 6 ns; CL = 50 pF INPUT UNIT LOAD COEFFICIENT OE 1 OE 2 An 1.50 1.00 1.40 SYMBOL PARAMETER T amb (°C) UNIT TEST CONDITIONS 74HCT VCC (V) WAVEFORMS+25 −40 to+85 −40 to+125 tPHL / tPLH propagation delay An toYn 13 24 30 36 ns 4.5 Fig.6 tPZH / tPZL 3-state output enable time OE toYn 22 35 44 53 ns 4.5 Fig.7 tPHZ / tPLZ 3-state output disable time OE toYn 23 35 44 53 ns 4.5 Fig.7 tTHL / tTLH output transition time 5 12 15 18 ns 4.5 Fig.6

Philips Semiconductors Product specification Octal buffer/line driver; 3-state; inverting 74HC/HCT540 AC WAVEFORMS PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. Fig.6 Waveforms showing the input (An) to output (Yn) propagation delays and the output transition times. (1) HC : VM = 50%; VI= GND to VCC . HCT: VM = 1.3 V; VI= GND to 3 V. Fig.7 Waveforms showing the 3-state enable and disable times. (1) HC : VM = 50%; VI= GND to VCC . HCT: VM = 1.3 V; VI= GND to 3 V.