CD74HCT4066-Q1 TI1 | Alldatasheet
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SCLS581B − APRIL 2004 − REVISED APRIL 2008 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Qualified for Automotive Applications /C0068Low ON Resistance − 25 /C0087 Typical (VCC = 4.5 V) /C0068Fast Switching and Propagation Speeds /C0068Low OFF Leakage Current /C0068Wide Operating Temperature Range: −40/C0053C to 125/C0053C /C0068Direct LSTTL Input Logic Compatibility: VIL = 0.8 V Max, VIH = 2 V Min /C0068CMOS Input Compatibility: II /C0118 1 /C0109A at VOL, VOH description/ordering information The CD74HCT4066 contains four independent digitally controlled analog switches that use silicon-gate CMOS technology to achieve operation speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits. These switches feature the characteristic linear ON resistance of the metal-gate CD4066B. Each switch is turned on by a high-level voltage on its control input.
ORDERING INFORMATION
/C0123 TA PACKAGE‡ ORDERABLE PART NUMBER§ TOP-SIDE MARKING 40°C to 125°C SOIC − M Reel of 2500 CD74HCT4066QM96Q1 HCT4066Q −40°C to 125°C TSSOP − PW Reel of 2000 CD74HCT4066QPWRQ1 HK4066Q † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. § The suffix 96 denotes tape and reel. FUNCTION TABLE INPUT SWITCHINPUT nE SWITCH L Off H On H = High level L = Low level Copyright 2008, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning avail ability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. M OR PW PACKAGE (TOP VIEW) GND V CC
SCLS581B − APRIL 2004 − REVISED APRIL 2008
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logic diagram (positive logic) nY nZ nE p n p n absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditi ons” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages referenced to GND unless otherwise specified. 2. In certain applications, the external load-resistor current may include both VCC and signal-line components. To avoid drawing VCC current when switch current flows into the transmission gate inputs (terminals 1, 4, 8, and 11), the voltage drop across the bidirectional switch must not exceed 0.6 V (calculated from r on values shown in the electrical characteristics table). No VCC current flows through RL if the switch current flows into terminals 2, 3, 9, and 10. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
SCLS581B − APRIL 2004 − REVISED APRIL 2008 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 4) MIN MAX UNIT VCC Supply voltage 4.5 5.5 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VI Input voltage 0 VCC V VO Output voltage 0 VCC V tt Input transition (rise and fall) time VCC = 4.5 V 0 500 ns TA Operating free-air temperature −40 125 °C NOTES: 4. All unused inputs of the device must be held at V CC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VI VCC TA = 25°C TA = −40°C TO 125°C UNITPARAMETER TEST CONDITIONS VI VCC MIN TYP MAX MIN MAX UNIT IIL Any control VCC or GND 5.5 V ±0.1 ±1 µA IIZ VIS = VCC or GND VIL 5.5 V ±0.1 ±1 µA r IO = 1 mA, VIS = VCC or GND VCC 4.5 V 25 80 128 Ωron IO = 1 mA, See Figure 7 VIS = VCC to GND VCC 4.5 V 35 95 142 Ω ∆ron Between any two switches VCC 4.5 V 1 Ω ICC VCC or GND
5.5 V 2 40 µA
∆ICC Per input pin: 1 unit load, See Note 5 VCC − 2.1 V 4.5 V to 5.5 V 100 360 490 µA CI Control inputs 10 10 pF NOTE 5: For dual-supply systems, theoretical worst case (V I = 2.4 V, VCC = 5.5 V) specification is 1.8 mA. HCT input loading INPUT UNIT LOADS† All 1 † Unit load is ∆ICC limit specified in the electrical characteristics table, e.g., 360 µA max at 25°C.
SCLS581B − APRIL 2004 − REVISED APRIL 2008
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switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 6) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE VCC TA = 25°C TA = −40°C TO 125°C UNITPARAMETER (INPUT) (OUTPUT) CAPACITANCE VCC MIN TYP MAX MIN MAX UNIT t Yo rZ Zo rY CL = 15 pF 5 V 4 nstpd Y or Z Z or Y CL = 50 pF 4.5 V 12 18 ns t E Yo rZ CL = 15 pF 5 V 9 nsten E Y or Z CL = 50 pF 4.5 V 24 36 ns t E Yo rZ CL = 15 pF 5 V 14 nstdis E Y or Z CL = 50 pF 4.5 V 35 53 ns operating characteristics, VCC = 5 V, TA = 25°C, input tr, tf = 6 ns PARAMETER TYP UNIT Cpd Power dissipation capacitance (see Note 6) 38 pF NOTE 6: C pd is used to determine the dynamic power consumption (PD), per package. PD = (Cpd × VCC2 × fI) + Σ (CL + CS) × VCC2 × fO fO = output frequency fI = input frequency CL = output load capacitance CS = switch capacitance VCC = supply voltage analog channel characteristics, TA = 25°C PARAMETER TEST CONDITIONS VCC TYP UNIT fmax Switch frequency response bandwidth at −3 dB See Figure 2 and Figure 8 and Notes 7 and 8 4.5 V 200 MHz Crosstalk between any two switches See Figure 1 and Figure 9 and Notes 8 and 9 4.5 V −72 dB Total harmonic distortion See Figure 3, 1 kHz, VIS = 4 VP-P 4.5 V 0.023 % Control to switch feedthrough noise See Figure 4 4.5 V 130 mV Switch OFF signal feedthrough See Figure 5 and Figure 9 and Notes 8 and 9 4.5 V −72 dB CS Switch input capacitance 5 pF NOTES: 7. Adjust input voltage to obtain 0 dBm at output, f = 1 MHz. 8. V IS is centered at VCC/2. 9. Adjust input for 0 dBm at V IS.
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NOTES: A. C L includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. D. For clock inputs, f max is measured with the input duty cycle at 50%. E. The outputs are measured one at a time, with one input transition per measurement. F. t PLZ and tPHZ are the same as tdis. G. t PZL and tPZH are the same as ten. H. t PLH and tPHL are the same as tpd. Figure 6. Load Circuit and Voltage Waveforms
www.ti.com 19-Oct-2011 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) CD74HCT4066QM96Q1 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HCT4066QPWRQ1 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM D24066QM96G4Q1 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM HCT4066QPWRG4Q1 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF CD74HCT4066-Q1 :
www.ti.com 19-Oct-2011 Addendum-Page 2
- Catalog: CD74HCT4066 NOTE: Qualified Version Definitions:
- Catalog - TI's standard catalog product
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