HCT273

74VHCT273A STMICROELECTRONICS | Alldatasheet

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OCTAL D-TYPE FLIP FLOP WITH CLEAR November 1999 n HIGH SPEED: fMAX = 170 MHz (TYP.) at VCC =5V n LOW POWER DISSIPATION: ICC =4 µA (MAX.) at TA =2 5oC n COMPATIBLEWITH TTL OUTPUTS: VIH =2 V( M I N ) ,VIL= 0.8V(MAX) n POWER DOWN PROTECTION ON INPUTS & OUTPUTS n SYMMETRICAL OUTPUT IMPEDANCE: |IOH |=IOL = 8 mA (MIN) n BALANCED PROPAGATION DELAYS: t PLH ≅ tPHL n OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V n PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 273

n IMPROVED LATCH-UP IMMUNITY n LOW NOISE: VOLP = 0.9V(Max.)

DESCRIPTION

The 74VHCT273A is an advanced high-speed CMOS OCTAL D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. Information signals applied to D inputs are transfered to the Q outputs on the positive going edge of the clock pulse. When the CLEAR input is held low, the Q outputs are held low independentlyof the other inputs . Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES : 74VHCT273AM 74VHCT273AT M (Micro Package) T (TSSOP Package)

PIN No SYMBOL NAME AND FUNCTION

1 CLEAR Asyncronous Master

Reset (Active LOW) 2, 5, 6, 9, 12, 15, 16, Q0 to Q7 Flip-Flop Outputs 3, 4, 7, 8, 13, 14, 17, D0 to D7 Data Inputs

11 CLOCK Clock Input

(LOW-to-HIGH, Edge- Triggered)

10 GND Ground (0V)

CC Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS FUNCTION CLEAR D CLOCK Q L X X L CLEAR HL L HH H HX Q n NO CHANGE X:Don’t Care This logic diagram has not be used to esimate propagation delays 74VHCT273A

RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit VCC Supply Voltage 4.5 to 5.5 V V I Input Voltage 0 to 5.5 V V O Output Voltage (see note 1) 0 to 5.5 V V O Output Voltage (see note 2) 0 to V CC V Top Operating Temperature -40 to +85 oC dt/dv Input Rise and Fall Time (see note 3) (VCC =5 . 0± 0.5V) 0 to 20 ns/V 1) VCC =0 2) High or Low State 3)VINfrom0.8V to 2 V ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7.0 V V I DC Input Voltage -0.5 to +7.0 V V O DC Output Voltage (see note 1) -0.5 to +7.0 V V O DC Output Voltage (see note 2) -0.5 to V CC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ICC or IGND DC V CC or Ground Current ± 50 mA Tstg Storage Temperature -65 to +150 oC TL Lead Temperature (10 sec) 300 oC AbsoluteMaximum Ratingsarethose values beyond whichdam age to the device may occur. Functional operation un der these condition isnot implied. 1) VCC =0 2) High or Low State DC SPECIFICATIONS Symbol Parameter Test Conditions Value Unit V CC (V) TA =2 5 o C -40 to 85 o C VIH High Level Input Voltage 4.5 to 5.5 2 2 V VIL Low Level Input Voltage 4.5 to 5.5 0.8 0.8 V VOH High Level Output Voltage 4.5 I O =-50 µ A 4.4 4.5 4.4 V 4.5 I O =-8 mA 3.94 3.8 VOL Low Level Output Voltage 4.5 I O =50 µ A 0.0 0.1 0.1 V 4.5 I O =8 mA 0.36 0.44 II Input Leakage Current 0 to 5.5 VI = 5.5V or GND ±0.1 ±1.0 µA ICC Quiescent Supply Current

5.5 V I =V CC or GND 4 40 µA

Δ ICC Additional Worst Case Supply Current 5.5 One Input at 3.4V, other input at VCC or GND 1.35 1.5 mA IOPD Output Leakage Current 0V OUT = 5.5V 0.5 5.0 µA 74VHCT273A

CAPACITIVE CHARACTERISTICS Symbol Parameter Test Conditions Value Unit TA =2 5 o C -40 to 85 o C C IN Input Capacitance 4 10 10 pF C PD Power Dissipation Capacitance (note 1) 15 pF 1) CPD isdefined as thevalue of the IC’sinternal equivalent capacitance whichis calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained bythe followingequation. ICC (opr) = CPD • VCC • fIN+ICC /8 (per Flip-Flop) AC ELECTRICAL CHARACTERISTICS (Input tr =tf=3 ns) Symbol Parameter Test Condition Value Unit V CC (V) C L (pF) TA =2 5 o C -40 to 85 o C tPLH tPHL Propagation Delay Time CK to Q tPHL Propagation Delay Time CLR to Q tw CLR pulse Width LOW 5.0(*) 5.0 5.0 ns tw CK pulse Width HIGH or LOW 5.0(*) 5.0 5.0 ns ts Setup Time D to CK HIGH or LOW 5.0(*) 2.0 2.0 ns th Hold Time D to CK HIGH or LOW 5.0(*) 2.0 2.0 ns tREM Removal Time CLR to CK 5.0(*) 1.0 1.0 ns fMAX Maximum Clock Frequency 5.0(*) 15 75 170 65 MHz 5.0(*) 50 50 160 45 tOSLH tOSHL Output to Output Skew Time (note 1) 5.0(*) 50 1.0 1.0 ns (*) Voltag erange is 5V± 0.5V Note1: Parameter guaranteed bydesign. tsoLH =| tpLHm -tpLHn|, tsoHL =| tpHLm -tpHLn| DYNAMIC SWITCHING CHARACTERISTICS Symbol Parameter Test Conditions Value Unit V CC (V) TA =2 5 o C -40 to 85 o C VOLP Dynamic Low Voltage Quiet Output (note 1, 2) 5.0 C L =5 0p F 0.6 0.9 V VOLV -0.9 -0.6 VIHD Dynamic High Voltage Input (note 1, 3) 5.0 2.0 VILD Dynamic Low Voltage Input (note 1, 3) 5.0 0.8 1) Worst case package. 2) Max num ber of outputs defined as (n). Datainputs aredriven 0V to 3.0V, (n -1) outputs switching andone output at GND. 74VHCT273A

CL = 15/50 pF or equivalent (includes jig and probe capacitance) RT =Z OUT of pulse generator (typically50Ω ) WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 74VHCT273A

WAVEFORM 2: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 3: REMOVAL TIME (f=1MHz; 50% duty cycle) 74VHCT273A

DIM. mm inch A 2.65 0.104 a1 0.10 0.20 0.004 0.007 a2 2.45 0.096 b 0.35 0.49 0.013 0.019 b1 0.23 0.32 0.009 0.012 C 0.50 0.020 c1 45 (typ.) D 12.60 13.00 0.496 0.512 E 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.40 7.60 0.291 0.299 L 0.50 1.27 0.19 0.050 M 0.75 0.029 S 8 (max.) P013L SO-20 MECHANICAL DATA 74VHCT273A

DIM. mm inch A 1.1 0.433 b 0.19 0.30 0.0075 0.0118 c 0.09 0.2 0.0035 0.0079 e 0.65 BSC 0.0256 BSC o 4o 8o 0o 4o 8o c Eb A2A D PIN 1 IDENTIFICATION A1 LKe TSSOP20 MECHANICAL DATA 74VHCT273A

Information furnished isbelieved to be accurate and reliable. However, STMicroelectroni cs assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. Thispublication supersedes and replaces all informati on previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems withoutexpress written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics  1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 74VHCT273A