HCT14A

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Document overview

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Technical content

Features

• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS−Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating V oltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 /C0109A
• In Compliance With the JEDEC Standard No. 7.0 A Requirements
• Chip Complexity: 72 FETs or 18 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant PIN 14 = VCC PIN 7 = GND Y = A A1 1 2 Y1 A2 3 4 Y2 A3 5 6 Y3 A4 9 8 Y4 A5 11 10 Y5 A6 13 12 Y6 LOGIC DIAGRAM http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.

ORDERING INFORMATION

A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or /C0071= Pb−Free Package HCT14AG AWLYWW HCT 14A ALYW/C0071 /C0071 (Note: Microdot may be in either location) TSSOP−14SOIC−14 NB TSSOP−14 DT SUFFIX CASE 948G SOIC−14 NB D SUFFIX CASE 751A 105 VCC GND PIN ASSIGNMENT FUNCTION TABLE Input A Output Y L H H L

http://onsemi.com MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) −0.5 to +7.0 V VI DC Input Voltage (Referenced to GND) −0.5 to VCC + 0.5 V VO DC Output Voltage (Referenced to GND) −0.5 to VCC + 0.5 V IIK DC Input Diode Current ±20 mA IOK DC Output Diode Current ±25 mA IO DC Output Sink Current ±25 mA ICC DC Supply Current per Supply Pin ±50 mA IGND DC Ground Current per Ground Pin ±50 mA TSTG Storage Temperature Range −65 to +150 /C0095C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 /C0095C TJ Junction Temperature under Bias +150 /C0095C /C0113JA Thermal Resistance SOIC TSSOP 125 170 /C0095C/W PD Power Dissipation in Still Air at 85/C0095C SOIC TSSOP 500 450 mW MSL Moisture Sensitivity Level 1 FR Flammability Rating Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in VESD ESD Withstand Voltage Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) > 4000 > 300 > 1000 V ILatchup Latchup Performance Above V CC and Below GND at 85/C0095C (Note 4) ±300 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Tested to EIA/JESD22−A114−A. 2. Tested to EIA/JESD22−A115−A. 3. Tested to JESD22−C101−A. 4. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC DC Supply Voltage (Referenced to GND) 4.5 5.5 V VI, VO DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V TA Operating Temperature, All Package Types −55 +125 /C0095C tr, tf Input Rise and Fall Time (Figure 1) − (Note 5) ns Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 5. No Limit when V I /C0091 50% VCC, ICC > 1 mA. 6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.

http://onsemi.com DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Temperature Limit VCC /C004255/C0095C to 25/C0095C /C011885/C0095C /C0118125/C0095C Symbol Parameter Test Conditions Volts Min Max Min Max Min Max Unit VT/C0041max Maximum Positive−Going Input Threshold Voltage VO = 0.1 V or VCC – 0.1 V |Iout| ≤ 20 /C0109A 4.5 5.5 1.9 2.1 1.9 2.1 1.9 2.1 V VT/C0041min Minimum Positive−Going Input Threshold Voltage VO = 0.1 V or VCC – 0.1 V |Iout| ≤ 20 /C0109A 4.5 5.5 1.2 1.4 1.2 1.4 1.2 1.4 V VT/C0042max Maximum Negative−Going Input Threshold Voltage VO = 0.1 V or VCC – 0.1 V |Iout| ≤ 20 /C0109A 4.5 5.5 1.2 1.4 1.2 1.4 1.2 1.4 VT/C0042min Minimum Negative−Going Input Threshold Voltage VO = 0.1 V or VCC – 0.1 V |Iout| ≤ 20 /C0109A 4.5 5.5 0.5 0.6 0.5 0.6 0.5 0.6 VH max Maximum Hysteresis Voltage VO = 0.1 V or VCC – 0.1 V |Iout| ≤ 20 /C0109A 4.5 5.5 1.4 1.5 1.4 1.5 1.4 1.5 VH min Minimum Hysteresis Voltage VO = 0.1 V or VCC – 0.1 V |Iout| ≤ 20 /C0109A 4.5 5.5 0.4 0.4 0.4 0.4 0.4 0 4 VOH Minimum High−Level Output Voltage VI < VT/C0042min |Iout| ≤ 20 /C0109A 4.5 5.5 4.4 5.4 4.4 5.4 4.4 5.4 V VI < VT/C0042min |Iout| ≤ 4.0 mA 4.5 3.98 3.84 3.7 VOL Maximum Low−Level Output Voltage VI ≥ VT/C0041max |Iout| ≤ 20 /C0109A 4.5 5.5 0.1 0.1 0.1 0.1 0.1 0.1 V VI ≥ VT/C0041max |Iout| ≤ 4.0 mA 4.5 0.26 0.33 0.4 IIK Maximum Input Leakage Current VI = VCC or GND 5.5 ±0.1 ±1.0 ±1.0 /C0109A ICC Maximum Quiescent Supply Current (per package) VI = VCC or GND Iout = 0 /C0109A 5.5 1.0 10 40 /C0109A /C0119/C004255/C0095C 25/C0095C to 125/C0095C /C0068ICC Additional Quiescent Supply Current VI = 2.4 V, Any One Input VI = VCC or GND, Other Inputs lout = 0 /C0109A 5.5 2.9 2.4 mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. AC CHARACTERISTICS (CL = 50 pF; Input tr = tf = 6.0 ns) Guaranteed Limit /C004255/C0095C to 25/C0095C /C011885/C0095C /C0118125/C0095C Symbol Parameter Test Conditions Figures Min Max Min Max Min Max Unit tPLH, tPHL Maximum Propagation Delay, Input A to Output Y (L to H) VCC = 5.0 V ±10% CL = 50 pF, Input tr = tf = 6.0 ns 1 & 2 32 40 48 ns tTLH, tTHL Maximum Output Transition Time, Any Output VCC = 5.0 V ±10% CL = 50 pF, Input tr = tf = 6.0 ns 1 & 2 15 19 22 ns Typical @ 25°C, VCC = 5.0 V CPD Power Dissipation Capacitance, per Inverter (Note 7) 32 pF 7. Used to determine the no−load dynamic power consumption: P D = CPD VCC2f + ICC VCC.

http://onsemi.com PACKAGE DIMENSIONS TSSOP−14 CASE 948G ISSUE B DIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0 8 0 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. /C0095/C0095/C0095/C0095 SU0.15 (0.006) T 2X L/2 SUM0.10 (0.004) V ST L −U− SEATING PLANE 0.10 (0.004) −T− ÇÇÇ ÇÇÇ ÇÇÇ SECTION N−N DETAIL E J J1 K ÉÉÉ ÉÉÉ DETAIL E F M −W− 0.25 (0.010) 814 PIN 1 IDENT. HG A D C B SU0.15 (0.006) T −V− 14X REFK N N 7.06 14X 0.36 14X 1.26 0.65 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

http://onsemi.com PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. H 14 8 M0.25 B M C h X 45 SEATING PLANE A M /C0095 SAM0.25 B SC b13X B A E D e DETAIL A L DETAIL A DIM MIN MAX MIN MAX INCHESMILLIMETERS D 8.55 8.75 0.337 0.344 E 3.80 4.00 0.150 0.157 A 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 L 0.40 1.25 0.016 0.049 e 1.27 BSC 0.050 BSC A3 0.19 0.25 0.008 0.010 A1 0.10 0.25 0.004 0.010 M 0 7 0 7 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 /C0095/C0095/C0095/C0095 6.50 14X 0.58 14X 1.18 1.27 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 MC74HCT14A/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.