6N137 HP | Alldatasheet

Document overview

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Technical content

Features

  • 5 kV/µs Minimum Common Mode Rejection (CMR) at VCM = 50 V for HCPL-X601/ X631, HCNW2601 and 10 kV/ µs Minimum CMR at VCM = 1000 V for HCPL- X611/X661, HCNW2611
  • High Speed: 10 MBd Typical
  • LSTTL/TTL Compatible
  • Low Input Current Capability: 5 mA
  • Guaranteed ac and dc Performance over Temper- ature: -40°C to +85°C
  • Available in 8-Pin DIP, SOIC-8, Widebody Packages
  • Strobable Output (Single Channel Products Only)
  • Safety Approval UL Recognized - 3750 V rms for 1 minute and 5000 V rms* for 1 minute per UL1577 CSA Approved IEC/EN/DIN EN 60747-5-2 Approved with V IORM = 630 V peak for HCPL-2611 Option 060 and VIORM = 1414 V peak for HCNW137/26X1
  • MIL-PRF-38534 Hermetic Version Available (HCPL- 56XX/66XX) Functional Diagram *5000 V rms/1 Minute rating is for HCNW137/26X1 and Option 020 (6N137, HCPL-2601/11/30/31, HCPL-4661) products only. HCPL-0631 HCPL-0661 HCPL-2601 HCPL-2611 HCPL-2630 HCPL-2631 HCPL-4661

Applications

  • Isolated Line Receiver
  • Computer-Peripheral Interfaces
  • Microprocessor System Interfaces
  • Digital Isolation for A/D, D/A Conversion
  • Switching Power Supply
  • Instrument Input/Output Isolation
  • Ground Loop Elimination
  • Pulse Transformer Replacement
  • Power Transistor Isolation in Motor Drives
  • Isolation of High Speed Logic Systems

Description

The 6N137, HCPL-26XX/06XX/ 4661, HCNW137/26X1 are optically coupled gates that combine a GaAsP light emitting diode and an integrated high gain photo detector. An enable input allows the detector to be strobed. The output of the detector IC is A 0.1 µF bypass capacitor must be connected between pins 5 and 8. CATHODE ANODE GND V VCC O 5ANODE 2 CATHODE 2 CATHODE 1 ANODE 1 GND V VCC VE VO1 6N137, HCPL-2601/2611 HCPL-0600/0601/0611 HCPL-2630/2631/4661 HCPL-0630/0631/0661 NC NC LED ON OFF ON OFF ON OFF ENABLE H H L L NC NC OUTPUT L H H H L H TRUTH TABLE (POSITIVE LOGIC) LED ON OFF OUTPUT L H TRUTH TABLE (POSITIVE LOGIC) SHIELD SHIELD

an open collector Schottky- clamped transistor. The internal shield provides a guaranteed common mode transient immunity specification of 5,000 V/µs for the HCPL-X601/X631 and HCNW2601, and 10,000 V/µs for the HCPL-X611/X661 and HCNW2611. This unique design provides maximum ac and dc circuit isolation while achieving TTL compatibility. The optocoupler ac and dc operational parameters are guaranteed from -40 °C to +85°C allowing troublefree system performance. The 6N137, HCPL-26XX, HCPL- 06XX, HCPL-4661, HCNW137, and HCNW26X1 are suitable for high speed logic interfacing, input/output buffering, as line receivers in environments that conventional line receivers cannot tolerate and are recom- mended for use in extremely high ground or induced noise environments. Selection Guide Widebody Minimum CMR 8-Pin DIP (300 Mil) Small-Outline SO-8 (400 Mil) Hermetic Input Single On- Single Dual Single Dual Single and Dual dV/dt V CM Current Output Channel Channel Channel Channel Channel Channel (V/µs) (V) (mA) Enable Package Package Package Package Package Packages NA NA 5 YES 6N137 HCPL-0600 HCNW137 NO HCPL-2630 HCPL-0630 5,000 50 YES HCPL-2601 HCPL-0601 HCNW2601 NO HCPL-2631 HCPL-0631 10,000 1,000 YES HCPL-2611 HCPL-0611 HCNW2611 NO HCPL-4661 HCPL-0661 1,000 50 YES HCPL-2602 [1] 3, 500 300 YES HCPL-2612 [1] 1,000 50 3 YES HCPL-261A [1] HCPL-061A[1] NO HCPL-263A [1] HCPL-063A[1] 1,000[2] 1,000 YES HCPL-261N [1] HCPL-061N[1] NO HCPL-263N [1] HCPL-063N[1] 1,000 50 12.5 [3] HCPL-193X[1] HCPL-56XX[1] HCPL-66XX[1] Notes: 1. Technical data are on separate Agilent publications. 2. 15 kV/µs with VCM = 1 kV can be achieved using Agilent application circuit. 3. Enable is available for single channel products only, except for HCPL-193X devices.

Ordering Information

Specify Part Number followed by Option Number (if desired). Example: HCPL-2611#XXXX 020 = 5000 V rms/1 minute UL Rating Option* 060 = IEC/EN/DIN EN 60747-5-2 VIORM = 630 Vpeak Option** 300 = Gull Wing Surface Mount Option † 500 = Tape and Reel Packaging Option XXXE = Lead Free Option Option data sheets available. Contact Agilent sales representative or authorized distributor for information. Remarks: The notation “#” is used for existing products, while (new) products launched since 15th July 2001 and lead free option will use “-” *For 6N137, HCPL-2601/11/30/31 and HCPL-4661 (8-pin DIP products) only. **For HCPL-2611 only. Combination of Option 020 and Option 060 is not available. †Gull wing surface mount option applies to through hole parts only.Schematic SHIELD VF USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 5). IF ICC VCC VO GND IO VE IE 7 6N137, HCPL-2601/2611 HCPL-0600/0601/0611 HCNW137, HCNW2601/2611 SHIELD VF1 IF1 ICC VCC VO1 IO1 SHIELD VF2 IF2 VO2 GND IO2 HCPL-2630/2631/4661 HCPL-0630/0631/0661

8-pin DIP Package (6N137, HCPL-2601/11/30/31, HCPL-4661) 8-pin DIP Package with Gull Wing Surface Mount Option 300 (6N137, HCPL-2601/11/30/31, HCPL-4661) JEDEC Registered Data (for 6N137 only). 1.080 ± 0.320 (0.043 ± 0.013) 2.54 ± 0.25 (0.100 ± 0.010) 0.51 (0.020) MIN. 0.65 (0.025) MAX. 4.70 (0.185) MAX. 2.92 (0.115) MIN. 5° TYP. 0.254+ 0.076 - 0.051 (0.010+ 0.003) - 0.002) 7.62 ± 0.25 (0.300 ± 0.010) 6.35 ± 0.25 (0.250 ± 0.010) 9.65 ± 0.25 (0.380 ± 0.010) A XXXXZ YYWW DATE CODE DIMENSIONS IN MILLIMETERS AND (INCHES). 5678 4321 OPTION CODE* UL RECOGNITION UR TYPE NUMBER *MARKING CODE LETTER FOR OPTION NUMBERS "L" = OPTION 020 "V" = OPTION 060 OPTION NUMBERS 300 AND 500 NOT MARKED. NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. 3.56 ± 0.13 (0.140 ± 0.005) 0.635 ± 0.25 (0.025 ± 0.010) 12° NOM. 9.65 ± 0.25 (0.380 ± 0.010) 0.635 ± 0.130 (0.025 ± 0.005) 7.62 ± 0.25 (0.300 ± 0.010) 5678 4321 9.65 ± 0.25 (0.380 ± 0.010) 6.350 ± 0.25 (0.250 ± 0.010) 1.016 (0.040) 1.27 (0.050) 10.9 (0.430) 2.0 (0.080) LAND PATTERN RECOMMENDATION 1.080 ± 0.320 (0.043 ± 0.013) 1.780 (0.070) MAX.1.19 (0.047) MAX. 2.54 (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES). 0.254+ 0.076 - 0.051 (0.010+ 0.003) - 0.002) NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. 3.56 ± 0.13 (0.140 ± 0.005)

Small-Outline SO-8 Package (HCPL-0600/01/11/30/31/61) 8-Pin Widebody DIP Package (HCNW137, HCNW2601/11) XXX YWW 8765 4321 5.994 ± 0.203 (0.236 ± 0.008) 3.937 ± 0.127 (0.155 ± 0.005) 0.406 ± 0.076 (0.050)BSC 5.080 ± 0.127 (0.200 ± 0.005) 3.175 ± 0.127 (0.060) 45° X 0.432 (0.017) 0.228 ± 0.025 (0.009 ± 0.001) TYPE NUMBER (LAST 3 DIGITS) DATE CODE 0.305 (0.012)MIN. TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX. NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX. 0.203 ± 0.102 (0.008 ± 0.004) PIN ONE 0 ~ 7° 7.49 (0.295) 1.9 (0.075) 0.64 (0.025) LAND PATTERN RECOMMENDATION 5678 4321 11.15 ± 0.15 (0.442 ± 0.006) 1.78 ± 0.15 (0.070 ± 0.006) 5.10 (0.201)MAX. 1.55 (0.061) MAX. 2.54 (0.100) TYP. DIMENSIONS IN MILLIMETERS (INCHES). NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. 7° TYP. 0.254+ 0.076 - 0.0051 (0.010+ 0.003) - 0.002) 11.00 (0.433) 9.00 ± 0.15 (0.354 ± 0.006) MAX. 10.16 (0.400) TYP. A HCNWXXXX YYWW DATE CODE TYPE NUMBER 0.51 (0.021) MIN. 0.40 (0.016) 0.56 (0.022) 3.10 (0.122) 3.90 (0.154)

8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300 (HCNW137, HCNW2601/11) Solder Reflow Temperature Profile TIME (SECONDS) TEMPERATURE ( °C)200 100 50 150 100 200 250 300 SEC. 50 SEC. SEC. 160°C 140°C 150°C PEAK TEMP. 245°C PEAK TEMP. 240°C PEAK TEMP. 230°C SOLDERING TIME 200°C PREHEATING TIME 150°C, 90 + 30 SEC. 2.5°C ± 0.5°C/SEC. 3°C + 1°C/–0.5°C TIGHT TYPICAL LOOSE ROOM TEMPERATURE PREHEATING RATE 3 °C + 1°C/–0.5°C/SEC. REFLOW HEATING RATE 2.5 °C ± 0.5°C/SEC. 1.00 ± 0.15 (0.039 ± 0.006) 7° NOM. 12.30 ± 0.30 (0.484 ± 0.012) 0.75 ± 0.25 (0.030 ± 0.010) 11.00 (0.433) 5678 4321 11.15 ± 0.15 (0.442 ± 0.006) 9.00 ± 0.15 (0.354 ± 0.006) 1.3 (0.051) 13.56 (0.534) 2.29 (0.09) LAND PATTERN RECOMMENDATION 1.78 ± 0.15 (0.070 ± 0.006) 4.00 (0.158)MAX. 1.55 (0.061) MAX. 2.54 (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES). NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. 0.254+ 0.076 - 0.0051 (0.010+ 0.003) - 0.002) MAX.

The 6N137, HCPL-26XX/06XX/ 46XX, and HCNW137/26XX have been approved by the following organizations: UL Recognized under UL 1577, Component Recognition Program, File E55361. CSA Approved under CSA Component Acceptance Notice #5, File CA 88324. Insulation and Safety Related Specifications 8-pin DIP Widebody (300 Mil) SO-8 (400 Mil) Parameter Symbol Value Value Value Units Conditions Minimum External L(101) 7.1 4.9 9.6 mm Measured from input terminals Air Gap (External to output terminals, shortest Clearance) distance through air. Minimum External L(102) 7.4 4.8 10.0 mm Measured from input terminals Tracking (External to output terminals, shortest Creepage) distance path along body. Minimum Internal 0.08 0.08 1.0 mm Through insulation distance, Plastic Gap conductor to conductor, usually (Internal Clearance) the direct distance between the photoemitter and photodetector inside the optocoupler cavity. Minimum Internal NA NA 4.0 mm Measured from input terminals Tracking (Internal to output terminals, along Creepage) internal cavity. Tracking Resistance CTI 200 200 200 Volts DIN IEC 112/VDE 0303 Part 1 (Comparative Tracking Index) Isolation Group IIIa IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1) Option 300 - surface mount classification is Class A in accordance with CECC 00802. Recommended Pb-free IR Profile IEC/EN/DIN EN 60747-5-2 Approved under IEC 60747-5-2:1997 + A1:2002 EN 60747-5-2:2001 + A1:2002 DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01 (Option 060 and HCNW only) 217 °C RAMP-DOWN 6 °C/SEC. MAX. RAMP-UP 3 °C/SEC. MAX. 150 - 200 °C 260 +0/-5 °C t 25 °C to PEAK 60 to 150 SEC. 20-40 SEC. TIME WITHIN 5 °C of ACTUAL PEAK TEMPERATURE tp ts PREHEAT 60 to 180 SEC. tL TL Tsmax Tsmin Tp TIME TEMPERATURE NOTES: THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200 °C, Tsmin = 150 °C

IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics (HCPL-2611 Option 060 Only) Description Symbol Characteristic Units Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤ 300 V rms I-IV for rated mains voltage ≤ 450 V rms I-III Climatic Classification 55/85/21 Pollution Degree (DIN VDE 0110/1.89) 2 Maximum Working Insulation Voltage V IORM 630 V peak Input to Output Test Voltage, Method b* VIORM x 1.875 = VPR, 100% Production Test with t m = 1 sec, V PR 1181 V peak Partial Discharge < 5 pC Input to Output Test Voltage, Method a* VIORM x 1.5 = VPR, Type and sample test, V PR 945 V peak tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage* (Transient Overvoltage, tini = 10 sec) V IOTM 6000 V peak Safety Limiting Values (Maximum values allowed in the event of a failure, also see Figure 16, Thermal Derating curve.) Case Temperature T S 175 °C Input Current I S,INPUT 230 mA Output Power P S,OUTPUT 600 mW Insulation Resistance at TS, VIO = 500 V R S ≥ 109 Ω *Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-2, for a detailed description. Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circu its in application. IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics(HCNW137/2601/2611 Only) Description Symbol Characteristic Units Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤ 600 V rms I-IV for rated mains voltage ≤ 1000 V rms I-III Climatic Classification (DIN IEC 68 part 1) 55/100/21 Pollution Degree (DIN VDE 0110/1.89) 2 Maximum Working Insulation Voltage V IORM 1414 V peak Input to Output Test Voltage, Method b* VIORM x 1.875 = VPR, 100% Production Test with t m = 1 sec, V PR 2651 V peak Partial Discharge < 5 pC Input to Output Test Voltage, Method a* VIORM x 1.5 = VPR, Type and sample test, V PR 2121 V peak tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage* (Transient Overvoltage, tini = 10 sec) V IOTM 8000 V peak Safety Limiting Values (Maximum values allowed in the event of a failure, also see Figure 16, Thermal Derating curve.) Case Temperature T S 150 °C Input Current I S,INPUT 400 mA Output Power P S,OUTPUT 700 mW Insulation Resistance at TS, VIO = 500 V R S ≥ 109 Ω *Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-2, for a detailed description. Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circu its in application.

Absolute Maximum Ratings* (No Derating Required up to 85 °C) Parameter Symbol Package** Min. Max. Units Note Storage Temperature T S -55 125 °C Operating Temperature† TA -40 85 °C Average Forward Input Current I F Single 8-Pin DIP 20 mA 2 Single SO-8 Widebody Dual 8-Pin DIP 15 1, 3 Dual SO-8 Reverse Input Voltage V R 8-Pin DIP, SO-8 5 V 1 Widebody 3 Input Power Dissipation P I Widebody 40 mW Supply Voltage V CC 7V (1 Minute Maximum) Enable Input Voltage (Not to V E Single 8-Pin DIP V CC + 0.5 V Exceed VCC by more than Single SO-8 500 mV) Widebody Enable Input Current I E 5m A Output Collector Current I O 50 mA 1 Output Collector Voltage V O 7V 1 Output Collector Power P O Single 8-Pin DIP 85 mW Dissipation Single SO-8 Widebody Dual 8-Pin DIP 60 1, 4 Dual SO-8 Lead Solder Temperature T LS 8-Pin DIP 260 °C for 10 sec., (Through Hole Parts Only) 1.6 mm below seating plane Widebody 260 °C for 10 sec., up to seating plane Solder Reflow Temperature SO-8 and See Package Outline Profile (Surface Mount Parts Only) Option 300 Drawings section *JEDEC Registered Data (for 6N137 only). **Ratings apply to all devices except otherwise noted in the Package column. †0°C to 70°C on JEDEC Registration. Recommended Operating Conditions Parameter Symbol Min. Max. Units Input Current, Low Level I FL* 0 250 µA Input Current, High Level[1] IFH** 5 15 mA Power Supply Voltage V CC 4.5 5.5 V Low Level Enable Voltage† VEL 0 0.8 V High Level Enable Voltage† VEH 2.0 V CC V Operating Temperature T A -40 85 °C Fan Out (at RL = 1 kΩ )[1] N 5 TTL Loads Output Pull-up Resistor R L 330 4 k Ω *The off condition can also be guaranteed by ensuring that V FL ≤ 0.8 volts. **The initial switching threshold is 5 mA or less. It is recommended that 6.3 mA to 10 mA be used for best performance and to p ermit at least a 20% LED degradation guardband. †For single channel products only.

Over recommended temperature (TA = -40°C to +85°C) unless otherwise specified. All Typicals at VCC = 5 V, TA = 25°C. All enable test conditions apply to single channel products only. See note 5. High Level Output I OH* All 5.5 100 µAV CC = 5.5 V, VE = 2.0 V, 1 1, 6, Current V O = 5.5 V, IF = 250 µA1 9 Input Threshold I TH Single Channel 2.0 5.0 mA V CC = 5.5 V, VE = 2.0 V, 2, 3 19 Current Widebody V O = 0.6 V, Dual Channel 2.5 I OL (Sinking) = 13 mA Low Level Output V OL* 8-Pin DIP 0.35 0.6 V V CC = 5.5 V, VE = 2.0 V, 2, 3, 1, 19 Voltage SO-8 I F = 5 mA, 4, 5 Widebody 0.4 I OL (Sinking) = 13 mA High Level Supply I CCH Single Channel 7.0 10.0* mA V E = 0.5 V V CC = 5.5 V 7 Current 6.5 V E = VCC IF = 0 mA Dual Channel 10 15 Both Channels Low Level Supply I CCL Single Channel 9.0 13.0* mA V E = 0.5 V V CC = 5.5 V 8 Current 8.5 V E = VCC IF = 10 mA Dual Channel 13 21 Both Channels High Level Enable I EH Single Channel -0.7 -1.6 mA V CC = 5.5 V , VE = 2.0 V Current Low Level Enable I EL* -0.9 -1.6 mA V CC = 5.5 V , VE = 0.5 V 9 Current High Level Enable V EH 2.0 V 19 Voltage Low Level Enable V EL 0.8 V Voltage Input Forward V F 8-Pin DIP 1.4 1.5 1.75* V T A = 25°CI F = 10 mA 6, 7 1 Voltage SO-8 1.3 1.80 Widebody 1.25 1.64 1.85 T A = 25°C 1.2 2.05 Input Reverse BV R* 8-Pin DIP 5 V I R = 10 µA1 Breakdown SO-8 Voltage Widebody 3 I R = 100 µA, TA = 25°C Input Diode ∆VF/ 8-Pin DIP -1.6 mV/ °C IF = 10 mA 7 1 Temperature ∆ TA SO-8 Coefficient Widebody -1.9 Input Capacitance C IN 8-Pin DIP 60 pF f = 1 MHz, V F = 0 V 1 SO-8 Widebody 70 *JEDEC registered data for the 6N137. The JEDEC Registration specifies 0°C to +70°C. HP specifies -40°C to +85°C.

Switching Specifications (AC) Over Recommended Temperature (TA = -40°C to +85°C), VCC = 5 V, IF = 7.5 mA unless otherwise specified. All Typicals at TA = 25°C, VCC = 5 V . Propagation Delay t PLH 20 48 75* ns T A = 25°CR L = 350 Ω 8, 9, 1, 10, Time to High 100 C L = 15 pF 10 19 Output Level Propagation Delay t PHL 25 50 75* ns T A = 25°C 1, 11, Time to Low 100 19 Output Level Pulse Width |t PHL - tPLH| 8-Pin DIP 3.5 35 ns 8, 9, 13, 19 Distortion SO-8 10, Widebody 40 11 Propagation Delay t PSK 40 ns 12, 13, Skew 19 Output Rise t r 24 ns 12 1, 19 Time (10-90%) Output Fall t f 10 ns 12 1, 19 Time (90-10%) Propagation Delay t ELH Single Channel 30 ns R L = 350 Ω , 13, 14 Time of Enable C L = 15 pF, 14 from VEH to VEL VEL = 0 V, VEH = 3 V Propagation Delay t EHL Single Channel 20 ns 15 Time of Enable from VEL to VEH *JEDEC registered data for the 6N137. **Ratings apply to all devices except otherwise noted in the Package column. Parameter Sym. Device Min. Typ. Units Test Conditions Fig. Note Logic High |CM H| 6N137 10,000 V/ µs| V CM| = 10 V V CC = 5 V, IF = 0 mA, 15 1, 16, Common HCPL-2630 V O(MIN) = 2 V, 18, 19 Mode HCPL-0600/0630 R L = 350 Ω , TA = 25°C Transient HCNW137 Immunity HCPL-2601/2631 5,000 10,000 |V CM| = 50 V HCPL-0601/0631 HCNW2601 HCPL-2611/4661 10,000 15,000 |V CM| = 1 kV HCPL-0611/0661 HCNW2611 Logic Low |CM L| 6N137 10,000 V/ µs| V CM| = 10 V V CC = 5 V, IF = 7.5 mA, 15 1, 17, Common HCPL-2630 V O(MAX) = 0.8 V, 18, 19 Mode HCPL-0600/0630 R L = 350 Ω , TA = 25°C Transient HCNW137 Immunity HCPL-2601/2631 5,000 10,000 |V CM| = 50 V HCPL-0601/0631 HCNW2601 HCPL-2611/4661 10,000 15,000 |V CM| = 1 kV HCPL-0611/0661 HCNW2611

1011 TA = 100°C

*JEDEC registered data for the 6N137. The JEDEC Registration specifies 0 °C to 70°C. Agilent specifies -40 °C to 85°C.

  1. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does
  2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does
  3. Derate linearly above 80 °C free-air temperature at a rate of 2.7 mW/ °C for the SOIC-8 package.
  4. Bypassing of the power supply line is required, with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler as illustrated in

Figure 17. Total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.

  1. The JEDEC registration for the 6N137 specifies a maximum I

OH of 250 µA. Agilent guarantees a maximum I OH of 100 µA.

  1. The JEDEC registration for the 6N137 specifies a maximum I CCH of 15 mA. Agilent guarantees a maximum I CCH of 10 mA.
  2. The JEDEC registration for the 6N137 specifies a maximum I CCL of 18 mA. Agilent guarantees a maximum I CCL of 13 mA.
  3. The tPLH propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the

rising edge of the output pulse.

  1. The tPHL propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the

falling edge of the output pulse.

  1. tPSK is equal to the worst case difference in t PHL and/or tPLH that will be seen between units at any given temperature and specified
  2. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew ” for more information.
  3. The tELH enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V

point on the rising edge of the output pulse.

  1. The tEHL enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point

on the falling edge of the output pulse.

  1. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state
  2. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state
  3. For sinusoidal voltages, (|dV CM | / dt)max = π fCMVCM(p-p).

PROBE AND STRAY WIRING CAPACITANCE. Figure 13. Test Circuit for tEHL and tELH. Figure 14. Typical Enable Propagation Figure 15. Test Circuit for Common Mode Transient Immunity and Typical Waveforms.

0 V SWITCH AT A: I = 0 mAF

1 CCV

*DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED FOR UNITS WITH OPEN COLLECTOR OUTPUT. Figure 18. Recommended TTL/LSTTL to TTL/LSTTL Interface Circuit.

Propagation Delay, Pulse- Width Distortion and Propagation Delay Skew Propagation delay is a figure of merit which describes how quickly a logic signal propagates through a system. The propaga- tion delay from low to high (t PLH) is the amount of time required for an input signal to propagate to the output, causing the output to change from low to high. Similarly, the propagation delay from high to low (t PHL) is the amount of time required for the input signal to propagate to the output causing the output to change from high to low (see Figure 8). Pulse-width distortion (PWD) results when t PLH and tPHL differ in value. PWD is defined as the difference between t PLH and tPHL and often determines the maximum data rate capability of a transmission system. PWD can be expressed in percent by dividing the PWD (in ns) by the minimum pulse width (in ns) being transmitted. Typically, PWD on the order of 20-30% of the minimum pulse width is tolerable; the exact figure depends on the particular application (RS232, RS422, T-l, etc.). Propagation delay skew, t PSK, is an important parameter to consider in parallel data applica- tions where synchronization of signals on parallel data lines is a concern. If the parallel data is being sent through a group of optocouplers, differences in propagation delays will cause the data to arrive at the outputs of the optocouplers at different times. If this difference in propagation delays is large enough, it will determine the maximum rate at which parallel data can be sent through the optocouplers. Propagation delay skew is defined as the difference between the minimum and maximum propagation delays, either t PLH or tPHL, for any given group of optocouplers which are operating under the same conditions (i.e., the same drive current, supply voltage, output load, and operating temperature). As illustrated in Figure 19, if the inputs of a group of optocouplers are switched either ON or OFF at the same time, t PSK is the difference between the shortest propagation delay, either t PLH or tPHL, and the longest propagation delay, either tPLH or tPHL. As mentioned earlier, tPSK can determine the maximum parallel data transmission rate. Figure 20 is the timing diagram of a typical parallel data application with both the clock and the data lines being sent through optocouplers. The figure shows data and clock signals at the inputs and outputs of the optocouplers. To obtain the maximum data transmission rate, both edges of the clock signal are being used to clock the data; if only one edge were used, the clock signal would need to be twice as fast. Propagation delay skew repre- sents the uncertainty of where an edge might be after being sent through an optocoupler. Figure 20 shows that there will be uncertainty in both the data and the clock lines. It is important that these two areas of uncertainty not overlap, otherwise the clock signal might arrive before all of the data outputs have settled, or some of the data outputs may start to change before the clock signal has arrived. From these considerations, the absolute minimum pulse width that can be sent through optocouplers in a parallel application is twice t PSK. A cautious design should use a slightly longer pulse width to ensure that any additional uncertainty in the rest of the circuit does not cause a problem. The t PSK specified optocouplers offer the advantages of guaranteed specifications for propagation delays, pulsewidth distortion and propagation delay skew over the recommended temperature, input current, and power supply ranges.