HCPL3140 HP | Alldatasheet

Document overview

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Technical content

Features

  • 0.4 A minimum peak output current
  • High speed response: 0.7 µs maximum propagation delay over temperature range
  • Ultra high CMR: minimum 10 kV/µs at VCM = 1 kV
  • Bootstrappable supply current: maximum 3 mA
  • Wide operating temperature range: –40°C to 100°C
  • Wide V CC operating range: 10 V to 30 V over temp. range
  • Available in DIP8 and SO8 package
  • Safety approvals: UL approval pending, 2500 Vrms for 1 minute. CSA approval pending. VDE approval pending V IORM = 630 Vpeak (HCPL-3140)

Applications

  • Isolated IGBT/Power MOSFET gate drive
  • AC and brushless DC motor drives
  • Inverters for home appliances
  • Industrial inverters
  • Switch Mode Power Supplies (SMPS) Truth Table LED V O OFF LOW ON HIGH A 0.1 µF bypass capacitor must be connected between pins V CC and VEE. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.

Description

family of devices consists of a GaAsP LED optically coupled to an integrated circuit with a power output stage. These optocouplers are ideally suited for driving power IGBTs and MOSFETs used in motor control inverter applications. The high operating voltage range of the Functional Diagram output stage provides the drive voltages required by gate controlled devices. The voltage and current supplied by this optocoupler makes it ideally suited for directly driving small or medium power IGBTs. For IGBTs with higher ratings, the HCPL-3150 (0.5 A) or HCPL-3120 (2.0 A) optocouplers can be used.

Ordering Information

Specify part number followed by option number (if desired). Example : HCPL-3140#XXX No option = Standard DIP package, 50 per tube. 300 = Gull Wing Surface Mount Option, 50 per tube. 500 = Tape and Reel Packaging Option. 060 = VDE 0884, V IORM = 630 VPEAK. HCPL-0314#XXX No option = SOIC-8 surface mount in tube, 100 per tube. 500 = Tape and Reel Packaging Option. 060 = VDE 0884, V IORM = 566 VPEAK. Package Outline Drawings HCPL-3140 Standard DIP Package 9.65 ± 0.25 (0.380 ± 0.010) A XXXXZ YYWW DATE CODE 1.080 ± 0.320 (0.043 ± 0.013) 2.54 ± 0.25 (0.100 ± 0.010) 0.51 (0.020) MIN. 0.65 (0.025) MAX. 4.70 (0.185) MAX. 2.92 (0.115) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES). 5678 4321 5° TYP. OPTION CODE* 0.254+ 0.076 - 0.051 (0.010+ 0.003) - 0.002) 7.62 ± 0.25 (0.300 ± 0.010) 6.35 ± 0.25 (0.250 ± 0.010) TYPE NUMBER * MARKING CODE LETTER FOR OPTION NUMBERS. "V" = OPTION 060 OPTION NUMBERS 300 AND 500 NOT MARKED.

HCPL-0314 Small Outline SO-8 Package XXX YWW 8765 4321 5.994 ± 0.203 (0.236 ± 0.008) 3.937 ± 0.127 (0.155 ± 0.005) 0.406 ± 0.076 (0.050)BSG 5.080 ± 0.127 (0.200 ± 0.005) 3.175 ± 0.127 (0.060) 45° X 0.432 (0.017) 0.228 ± 0.025 (0.009 ± 0.001) TYPE NUMBER (LAST 3 DIGITS) DATE CODE 0.305 (0.012)MIN. TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX. 0.203 ± 0.102 (0.008 ± 0.004) PIN ONE 0 ~ 7° 0.635 ± 0.25 (0.025 ± 0.010) 12° NOM. 9.65 ± 0.25 (0.380 ± 0.010) 0.635 ± 0.130 (0.025 ± 0.005) 7.62 ± 0.25 (0.300 ± 0.010) 5678 4321 9.65 ± 0.25 (0.380 ± 0.010) 6.350 ± 0.25 (0.250 ± 0.010) 1.016 (0.040) 1.194 (0.047) 1.194 (0.047) 1.778 (0.070) 9.398 (0.370) 9.906 (0.390) 4.826 (0.190) TYP. 0.381 (0.015) 0.635 (0.025) PAD LOCATION (FOR REFERENCE ONLY) 1.080 ± 0.320 (0.043 ± 0.013) 4.19 (0.165)MAX. 1.780 (0.070) MAX.1.19 (0.047) MAX. 2.54 (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES). 0.254+ 0.076 - 0.051 (0.010+ 0.003) - 0.002) HCPL-3140 Gull Wing Surface Mount Option 300 Outline Drawing

Solder Reflow Temperature Profile Regulatory Information The HCPL-3140/HCPL-0314 are pending approval by the following organizations: VDE Approval under VDE 0884/06.92 with V IORM = 630 Vpeak (HCPL-3140) and 566 Vpeak for HCPL-0314. UL Approval under UL 1577, component recognition program up to V ISO = 2500 Vrms expected prior to product release. File E55361. CSA Approval under CSA Component Acceptance Notice #5, File CA 88324 expected prior to product release. VDE 0884 Insulation Characteristics (HCPL-3140 Option 060) Description Symbol Characteristic Unit Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤ 150 Vrms I - IV for rated mains voltage ≤ 300 Vrms I - III for rated mains voltage ≤ 600 Vrms I-II Climatic Classification 55/100/21 Pollution Degree (DIN VDE 0110/1.89) 2 Maximum Working Insulation Voltage V IORM 630 V peak Input to Output Test Voltage, Method b* VIORM x 1.875=V PR, 100% Production Test with V PR 1181 V peak tm=1 sec, Partial discharge < 5 pC Input to Output Test Voltage, Method a* V IORM x 1.5=V PR, Type and Sample Test, t m=60 sec, V PR 945 V peak Partial discharge < 5 pC Highest Allowable Overvoltage V IOTM 6000 V peak (Transient Overvoltage t ini = 10 sec) Safety-limiting values - maximum values allowed in the event of a failure. Case Temperature T S 175 °C Input Current I S,INPUT 230 mA Output Power P S, OUTPUT 600 mW Insulation Resistance at T S, VIO = 500 V R S >109 Ω * Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (VDE 0884) for a detailed description of Method a and Method b partial discharge test profiles. ** Refer to the following figure for dependence of P S and IS on ambient temperature. TIME (SECONDS) TEMPERATURE (°C) 200 100 50 150 100 200 250 300 SEC. 50 SEC. SEC. 160°C 140°C 150°C PEAK TEMP. 245°C PEAK TEMP. 240°C PEAK TEMP. 230°C SOLDERING TIME 200°C PREHEATING TIME 150°C, 90 + 30 SEC. 2.5°C ± 0.5°C/SEC. 3°C + 1°C/–0.5°C TIGHT TYPICAL LOOSE ROOM TEMPERATURE PREHEATING RATE 3°C + 1°C/–0.5°C/SEC. REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.

OUTPUT POWER – P S, INPUT CURRENT – IS TS – CASE TEMPERATURE – °C 200 600 400 800 50 75 100 200 150 175 PS (mW) 125 100 300 500 700 IS (mA) Insulation and Safety Related Specifications Parameter Symbol HCPL-3140 HCPL-0314 Units Conditions Minimum External Air Gap L(101) 7.1 4.9 mm Measured from input terminals (Clearance) to output terminals, shortest distance through air. Minimum External Tracking L(102) 7.4 4.8 mm Measured from input terminals (Creepage) to output terminals, shortest distance path along body. Minimum Internal Plastic Gap 0.08 0.08 mm Through insulation distance (Internal Clearance) conductor to conductor, usually the straight line distance thickness between the emitter and detector. Tracking Resistance CTI >175 >175 V DIN IEC 112/VDE 0303 Part 1 (Comparative Tracking Index) Isolation Group IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1) Absolute Maximum Ratings Parameter Symbol Min. Max. Units Note Storage Temperature T S -55 125 °C Operating Temperature T A -40 100 °C Average Input Current I F(AVG) 25 mA 1 Peak Transient Input Current (<1 µs pulse I F(TRAN) 1.0 A width, 300pps) Reverse Input Voltage V R 5V “High” Peak Output Current I OH(PEAK) 0.6 A 2 “Low” Peak Output Current I OL(PEAK) 0.6 A 2 Supply Voltage V CC-VEE -0.5 35 V Output Voltage V O(PEAK) -0.5 V CC V Output Power Dissipation P O 250 mW 3 Input Power Dissipation P I 105 mW 4 Lead Solder Temperature 260 °C for 10 sec., 1.6 mm below seating plane Solder Reflow Temperature Profile See Package Outline Drawings section

Electrical Specifications (DC) Over recommended operating conditions unless otherwise specified. Test Parameter Symbol Min. Typ. Max. Units Conditions Fig. Note High Level Output Current I OH 0.2 A Vo = V CC- 4 2 5 0.4 0.5 Vo = V CC-10 3 2 Low Level Output Current I OL 0.2 0.4 A Vo = V EE+2.5 5 5 0.4 0.5 Vo = V EE+10 6 2 High Level Output Voltage V OH VCC-4 V CC-1.8 V Io = -100 mA 1 6,7 Low Level Output Voltage V OL 0.4 1 V Io = 100 mA 4 High Level Supply Current I CCH 0.7 3 mA Io = 0 mA 7,8 14 Low Level Supply Current I CCL 1.2 3 mA Io = 0 mA Threshold Input Current I FLH 7 mA Io = 0 mA, 9,15 Low to High Vo>5 V Threshold Input Voltage V FHL 0.8 V High to Low Input Forward Voltage V F 1.2 1.5 1.8 V I F = 10 mA 16 Temperature Coefficient of DV F/DTA –1.6 mV/ °C Input Forward Voltage Input Reverse Breakdown BV R 5V I R = 10 µA Voltage Input Capacitance C IN 60 pF f = 1 MHz, VF = 0 V Recommended Operating Conditions Parameter Symbol Min. Max. Units Note Power Supply V CC -VEE 10 30 V Input Current (ON) I F(ON) 81 2 m A Input Voltage (OFF) V F(OFF) - 3.0 0.8 V Operating Temperature T A - 40 100 °C

Switching Specifications (AC) Over recommended operating conditions unless otherwise specified. Test Parameter Symbol Min. Typ. Max. Units Conditions Fig. Note Propagation Delay Time to t PLH 0.1 0.2 0.7 µs Rg = 47 Ω , 10,11, 14 High Output Level Cg = 3 nF, 12,13, Propagation Delay Time to t PHL 0.1 0.3 0.7 µs f = 10 kHz, 14,17 Low Output Level Duty Cycle = Propagation Delay PDD -0.5 0.5 µs 50%, 10 Difference Between Any IF = 8 mA, Two Parts or Channels VCC = 30 V Rise Time t R 50 ns Fall Time t F 50 ns Output High Level Common |CMH| 10 kV/ µsT A = 25°C, 18 11 Mode Transient Immunity V CM = 1 kV Output Low Level Common |CML| 10 kV/ µs1 8 1 2 Mode Transient Immunity Package Characteristics Test Parameter Symbol Min. Typ. Max. Units Conditions Fig. Note Input-Output Momentary V ISO 2500 V rms TA=25°C, 8,9 Withstand Voltage RH<50% for Input-Output Resistance R I-O 1012 Ω VI-O=500 V 9 Input-Output Capacitance C I-O 0.6 pF Freq=1 MHz Notes: 1. Derate linearly above 70 °C free air temperature at a rate of 0.3 mA/ °C. 2. Maximum pulse width = 10 µs, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with I O peak minimum = 0.4 A. See Application section for additional details on limiting I OL peak. 3. Derate linearly above 85 °C, free air temperature at the rate of 4.0 mW/ °C. 4. Input power dissipation does not require derating. 5. Maximum pulse width = 50 µs, maximum duty cycle = 0.5%. 6. In this test, V OH is measured with a DC load current. When driving capacitive load V OH will approach V CC as IOH approaches zero amps. 7. Maximum pulse width = 1 ms, maximum duty cycle = 20%. 8. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (leakage detection current limit I I-O ≤ 5 µA). This test is performed before 100% production test for partial discharge (method B) shown in the VDE 0884 Insulation Characteristics Table, if applicable. 9. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted together. 10. PDD is the difference between t PHL and tPLH between any two parts or channels under the same test conditions. 11. Common mode transient immunity in the high state is the maximum tolerable |dVcm/dt| of the common mode pulse V CM to assure that the output will remain in the high state (i.e. Vo > 6.0 V). 12. Common mode transient immunity in a low state is the maximum tolerable |dV CM/dt| of the common mode pulse, V CM, to assure that the output will remain in a low state (i.e. Vo < 1.0 V). 13. This load condition approximates the gate load of a 1200 V/25 A IGBT. 14. The power supply current increases when operating frequency and Qg of the driven IGBT increases.

Figure 17. Propagation Delay Test Circuit and Waveforms. Figure 18. CMR Test Circuit and Waveforms.

10 KHz

www.semiconductor.agilent.com Data subject to change. Copyright © 2001 Agilent Technologies, Inc. September 11, 2001 Obsoletes 5988-3612EN 5988-4133EN