HC-5502B INTERSIL | Alldatasheet
Document overview
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- PDF pages: 9
Technical content
Features
- Capable of 12V or 5V (VB+) Operation
- Monolithic Integrated Device
- DI High Voltage Process
- Compatible With Worldwide PBX Performance Requirements
- Controlled Supply of Battery Feed Current for Short Loops (30mA)
- Internal Ring Relay Driver
- Low Power Consumption During Standby
- Switch Hook, Ground Key and Ring Trip Detection Functions
- Selective Denial of Power to Subscriber Loops
Applications
- Solid State Line Interface Circuit for Analog and Digital PBX Systems
- Direct Inward Dial (DID) Trunks
- Voice Messaging PBXs
- Related Literature - AN549, The HC-5502S/4X Telephone Subscriber Line Interface Circuits (SLIC) - AN571, Using Ring Sync with HC-5502A and HC-5504 SLICs
Ordering Information
TEMP. RANGE (oC) PACKAGE PKG. NO. HC1-5502B-5 0 to 75 24 Ld CERDIP F24.6 HC1-5502B-9 -40 to 85 24 Ld CERDIP F24.6 HC3-5502B-5 0 to 75 24 Ld PDIP E24.6 HC4P5502B-5 0 to 75 28 Ld PLCC N28.45 HC9P5502B-5 0 to 75 24 Ld SOIC M24.3 Pinouts HC-5502B (PDIP, CERDIP, SOIC) TOP VIEW HC-5502B (PLCC) TOP VIEW TIP RING C1* DG RS TF RF BG TX +IN AG OUT VB + -IN RC PD GKD SHD RD VB - R X RX +IN N/C OUT RC RING TIP TX AG † OPTIONAL -IN RF BG N/C SHD GKD PD BV+ N/C 12 13 14 15 16 17 18 262728123VB - C1 † DG N/C RS RD TF Data Sheet February 1999
Absolute Maximum Ratings(Note 1) Thermal Information Supply Voltage Operating Conditions Loop Resistance (R Operating Temperature Range Thermal Resistance (Typical, Note 2) θJA (oC/W) oC (PLCC and SOIC - Lead Tips Only) Die Characteristics CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationo ft h e device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical SpecificationsUnless Otherwise Specified, VB- = -48V, VB+ = 12V and 5V, AG = BG = DG = 0V, Typical Parameters TA = 25oC. Min-Max Parameters are Over Operating Temperature Range PARAMETER TEST CONDITIONS MIN TYP MAX UNITS On Hook Power Dissipation I LONG = 0, VB+ = 12V (Note 3) - 135 235 mW Off Hook Power Dissipation R L = 600Ω , ILONG = 0, VB+ = 12V (Note 3) - 450 690 mW Off Hook IB+R L = 600Ω , ILONG = 0, TA = -40oC (Note 3) - - 6.0 mA Off Hook IB+R L = 600Ω , ILONG = 0, TA = 25oC (Note 3) - - 5.3 mA Off Hook IB-R L = 600Ω , ILONG = 0 (Note 3) - - 39 mA Off Hook Loop Current R L = 1200Ω , ILONG = 0 (Note 3) - 21 - mA Off Hook Loop Current R L = 1200Ω , VB- = -42V, ILONG = 0, TA = 25oC (Note 3) 17.5 - - mA Off Hook Loop Current R L = 200Ω , ILONG = 0 (Note 3) 25.5 30 34.5 mA Fault Currents TIP to Ground -1 4- m A RING to Ground -4 7- m A TIP to RING -3 0- m A TIP and RING to Ground - 47 - mA Ring Relay Drive VOL IOL = 62mA - 0.2 0.5 V Ring Relay Driver Off Leakage V RD = 12V,RC = 1 = HIGH, TA = 25oC - - 100 µA Ring Trip Detection Period R L = 600Ω , TA = 25oC - 2 3 Ring Cycles Switch Hook Detection Threshold SHD = VOL 10 - - mA SHD = VOH --5 m A HC-5502B
Ground Key Detection Threshold GKD = VOL 20 - - mA GKD = VOH - - 10 mA Loop Current During Power Denial R L = 200Ω - ±2- m A Dial Pulse Distortion 0-5 m s Receive Input Impedance (Note 4) - 110 - k Ω Transmit Output Impedance (Note 4) - 10 20 Ω 2-Wire Return Loss Referenced to 600 Ω +2.16µF (Note 4) SRL LO - 15.5 - dB ERL -2 4- d B SRL HI -3 1- d B Longitudinal Balance 1V RMS 200Hz - 3400Hz, (Note 4) 2-Wire Off Hook IEEE Method 0oC ≤ TA ≤ 75oC 58 65 - dB 2-Wire On Hook 60 63 - dB 4-Wire Off Hook 50 58 - dB Low Frequency Longitudinal Balance R.E.A. Method, (Note 4) R L = 600Ω , 0oC ≤ TA ≤ 75oC - - 23 dBrnC - - -67 dBm0p Insertion Loss 2-Wire to 4-Wire, 4-Wire to 2-Wire At 1kHz, 0dBm Input Level, Referenced 600Ω - ±0.05 ±0.2 dB Frequency Response 200 - 3400Hz Referenced to Absolute Loss at 1kHz and 0dBm Signal Level (Note 4) - ±0.02 ±0.05 dB Idle Channel Noise 2-Wire to 4-Wire, 4-Wire to 2-Wire (Note 4) - 1 5 dBrnC - -89 -85 dBm0p Absolute Delay 2-Wire to 4-Wire, 4-Wire to 2-Wire (Note 4) - - 2 µs Trans Hybrid Loss Balance Network Set Up for 600 Ω Termination at 1kHz 36 40 - dB Overload Level 2-Wire to 4-Wire, 4-Wire to 2-Wire VB+ = 5V 1.5 V PEAK VB+ = 12V 1.75 - - V PEAK Level Linearity At 1kHz, (Note 4) Referenced to 0dBm Level 2-Wire to 4-Wire, 4-Wire to 2-Wire +3 to -40dBm - - ±0.05 dB -40 to -50dBm - - ±0.1 dB -50 to -55dBm - - ±0.3 dB Electrical SpecificationsUnless Otherwise Specified, VB- = -48V, VB+ = 12V and 5V, AG = BG = DG = 0V, Typical Parameters TA = 25oC. Min-Max Parameters are Over Operating Temperature Range (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS HC-5502B
Power Supply Rejection Ratio 30 - 60Hz, R L = 600Ω, (Note 4) VB+ to 2-Wire 15 - - dB VB+ to Transmit 15 - - dB VB- to 2-Wire 15 - - dB VB- to Transmit 15 - - dB VB+ to 2-Wire 200 - 16kHz, R L = 600Ω 30 - - dB VB+ to Transmit 30 - - dB VB- to 2-Wire 30 - - dB VB- to Transmit 30 - - dB Logic Input Current (RS,RC, PD) 0V ≤ VIN ≤ 5V - - ±100 µA Logic Inputs Logic ‘0’ VIL - - 0.8 V Logic ‘1’ VIH 2.0 - 5.5 V Logic Outputs Logic ‘0’ VOL ILOAD 800µA, VB+ = 12V, 5V - 0.1 0.5 V Logic ‘1’ VOH ILOAD 80µA, VB+ = 12V 2.7 5.0 5.5 V ILOAD 40µA, VB+ = 5V 2.7 - 5.0 V Uncommitted Op Amp Specifications PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Input Offset Voltage - ±5- m V Input Offset Current - ±10 - nA Input Bias Current -2 0- n A Differential Input Resistance (Note 4) - 1 - M Ω Output Voltage Swing R L = 10kΩ , VB+ = 12V - ±6.2 ±6.6 V PEAK R L = 10kΩ , VB+ = 5V - ±3- V PEAK Output Resistance A VCL = 1, (Note 4) - 10 - Ω Small Signal GBW (Note 4) - 1 - MHz NOTES: 3. ILONG = Longitudinal Current. 4. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification com- pliance. Electrical SpecificationsUnless Otherwise Specified, VB- = -48V, VB+ = 12V and 5V, AG = BG = DG = 0V, Typical Parameters TA = 25oC. Min-Max Parameters are Over Operating Temperature Range (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS HC-5502B
28 PIN
24 PIN
DIP/SOIC SYMBOL DESCRIPTION 2 1 TIP An analog input connected to the TIP (more positive) side of the subscriber loop through a 150 Ω feed resistor and a ring relay contact. Functions with the Ring terminal to receive voice signals from the telephone and for loop monitoring process. 3 2 RING An analog input connected to the RING (more negative) side of the subscriber loop through a 150 Ω feed resistor and a ring relay contact. Functions with the Tip terminal to receive voice signals from the telephone and for loop monitoring purposes. 43 V B+ Positive Voltage Source - Most positive supply. VB+ is typically 12V or 5V. 54 C 1 Capacitor #1 - Optional Capacitor used to improve power supply rejection. This pin should be left open if unused. 65 C 3 Capacitor #3 - An external capacitor to be connected between this terminal and analog ground. Re- quired for proper operation of the loop current limiting function, and for filtering VB- supply. Typical value is 0.3µF , 30V.
76 D G
(Note 5) Digital Ground - To be connected to zero potential and serves as a reference for all digital inputs and outputs on the SLIC. 9 7 RS Ring Synchronization Inpu t - A TTL - compatible clock input. The clock should be arranged such that a positive transition occurs on the negative going zero crossing of the ring voltage source, ensuring that the ring relay is activated and deactivated when the instantaneous ring voltage is near zero. If synchronization is not required, tie to 5V. 10 8 RD Relay Driver - A low active open collector logic output. When enabled, the external ring relay is energized. 1 1 9 T F T i pF e e d-Al o w impedance analog output connected to the TIP terminal through a 150Ω feed resistor. Functions with the RF terminal to provide loop current, feed voice signals to the telephone set, and sink longitudinal current. 12 10 RF Ring Feed - A low impedance analog output connected to the RING terminal through a 150 Ω feed resistor. Functions with the TF terminal to provide loop current, feed voice signal to the telephone set, and sink longitudinal current. 13 11 V B- Negative Voltage Source - Most negative supply. VB- is typically -48V with an operational range of - 42V to -58V. Frequently referred to as “battery”. 14 12 BG (Note 1) Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this ground terminal. 16 13 SHD Switch Hook Detection - A low active LS TTL - compatible logic output. This output is enabled for loop currents exceeding 10mA and disabled for loop currents less than 5mA. 17 14 GKD Ground Key Detection - A low active LS TTL - compatible logic output. This output is enabled if the DC current into the ring lead exceeds the DC current out of the tip lead by more than 20mA, and disabled if this current difference is less than 10mA. 18 15 PD Power Denial - A low active TTL - Compatible logic input. When enabled the switch hook detect (SHD) and ground key detect (GKD) are not necessarily valid, and the relay driver (RD) output is disabled. 19 16 RC Ring Command - A low active TTL - Compatible logic input. When enabled, the relay driver (RD) output goes low on the next rising edge of the ring sync (RS) input, as long as the SLIC is not in the power denial state (PD = 0) or the subscriber is not already off- hook (SHD = 0). 20 17 C 2 Capacitor #2 - An external capacitor to be connected between this terminal and digital ground. Prevents false ground key indications from occurring during ring trip detection. Typical value is 0.15µF , 10V. This capacitor is not used if ground key function is not required. 21 18 OUT The analog output of the spare operational amplifier. 23 19 -IN The inverting analog input of the spare operational amplifier. HC-5502B
24 20 +IN The non-inverting analog input of the spare operational amplifier. 25 21 RX Receive Input, 4-Wire Sid e - A high impedance analog input which is internally biased. Capacitive coupling to this input is required. AC signals appearing at this input differentially drive the Tip feed and Ring feed amplifiers, which in turn drive tip and ring through 300Ω of feed resistance on each side of the line. 26 22 C 4 Capacitor #4 - An external capacitor to be connected between this terminal and analog ground. This capacitor prevents false ground key indication and false ring trip detection from occurring when lon- gitudinal currents are induced onto the subscriber loop from nearby power lines and other noise sources. This capacitor is also required for the proper operation of ring trip detection. Typical value is 0.5µF to 1.0µF , 20V. This capacitor should be nonpolarized. 27 23 AG (Note 5) Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX) and receive input (RX) terminals. 28 24 TX Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential volt- age across Tip and Ring. Transhybrid balancing must be performed (using the SLIC microcircuit’s spare op amp) beyond this output to completely implement two to four wire conversion. This output is unbalanced and referenced to analog ground. Since the DC level of this output varies with loop current, capacitive coupling to the next stage is essential. 1, 8, 5, 22 NC No internal connection. NOTE: 5. All grounds (AG, BG, and DG) must be applied before V B+o rVB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. Pin Descriptions (Continued) DIP/SOIC SYMBOL DESCRIPTION RING RELAY LOOP CURRENT LIMITER BATTERY FEED DIFF AMP OP AMP LOOP MONITORING RING CONTROL
2 WIRE
150Ω RING 150Ω RF BG 150Ω TF TIP RD RC RSRING VOLTAGE RING SYNC RING COMMAND RING TRIP SHD GKD TX TRANSMIT OUTPUT OUT +IN -IN RX RECEIVE INPUT SLIC MICROCIRCUIT 150Ω SWITCH HOOK DETECTION GROUND KEY DETECTION HC-5502B
Pin Numbers for DIP/SOIC Package A-400 TIP FEED AMP A-200 LONG’L I/V AMP A-100 TRANSV’L I/VAMP A-300 RING FEED AMP C3 TX RS RD PD RC SHD GKD OUT-+C1VB +DIG GND ANA GND BAT GNDVBATC4RCV A-500 OP AMP VB + VOLTAGE AND CURRENT BIAS NETWORK IB4 VBAT VB + VB + Q D3 Q D36 GK SH RFC R 18 R 19 R 13 VBAT VBAT R 14 VB2 VBAT/2 REFERENCE R 21 R 15 R 16 R 2 R 1 R 4 R 3 R 9 R 10 R 8 R 7 VBAT VBATVB + R 17 VB2 IB1 IB2 IB3 IB4 IB5 IB6 IB7 IB8 IB9VBAT IB10 IB11 VB1 VB2 VB3 VB4 VB5 -5V IB3 VBAT VB + IB10-5V V B + VB + VBAT VBAT VB + R 6 R 5 R 11 R 20 R 12 IB7 IB6 IIL LOGIC INTERFACE VB3 VBAT IB1 + - IB8 VBAT +5V VB4 VB + IB9 IB2 VB5 Q D27 Q D28 VB1 LOOP CURRENT LIMITING SWITCH HOOK DETECTOR RING TRIP DETECTOR GND SHORTS CURRENT LIMITING VB5 THERMAL LIMITING 87245 IB5 VBAT 10 RF RING TIP TF 21 22 11 12 23 6 3 4 20 19 18 VBAT HC-5502B
All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com Logic Diagram HC-5502B LOGIC GATE SCHEMATIC Overvoltage Protection and Longitudinal Current Protection The SLIC device, in conjunction with an external protection bridge, will withstand high voltage lightning surges and power line crosses. High voltage surge conditions are as specified in Table 1. The SLIC will withstand longitudinal currents up to a maximum or 30mARMS, 15mARMS per leg, without any performance degradation. RELAY DRIVER GKDSHDRD PDRCRS DELAY LOGIC BIAS A B C A B CTTL TO STTL TO R 21 GK SH SCHOTTKY LOGIC TTL TO STTL TTL TO STTL TTL TO STTL TTL TO STTL 1 2 4 5 9 12 1411 TABLE 1. PARAMETER TEST CONDITION PERFORMANCE (MAX) UNITS Longitudinal Surge 10µs Rise/ ±1000 (Plastic) V PEAK 1000µs Fall ±500 (Ceramic) V PEAK Metallic Surge 10 µs Rise/ ±1000 (Plastic) V PEAK 1000µs Fall ±500 (Ceramic) V PEAK T/GND 10 µs Rise/ ±1000 (Plastic) V PEAK R/GND 1000 µs Fall ±500 (Ceramic) V PEAK 50/60Hz Current T/GND 11 Cycles 700 (Plastic) V RMS R/GND Limited to 10ARMS 350 (Ceramic) V RMS HC-5502B
C 4 = 0.5µF to 1.0µF , 10%, 20V (Should be nonpolarized). value), ZB = 0 for 600Ω Terminations (Note 7).
- C1 is an optional capacitor used to improve VB+ supply rejection. This pin must be left open if unused.
- To obtain the specified transhybrid loss it is necessary for the three legs of the balance network, C6-R1 and R2 and C7-ZB-R3, to match in im-
current limiting protection.
- Secondary protection diode bridge recommended is a 2A, 200V type.
- All grounds (AG, BG, and DG) must be applied before V
to run separate grounds off a line card, the AG must be applied first.
- Pin numbers given for DIP/SOIC package.
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC