SN54HC86_15 TI1 | Alldatasheet

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SN54HC86, SN74HC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCLS100E – DECEMBER 1982 – REVISED AUGUST 2003 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068 Wide Operating Voltage Range of 2 V to 6 V /C0068 Outputs Can Drive Up To 10 LSTTL Loads /C0068 Low Power Consumption, 20-µA Max ICC /C0068 Typical tpd = 10 ns /C0068 ±4-mA Output Drive at 5 V /C0068 Low Input Current of 1 µA Max /C0068 True Logic GND V CC SN54HC86 ...J O R W PACKAGE SN74HC86 . . . D, N, NS, OR PW PACKAGE (TOP VIEW) 321 2 0 1 9 91 01 11 21 3 NC NC NC NC NC V GND NC SN54HC86 . . . FK PACKAGE (TOP VIEW) CC NC – No internal connection description/ordering information These devices contain four independent 2-input exclusive-OR gates. They perform the Boolean function Y = A /C0281 B or Y = AB + AB in positive logic. A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

ORDERING INFORMATION

TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING –40 C to 85C PDIP – N Tube of 25 SN74HC86N SN74HC86N –40 C to 85C SOIC – D Tube of 50 SN74HC86D HC86 –40 C to 85C SOIC – D Reel of 2500 SN74HC86DR HC86 –40°C to 85°C Reel of 250 SN74HC86DT –40°C to 85°C SOP – NS Reel of 2000 SN74HC86NSR HC86 TSSOP – PW Tube of 90 SN74HC86PW HC86TSSOP – PW Reel of 2000 SN74HC86PWR HC86 Reel of 250 SN74HC86PWT –55 C to 125C CDIP – J Tube of 25 SNJ54HC86J SNJ54HC86J –55°C to 125°C CFP – W Tube of 150 SNJ54HC86W SNJ54HC86W LCCC – FK Tube of 55 SNJ54HC86FK SNJ54HC86FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2003, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

SN54HC86, SN74HC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCLS100E – DECEMBER 1982 – REVISED AUGUST 2003

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(each gate) INPUTS OUTPUT A B OUTPUT Y L L L L HH H LH H H L exclusive-OR logic An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols. = 1 Exclusive OR These are five equivalent exclusive-OR symbols valid for an ’HC86 gate in positive logic; negation may be shown at any two ports. = 2k 2k + 1 Logic Identity Element Even-Parity Element Odd-Parity Element The output is active (low) if all inputs stand at the same logic level (i.e., A = B). The output is active (low) if an even number of inputs (i.e., 0 or 2) are active. The output is active (high) if an odd number of inputs (i.e., only 1 of the 2) are active. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.

SN54HC86, SN74HC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCLS100E – DECEMBER 1982 – REVISED AUGUST 2003 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 3) SN54HC86 SN74HC86 UNIT MIN NOM MAX MIN NOM MAX UNIT VCC Supply voltage 2 5 6 2 5 6 V V High-level input voltage VCC = 2 V 1.5 1.5 VVIH High-level input voltage VCC = 4.5 V 3.15 3.15 VIH VCC = 6 V 4.2 4.2 V Low-level input voltage VCC = 2 V 0.5 0.5 VVIL Low-level input voltage VCC = 4.5 V 1.35 1.35 VIL VCC = 6 V 1.8 1.8 VI Input voltage 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC V t/v Input transition rise/fall time VCC = 2 V 1000 1000 ns∆t/∆v Input transition rise/fall time VCC = 4.5 V 500 500 ns VCC = 6 V 400 400 TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C SN54HC86 SN74HC86 UNITPARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX MIN MAX UNIT V V = V or V I = –20 A 2 V 1.9 1.998 1.9 1.9 VV V = V or V VVOH VI = VIH or VIL OH 6 V 5.9 5.999 5.9 5.9 VOH II H I L V V = V or V I = 20 A 2 V 0.002 0.1 0.1 0.1 VV V = V or V VVOL VI = VIH or VIL OL 6 V 0.001 0.1 0.1 0.1 VOL II H I L II VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA ICC VI = VCC or 0, IO = 0 6 V 2 40 20 µA C i 2 V to 6 V 3 10 10 10 pF

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2 V 40 100 150 125

6 V 10 17 25 21

2 V 28 75 110 95

6 V 6 13 19 16

NOTES: A. C L includes probe and test-fixture capacitance. characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. PLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms

www.ti.com 17-Dec-2015 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples 84046012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84046012A SNJ54HC 86FK 8404601CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404601CA SNJ54HC86J 8404601DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404601DA SNJ54HC86W JM38510/65202BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65202BCA M38510/65202BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65202BCA SN54HC86J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54HC86J SN74HC86D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86DT ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC86N SN74HC86NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC86N SN74HC86NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86NSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86

www.ti.com 17-Dec-2015 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples SN74HC86NSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86PW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI -40 to 85 SN74HC86PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SN74HC86PWT ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC86 SNJ54HC86FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84046012A SNJ54HC 86FK SNJ54HC86J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404601CA SNJ54HC86J SNJ54HC86W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404601DA SNJ54HC86W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

www.ti.com 17-Dec-2015 Addendum-Page 3 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54HC86, SN54HC86-SP, SN74HC86 :

  • Catalog: SN74HC86 , SN54HC86
  • Automotive: SN74HC86-Q1 , SN74HC86-Q1
  • Military: SN54HC86
  • Space: SN54HC86-SP NOTE: Qualified Version Definitions:
  • Catalog - TI's standard catalog product
  • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
  • Military - QML certified for Military and Defense Applications

www.ti.com 17-Dec-2015 Addendum-Page 4

  • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC86DR SOIC D 14 2500 367.0 367.0 38.0 SN74HC86DR SOIC D 14 2500 333.2 345.9 28.6 SN74HC86DT SOIC D 14 250 367.0 367.0 38.0 SN74HC86PWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74HC86PWT TSSOP PW 14 250 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 Pack Materials-Page 2

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