MC74HC74A_14 ONSEMI | Alldatasheet
Document overview
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Technical content
Features
- Output Drive Capability: 10 LSTTL Loads
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating V oltage Range: 2.0 to 6.0 V
- Low Input Current: 1.0 /C0109A
- High Noise Immunity Characteristic of CMOS Devices
- In Compliance with the JEDEC Standard No. 7.0 A Requirements
- Chip Complexity: 128 FETs or 32 Equivalent Gates
- NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
- These Devices are Pb−Free, Halogen Free and are RoHS Compliant RESET 1 DATA 1 CLOCK 1 SET 1 RESET 2 DATA 2 CLOCK 2 SET 2 PIN 14 = VCC PIN 7 = GND LOGIC DIAGRAM http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or /C0071= Pb−Free Package TSSOP−14 DT SUFFIX CASE 948G SOIC−14 NB D SUFFIX CASE 751A HC74AG AWLYWW HC 74A ALYW/C0071 /C0071 (Note: Microdot may be in either location) TSSOP−14 SOIC−14 NB PIN ASSIGNMENT SET 1 CLOCK 1 DATA 1 RESET 1 105 SET 2 CLOCK 2 DATA 2 RESET 2 VCC GND
http://onsemi.com FUNCTION TABLE Inputs Outputs Set Reset Clock Data Q Q LH XX HL HL XX LH L L X X H* H* HH H HL HH L LH H H L X No Change H H H X No Change H H X No Change *Both outputs will remain high as long as Set and Reset are low, but the output states are unpredictable if Set and Reset go high simultaneously. MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) –0.5 to + 7.0 V Vin DC Input Voltage (Referenced to GND) –0.5 to VCC + 0.5 V Vout DC Output Voltage (Referenced to GND) –0.5 to VCC + 0.5 V Iin DC Input Current, per Pin ±20 mA Iout DC Output Current, per Pin ±25 mA ICC DC Supply Current, VCC and GND Pins ±50 mA PD Power Dissipation in Still Air, SOIC Package† 500 450 mW Tstg Storage Temperature –65 to +150 /C0095C TL Lead Temperature, 1 mm from Case for 10 Seconds (SOIC or TSSOP Package) 260 300 /C0095C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. †Derating: SOIC Package: –7 mW/ /C0095C from 65/C0095 to 125/C0095C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC DC Supply Voltage (Referenced to GND) 2.0 6.0 V Vin, Vout DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V TA Operating Temperature, All Package Types –55 +125 /C0095C tr, tf Input Rise and Fall Time V CC = 2.0 V (Figures 1, 2, 3) V CC = 3.0 V VCC = 4.5 V VCC = 6.0 V 1000 600 500 400 ns Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance cir- cuit. For proper operation, V in and Vout should be constrained to the range GND /C0118 (Vin or Vout) /C0118 VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC). Unused outputs must be left open.
http://onsemi.com DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Symbol Parameter Test Conditions VCC V Guaranteed Limit Unit –55 to 25/C0095C /C0118 85/C0095C /C0118 125/C0095C VIH Minimum High−Level Input Voltage Vout = 0.1 V or VCC – 0.1 V |Iout| /C0118 20 /C0109A 2.0 3.0 4.5 6.0 1.5 2.1 3.15 4.2 1.5 2.1 3.15 4.2 1.5 2.1 3.15 4.2 V VIL Maximum Low−Level Input Voltage Vout = 0.1 V or VCC – 0.1 V |Iout| /C0118 20 /C0109A 2.0 3.0 4.5 6.0 0.5 0.9 1.35 1.8 0.5 0.9 1.35 1.8 0.5 0.9 1.35 1.8 V VOH Minimum High−Level Output Voltage Vin = VIH or VIL |Iout| /C0118 20 /C0109A 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V Vin = VIH or VIL |Iout| /C0118 2.4 mA |Iout| /C0118 4.0 mA |Iout| /C0118 5.2 mA 3.0 4.5 6.0 2.48 3.98 5.48 2.34 3.84 5.34 2.2 3.7 5.2 VOL Maximum Low−Level Output Voltage Vin = VIH or VIL |Iout| /C0118 20 /C0109A 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V Vin = VIH or VIL |Iout| /C0118 2.4 mA |Iout| /C0118 4.0 mA |Iout| /C0118 5.2 mA 3.0 4.5 6.0 0.26 0.26 0.26 0.33 0.33 0.33 0.4 0.4 0.4 Iin Maximum Input Leakage Current Vin = VCC or GND 6.0 ±0.1 ±1.0 ±1.0 /C0109A ICC Maximum Quiescent Supply Current (per Package) Vin = VCC or GND Iout = 0 /C0109A 6.0 2.0 20 80 /C0109A AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns) Symbol Parameter VCC V Guaranteed Limit Unit – 55 to 25/C0095C /C0118 85/C0095C /C0118 125/C0095C fmax Maximum Clock Frequency (50% Duty Cycle) (Figures 1 and 4) 2.0 3.0 4.5 6.0 6.0 4.8 4.0 8.0 MHz tPLH, tPHL Maximum Propagation Delay, Clock to Q or Q (Figures 1 and 4) 2.0 3.0 4.5 6.0 100 125 150 120 ns tPLH, tPHL Maximum Propagation Delay, Set or Reset to Q or Q (Figures 2 and 4) 2.0 3.0 4.5 6.0 105 130 160 130 ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 1 and 4) 2.0 3.0 4.5 6.0 110 ns Cin Maximum Input Capacitance — 10 10 10 pF CPD Power Dissipation Capacitance (Per Flip−Flop)* Typical @ 25°C, VCC = 5.0 V pF32 * Used to determine the no−load dynamic power consumption: P D = CPD VCC2f + ICC VCC.
http://onsemi.com TIMING REQUIREMENTS (Input tr = tf = 6.0 ns) Symbol Parameter VCC V Guaranteed Limit Unit –55 to 25/C0095C /C0118 85/C0095C /C0118 125/C0095C tsu Minimum Setup Time, Data to Clock (Figure 3) 2.0 3.0 4.5 6.0 100 120 ns th Minimum Hold Time, Clock to Data (Figure 3) 2.0 3.0 4.5 6.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 ns trec Minimum Recovery Time, Set or Reset Inactive to Clock (Figure 2) 2.0 3.0 4.5 6.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 ns tw Minimum Pulse Width, Clock (Figure 1) 2.0 3.0 4.5 6.0 ns tw Minimum Pulse Width, Set or Reset (Figure 2) 2.0 3.0 4.5 6.0 ns tr, tf Maximum Input Rise and Fall Times (Figures 1, 2, 3) 2.0 3.0 4.5 6.0 1000 800 500 400 1000 800 500 400 1000 800 500 400 ns Device Package Shipping† MC74HC74ADG SOIC−14 NB (Pb−Free)
55 Units / Rail
NLV74HC74ADG* SOIC−14 NB (Pb−Free) MC74HC74ADR2G SOIC−14 NB (Pb−Free) 2500 / Tape & Reel NLV74HC74ADR2G* SOIC−14 NB (Pb−Free) 2500 / Tape & Reel MC74HC74ADTR2G TSSOP−14 (Pb−Free) 2500 / Tape & Reel NLV74HC74ADTR2G* TSSOP−14 (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
http://onsemi.com PACKAGE DIMENSIONS TSSOP−14 CASE 948G ISSUE B DIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0 8 0 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. /C0095/C0095/C0095/C0095 SU0.15 (0.006) T 2X L/2 SUM0.10 (0.004) V ST L −U− SEATING PLANE 0.10 (0.004) −T− ÇÇÇ ÇÇÇ SECTION N−N DETAIL E J J1 K ÉÉÉ ÉÉÉ DETAIL E F M −W− 0.25 (0.010) 814 PIN 1 IDENT. HG A D C B SU0.15 (0.006) T −V− 14X REFK N N 7.06 14X 0.36 14X 1.26 0.65 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT
http://onsemi.com PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. H 14 8 M0.25 B M C h X 45 SEATING PLANE A M /C0095 SAM0.25 B SC b13X B A E D e DETAIL A L DETAIL A DIM MIN MAX MIN MAX INCHESMILLIMETERS D 8.55 8.75 0.337 0.344 E 3.80 4.00 0.150 0.157 A 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 L 0.40 1.25 0.016 0.049 e 1.27 BSC 0.050 BSC A3 0.19 0.25 0.008 0.010 A1 0.10 0.25 0.004 0.010 M 0 7 0 7 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 /C0095/C0095/C0095/C0095 6.50 14X 0.58 14X 1.18 1.27 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 MC74HC74A/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidia ries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.