HC646

MM74HC646 NSC | Alldatasheet

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Y Typical propagation delay: 14 ns Y TRI-STATE outputs Y Bidirectional communication Y Wide power supply range: 2–6V Y Low quiescent supply current: 160 mA maximum (74HC) Y High output current: 6 mA (74HC) Connection Diagram Dual-In-Line Package TL/F/5345–2 Order Number MM54HC646/648 or MM74HC646/648 TL/F/5345–1 Real-Time Transfer Bus B to Bus A Real-Time Transfer Bus A to Bus B Storage from A, B, or A and B Transfer Stored Data t oAo rB TRI-STATEÉ is a registered trademark of National Semiconductor Corp. C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Notes1&2 ) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (V CC) b0.5 to a7.0V DC Input Voltage (V IN) b1.5 to V CCa1.5V DC Output Voltage (V OUT) b0.5 to V CCa0.5V Clamp Diode Current (I IK,I OK) g20 mA DC Output Current, per pin (I OUT) g35 mA DC V CC or GND Current, per pin (I CC) g70 mA Storage Temperature Range (T STG) b65§Ct o a150§C Power Dissipation (P D) (Note 3) 600 mW S.O. Package only 500 mW Lead Temp. (T L) (Soldering 10 seconds) 260 §C Operating Conditions Min Max Units Supply Voltage (V CC)2 6 V DC Input or Output Voltage 0 V CC V (VIN,V OUT) Operating Temp. Range (T A) MM74HC b40 a85 §C MM54HC b55 a125 §C Input Rise or Fall Times VCCe2.0V(tr,t f) 1000 ns VCCe4.5V 500 ns VCCe6.0V 400 ns TAe25§C 74HC 54HC Symbol Parameter Conditions V CC TAeb40 to 85 §CT Aeb55 to 125 §C Units Typ Guaranteed Limits VIH Minimum High Level 2.0V 1.5 1.5 1.5 V Input Voltage 4.5V 3.15 3.15 3.15 V 6.0V 4.2 4.2 4.2 V VIL Maximum Low Level 2.0V 0.5 0.5 0.5 V Input Voltage 4.5V 1.35 1.35 1.35 V 6.0V 1.8 1.8 1.8 V VOH Minimum High Level V INeVIH or V IL VINeVIH or V IL VOL Maximum Low Level V INeVIH or V IL Output Voltage lIOUTls20 mA 2.0V 0 0.1 0.1 0.1 V 4.5V 0 0.1 0.1 0.1 V 6.0V 0 0.1 0.1 0.1 V VINeVIH or V IL IIN Maximum Input Current V INeVCC or GND 6.0V g0.1 g1.0 g1.0 mA IOZ Maximum TRI-STATE V OUTeVCC or GND 6.0V g0.5 g5.0 g10 mA Output Leakage G eVIH ICC Maximum Quiescent V INeVCC or GND 6.0V 8.0 80 160 mA Supply Current I OUTe0 mA Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b12 mW/ §C from 65 §Ct o8 5 §C; ceramic ‘‘J’’ package: b12 mW/ §C from 100 §Ct o1 2 5 §C. Note 4: For a power supply of 5V g10% the worst case output voltages (V OH, and V OL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. VIL limits are currently tested at 20% of V CC. The above V IL specification (30% of V CC) will be implemented no later than Q1, CY’89. Truth Table Inputs Data I/O Operation or Function G DIR CAB CBA SAB SBA A1 Thru A8 B1 Thru B8 ’ALS646, ’ALS647 ’ALS648, ’ALS649 ’AS646 ’AS648 XX u X X X Input Not Specified Store A, B Unspecified Store A, B Unspecified XX X u X X Not Specified Input Store B, A Unspecified Store B, A Unspecified HX uu XX Input Input Store A and B Data Store A and B Data H X H or L H or L X X Isolation, hold storage Isolation, hold storage

Truth Table (Continued) Inputs Data I/O Operation or Function G DIR CAB CBA SAB SBA A1 Thru A8 B1 Thru B8 ’ALS646, ’ALS647 ’ALS648, ’ALS649 ’AS646 ’AS648 LL X X X L Output Input Real-Time B Data to A Bus Real-Time B Data to A Bus L L X X X H Stored B Data to A Bus Stored B Data to A Bus LH X X L X Input Output Real-Time A Data to B Bus Real-Time A Data to B Bus L H X X H X Stored A Data to B Bus Stored A Data to B Bus H e High Level L e Low Level X e Irrelevant u e low-to-high level transition The data output functions i.e., data at the bus pins may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled. The data output functions i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs. VCCe5V, T Ae25§C, t retfe6n s Symbol Parameter Conditions Typ Guaranteed UnitsLimit fMAX Maximum Operating 45 30 MHz Frequency tPHL,t PLH Maximum Propagation C Le45 pF 14 25 ns Delay, A or B Input to B or A Output tPHL,t PLH Maximum Propagation C Le45 pF 31 40 ns Delay, CBA or CAB Input to A or B Output tPHL,t PLH Maximum Propagation C Le45 pF 35 50 ns Delay, SBA or SAB Input to A or B Output, with A or B high tPHL,t PLH Maximum Propagation C Le45 pF 35 50 ns Delay, SBA or SAB Input to A or B Output, with A or B low tPZH,t PZL Maximum Enable R Le1k X 18 33 ns Time G or DIR Input to C Le45 pF A or B Output tPHZ,t PLZ Maximum Disable R Le1k X 17 30 ns Time, G or DIR Input to C Le5p F A or B Output VCCe2.0–6.0V, C Le50 pF, t retfe6 ns (unless otherwise specified) TAe25§C 74HC 54HC Symbol Parameter Conditions V CC TAeb40 to 85 §CT Aeb55 to 125 §C Units Typ Guaranteed Limits fMAX Maximum Operating C Le50 pF 2.0V 5 4 3 MHz Frequency 4.5V 27 21 18 MHz 6.0V 31 24 20 MHz tPHL,t PLH Maximum Propagation C Le50 pF 2.0V 60 180 189 225 ns Delay, A or B Input C Le150 pF 2.0V 80 200 250 300 ns to B or A Output CLe50 pF 4.5V 21 30 37 45 ns CLe150 pF 4.5V 30 40 50 60 ns CLe50 pF 6.0V 18 26 31 39 ns CLe150 pF 6.0V 22 35 44 53 ns tPHL,t PLH Maximum Propagation C Le50 pF 2.0V 110 220 275 330 ns Delay, CBA or CAB C Le150 pF 2.0V 150 270 338 405 ns Input to A or B Output CLe50 pF 4.5V 31 44 55 66 ns CLe150 pF 4.5V 40 54 68 81 ns CLe50 pF 6.0V 28 38 47 57 ns CLe150 pF 6.0V 34 47 59 71 ns

VCCe2.0b6.0V, C Le50 pF, t retfe6 ns (unless otherwise specified) TAe25§C 74HC 54HC Symbol Parameter Conditions V CC TAeb40 to 85 §CT Aeb55 to 125 §C Units Typ Guaranteed Limits tPHL,t PLH Maximum Propagation C Le50 pF 2.0V 85 170 214 253 ns Delay, SBA or SAB C Le150 pF 2.0V 110 220 277 328 ns Input to A or B Output CLe50 pF 4.5V 17 34 43 51 ns CLe150 pF 4.5V 22 44 55 66 ns CLe50 pF 6.0V 14 29 36 43 ns CLe150 pF 6.0V 19 37 47 56 ns tPZL,t PZL Maximum Output Enable R Le1k X Time, G Input or DIR to A or B CLe50 pF 2.0V 80 175 219 263 nsOutput CLe150 pF 2.0V 120 225 281 338 ns CLe50 pF 4.5V 23 35 44 53 ns CLe150 pF 4.5V 31 45 56 68 ns CLe50 pF 6.0V 21 30 37 45 ns CLe150 pF 6.0V 27 38 48 57 ns tPHZ,t PLZ Maximum Output Disable R Le1k X 2.0V 85 175 219 263 ns Time, G Input to A or B C Le50 pF 4.5V 23 35 44 53 ns Output 6.0V 21 30 37 45 ns tTHL,t TLH Maximum Output Rise 2.0V 60 75 90 ns and Fall Time C Le50 pF 4.5V 12 15 18 ns 6.0V 10 13 15 ns tS Minimum Set Up Time 2.0V 100 125 150 ns 4.5V 20 25 30 ns 6.0V 17 21 25 ns tH Minimum Hold Time 2.0V 0 0 0 ns 4.5V 0 0 0 ns 6.0V 0 0 0 ns tW Minimum Pulse Width 2.0V 80 100 120 ns of Clock 4.5V 16 20 24 ns 6.0V 14 18 21 ns tr,t f Maximum Input Rise and 2.0V 1000 1000 1000 ns Fall Time 4.5V 500 500 500 ns 6.0V 400 400 400 ns CPD Power Dissipation 90 pF Capacitance (Note 5) CIN Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Output 15 20 20 20 pF Capacitance Note 5: CPD determines the no load dynamic power consumption, P DeCPD,V CC2 faICC, and the no load dynamic current consumption, I SeCPD VCC faICC. Note 6: Refer to back of this section for Typical MM54/74HC AC Switching Waveforms and Test Circuits.

TL/F/5345–3

MM54HC646/MM74HC646 Non-Inverting Octal Bus Transceiver/Registers MM54HC648/MM74HC648 Inverting Octal Bus Transceiver/Registers Physical Dimensions inches, (millimeters) Order Number MM54HC646J, MM54HC648J, MM74HC646J, or MM74HC648J Order Number MM74HC646N, MM74HC648N NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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