HC541A

MC74HC541A_14 ONSEMI | Alldatasheet

Document overview

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Technical content

Features

• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating V oltage Range: 2.0 to 6.0 V
• Low Input Current: 1 /C0109A
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7 A Requirements
• Chip Complexity: 134 FETs or 33.5 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant

18 Y12A1

17 Y23A2

16 Y34A3

15 Y45A4

14 Y56A5

13 Y67A6

12 Y78A7

11 Y89A8

PIN 20 = VCC PIN 10 = GND Figure 1. Logic Diagram dimensions section on page 5 of this data sheet.

ORDERING INFORMATION

A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or /C0071= Pb−Free Package (Note: Microdot may be in either location) L L H X L L X H L H X X Inputs Output Y OE1 OE2 A L H Z Z X = Don’t Care Z = High Impedance FUNCTION TABLE SOIC−20 DW SUFFIX CASE 751D TSSOP−20 DT SUFFIX CASE 948E PIN ASSIGNMENT 1920 18 17 16 15 14 21 34567 VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND

http://onsemi.com MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage −0.5 to +7.0 V VI DC Input Voltage −0.5 ≤ VI ≤ VCC + 0.5 V VO DC Output Voltage (Note 1) −0.5 ≤ VO ≤ VCC + 0.5 V IIK DC Input Diode Current ±20 mA IOK DC Output Diode Current ±35 mA IO DC Output Sink Current ±35 mA ICC DC Supply Current per Supply Pin ±75 mA IGND DC Ground Current per Ground Pin ±75 mA TSTG Storage Temperature Range −65 to +150 /C0095C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 /C0095C TJ Junction Temperature under Bias +150 /C0095C /C0113JA Thermal Resistance SOIC TSSOP 128 /C0095C/W PD Power Dissipation in Still Air at 85/C0095C SOIC TSSOP 500 450 mW MSL Moisture Sensitivity Level 1 FR Flammability Rating Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in VESD ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) > 4000 > 300 > 1000 V ILatchup Latchup Performance Above V CC and Below GND at 85/C0095C (Note 5) ±300 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. I O absolute maximum rating must be observed. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC DC Supply Voltage (Referenced to GND) 2.0 6.0 V VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V TA Operating Temperature Range, All Package Types −55 +125 /C0095C tr, tf Input Rise/Fall Time V CC = 2.0 V (Figure 2) V CC = 4.5 V VCC = 6.0 V 1000 500 400 ns Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.

http://onsemi.com DC CHARACTERISTICS (Voltages Referenced to GND) Guaranteed Limit Symbol Parameter Condition VCC V −55 to 25/C0095C ≤85/C0095C ≤125/C0095C Unit VIH Minimum High−Level Input Voltage VOUT = 0.1 V |IOUT| ≤ 20 /C0109A 2.0 3.0 4.5 6.0 1.50 2.10 3.15 4.20 1.50 2.10 3.15 4.20 1.50 2.10 3.15 4.20 V VIL Maximum Low−Level Input Voltage VOUT = VCC − 0.1 V |IOUT| ≤ 20 /C0109A 2.0 3.0 4.5 6.0 0.50 0.90 1.35 1.80 0.50 0.90 1.35 1.80 0.50 0.90 1.35 1.80 V VOH Minimum High−Level Output Voltage VIN = VIL |IOUT| ≤ 20 /C0109A 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V VIN = VIL |IOUT| ≤ 3.6 mA |IOUT| ≤ 6.0 mA |IOUT| ≤ 7.8 mA 3.0 4.5 6.0 2.48 3.98 5.48 2.34 3.84 5.34 2.20 3.70 5.20 VOL Maximum Low−Level Output Voltage VIN = VIH |IOUT| ≤ 20 /C0109A 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V VIN = VIH |IOUT| ≤ 3.6 mA |IOUT| ≤ 6.0 mA |IOUT| ≤ 7.8 mA 3.0 4.5 6.0 0.26 0.26 0.26 0.33 0.33 0.33 0.40 0.40 0.40 IIN Maximum Input Leakage Current VIN = VCC or GND 6.0 ±0.1 ±1.0 ±1.0 /C0109A IOZ Maximum 3−State Leakage Current Output in High Impedance State VIN = VIL or VIH VOUT = VCC or GND ICC Maximum Quiescent Supply Current (per Package) VIN = VCC or GND IOUT = 0 /C0109A 6.0 4 40 160 /C0109A AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns) Guaranteed Limit Symbol Parameter VCC V −55 to 25/C0095C ≤85/C0095C ≤125/C0095C Unit tPLH, tPHL Maximum Propagation Delay, Input A to Output Y (Figures 2 and 4) 2.0 3.0 4.5 6.0 100 120 ns tPLZ, tPHZ Maximum Propagation Delay, Output Enable to Output Y (Figures 3 and 5) 2.0 3.0 4.5 6.0 110 140 165 ns tPZL, tPZH Maximum Propagation Delay, Output Enable to Output Y (Figures 3 and 5) 2.0 3.0 4.5 6.0 110 140 165 ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 2 and 4) 2.0 3.0 4.5 6.0 ns CIN Maximum Input Capacitance 10 10 10 pF COUT Maximum 3−State Output Capacitance (High Impedance State Output) 15 15 15 pF Typical @ 25°C, VCC = 5.0 V, VEE = 0 V CPD Power Dissipation Capacitance (Per Buffer) (Note 7) 35 pF 7. Used to determine the no−load dynamic power consumption: P D = CPD VCC2f + ICC VCC.

http://onsemi.com PIN DESCRIPTIONS INPUTS Data input pins. Data on these pins appear in non−inverted form on the corresponding Y outputs, when the outputs are enabled. CONTROLS OE1, OE2 (PINS 1, 19) Output enables (active−low). When a low voltage is applied to both of these pins, the outputs are enabled and the device functions as an non−inverting buffer. When a high voltage is applied to either input, the outputs assume the high impedance state. OUTPUTS Y1, Y2, Y3, Y4, Y5, Y6, Y7, Y8 (PINS 18, 17, 16, 15, 14, 13, 12, 11) Device outputs. Depending upon the state of the output enable pins, these outputs are either non−inverting outputs or high−impedance outputs. VCC To 7 Other Buffers Figure 6. Logic Detail Device Package Shipping† MC74HC541ADWG SOIC−20 WIDE (Pb−Free)

38 Units / Rail

MC74HC541ADWR2G SOIC−20 WIDE (Pb−Free)

1000 Tape & Reel

NLV74HC541ADWR2G* SOIC−20 WIDE (Pb−Free) MC74HC541ADTG TSSOP−20 (Pb−Free)

75 Units / Rail

MC74HC541ADTR2G TSSOP−20 (Pb−Free)

2500 Tape & Reel

NLV74HC541ADTR2G* TSSOP−20 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.

http://onsemi.com PACKAGE DIMENSIONS TSSOP−20 DT SUFFIX CASE 948E−02 ISSUE C DIM A MIN MAX MIN MAX INCHES 6.60 0.260 MILLIMETERS B 4.30 4.50 0.169 0.177 C 1.20 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.27 0.37 0.011 0.015 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0 8 0 8 /C0095/C0095/C0095/C0095 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ 11 0 1120 PIN 1 IDENT A B −T− 0.100 (0.004) C D G H SECTION N−N K JJ 1 N N M F −W− SEATING PLANE −V− −U− SUM0.10 (0.004) V ST 20X REFK L L/22X SU0.15 (0.006) T DETAIL E 0.25 (0.010) DETAIL E 6.40 0.252 --- --- SU0.15 (0.006) T 7.06 16X 0.36 16X 1.26 0.65 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

http://onsemi.com PACKAGE DIMENSIONS SOIC−20 DW SUFFIX CASE 751D−05 ISSUE G B20X H10X C L 18X A1 A SEATING PLANE /C0113 h X 45/C0095 E D M0.25 MB M0.25 SA SBT e T B A DIM MIN MAX MILLIMETERS A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 12.65 12.95 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 /C0113 0 7 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. /C0095/C0095 ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidia ries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 MC74HC541A/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative