HC-5509A1 INTERSIL | Alldatasheet
Document overview
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Technical content
Features
- DI Monolithic High Voltage Process
- Compatible with Worldwide PBX and CO Performance Requirements
- Controlled Supply of Battery Feed Current with Programmable Current Limit
- Operates with 5V Positive Supply (V B+)
- Internal Ring Relay Driver and a Utility Relay Driver
- High Impedance Mode for Subscriber Loop
- High Temperature Alarm Output
- Low Power Consumption During Standby Functions
- Switch Hook, Ground Key, and Ring Trip Detection
- Selective Power Denial to Subscriber
- Voice Path Active During Power Denial
- On Chip Op-Amp for 2 Wire Impedance Matching
Applications
- Solid State Line Interface Circuit for PBX or Central Office Systems, Digital Loop Carrier Systems
- Hotel/Motel Switching Systems
- Direct Inward Dialing (DID) Trunks
- Voice Messaging PBX’s
- High Voltage 2W/4W, 4W/2W Hybrid
Ordering Information
PART NUMBER TEMP. RANGE PACKAGE HC1-5509A1-5 0 o to +75oC 28 Lead Ceramic DIP HC1-5509A1-9 -40 o to +85oC 28 Lead Ceramic DIP HC3-5509A1-5 0 o to +75oC 28 Lead Plastic DIP HC3-5509A1-9 -40 o to +85oC 28 Lead Plastic DIP HC4P5509A1-5 0 o to +75oC 44 Lead PLCC HC4P5509A1-9 -40 o to +85oC 44 Lead PLCC HC9P5509A1-5 0 o to +75oC 28 Lead SOIC PRELIMINARY May 1997 Pinouts HC-5509A1 (PDIP, CDIP, SOIC) TOP VIEW RF TF VFB VTX LAO VRX RFS RING VB- BG PR RD PRI VB+ AG RS ILMT OUT 1 -IN 1 TIP SHD GKD TST ALM TRUTH TABLE F1 F0 ACTION 0 0 Normal Loop Feed
01 R D Active
HC-5509A1 (PLCC) TOP VIEW N/C ALM N/C N/C RS SHD N/C VB+ AG VB- RF2 RF1 TF1 X GKD ILMT OUT 1 -IN 1 TIP RING RFS VRX N/C 1234564 0 41424344 18 19 20 21 22 23 24 25 26 27 28 TF2 VFB RD DG VTX LAO N/C N/C BG PR PRITST N/C N/C N/C N/C N/C N/C HC-5509A1 SLIC Subscriber Line Interface Circuit File Number 3567.1 NOT RECOMMENDED FOR NEW DESIGNS See HC5509A1R3060 or contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc
Absolute Maximum Ratings (Note 1) Operating Conditions Maximum Supply Voltages Operating Temperature Range CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not i mplied. Electrical Specifications Unless Otherwise Specified, Typical Parameters are at T A = +25oC, Min-Max Parameters are over Operating Temperature Range, VB- = -48V, VB+ = +5V, AG = DG = BG = 0V. All A.C. Parameters are specified at 600Ω 2-Wire terminating impedance. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS A.C. TRANSMISSION PARAMETERS RX Input Impedance 300Hz to 3.4kHz (Note 3) - 100 - k Ω TX Output Impedance 300Hz to 3.4kHz (Note 3) - - 20 Ω 4W Input Overload Level 300Hz to 3.4kHz R L = 1200Ω, 600Ω Reference +1.5 - - V PEAK 2W Return Loss Matched for 600 Ω (Note 3) SRL LO 26 35 - dB ERL 30 40 - dB SRL HI 30 40 - dB 2W Longitudinal to Metallic Balance Off Hook Per ANSI/IEEE STD 455-1976 (Note 3) 300Hz to 3400Hz 58 63 - dB 4W Longitudinal Balance Off Hook 300Hz to 3400Hz (Note 3) 50 55 - dB Low Frequency Longitudinal Balance R.E.A. Test Circuit - - -67 dBmp ILINE = 40mA TA = +25oC (Note 3) - - 23 dBrnC Longitudinal Current Capability I LINE = 40mA TA = +25oC (Note 3) - - 30 mArms Insertion Loss 0dBm at 1kHz, Referenced 600 Ω 4W/4W -- ±0.12 dB Frequency Response 300Hz to 3400Hz (Note 3) Referenced to Absolute Level at 1kHz, 0dBm Referenced 600Ω - ±0.02 ±0.05 dB Level Linearity Referenced to -10dBm (Note 3) 2W to 4W and 4W to 2W +3 to -40dBm - - ±0.05 dB -40 to -50dBm - - ±0.1 dB -50 to -55dBm - - ±0.3 dB Absolute Delay (Note 3)
2W/4W 300Hz to 3400Hz - - 1 µs 4W/2W 300Hz to 3400Hz - - 1 µs 4W/4W 300Hz to 3400Hz - - 1.5 µs Transhybrid Loss, THL (Note 3) See Figure 1 - 40 - dB Total Harmonic Distortion 2W/4W, 4W/2W, 4W/4W Reference Level 0dBm at 600Ω 300Hz to 3400Hz (Note 3) -- - 5 2 d B Idle Channel Noise (Note 3) 2W and 4W C-Message - - 5 dBrnC Psophometric - - -85 dBmp 3kHz Flat - - 15 dBrn Power Supply Rejection Ratio (Note 3) 30Hz to 200Hz, R L = 600Ω VB+ to 2W 20 29 - dB VB+ to 4W 20 29 - dB VB- to 2W 20 29 - dB VB- to 4W 20 29 - dB VB+ to 4W (Note 3) 200Hz to 16kHz, RL = 600Ω 30 - - dB VB- to 2W 30 - - dB VB- to 4W 20 25 - dB VB- to 4W 20 25 - dB Ring Sync Pulse Width 50 - 500 µs D.C. PARAMETERS Loop Current Programming Limit Range 20 40 60 mA Accuracy 10 - - % Loop Current During Power Denial R L = 200Ω - ±3 ±5m A Fault Currents TIP to Ground -3 0- m A RING to Ground -6 0- m A TIP and RING to Ground - 90 - mA Switch Hook Detection Threshold - 12 15 mA Ground Key Detection Threshold 8 12 16 mA Thermal ALARM Output Safe Operating Die Temperature Exceeded 140 - 160 oC Ring Trip Comparator Threshold See Typical Applications for more informa- tion 9.5 13.5 17.5 mA Dial Pulse Distortion -0 . 1 0 . 5 m s Electrical Specifications Unless Otherwise Specified, Typical Parameters are at T A = +25oC, Min-Max Parameters are over Operating Temperature Range, VB- = -48V, VB+ = +5V, AG = DG = BG = 0V. All A.C. Parameters are specified at 600Ω 2-Wire terminating impedance. (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
On Voltage VOL IOL (PR) = 60mA, IOL (RD) = 30mA - 0.2 0.5 V Off Leakage Current V OH = 13.2V - ±10 ±100 µA TTL/CMOS Logic Inputs (F0, F1, RS, TEST , PRI) Logic ‘0’ VIL -- 0 . 8 V Logic ‘1’ VIH 2.0 - 5.5 V Input Current (F0, F1, RS, TEST , PRI) 0V ≤ VIN ≤ 5V - - ±100 µA Logic Outputs Logic ‘0’ VOL ILOAD = 800µA- 0 . 1 0 . 5 V Logic ‘1’ VOH ILOAD = 40µA2 . 7 - - V Power Dissipation On Hook Relay Drivers Off - 200 - mW I B+ VB+ = +5.25V, VB- = -58V, RLOOP = ∞ --6 m A IB- VB+ = +5.25V, VB- = -58V, RLOOP = ∞ -6 - - mA UNCOMMITED OP AMP PARAMETERS Input Offset Voltage - ±5- m V Input Offset Current - ±10 - nA Differential Input Resistance (Note 2) - 1 - M Ω Output Voltage Swing R L = 10kΩ - ±3-V P-P Small Signal GBW (Note 2) - 1 - MHz NOTES: 1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be imp aired. Func- tional operability under any of these conditions is not necessarily implied. 2. May Be Extended to 1900 Ω With Application Circuit. 3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and spec- ification compliance. Pin Descriptions DIP/SOIC PLCC SYMBOL DESCRIPTION 1 2 AG Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output and receive input terminals. 2 3 VB+ Positive Voltage Source - Most Positive Supply. 3 4 C1 Capacitor #C1 - An external capacitor to be connected between this terminal and analog ground. Required for proper operation of the loop current limiting function. 4 8 F1 Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to externally select logic functions. The three selectable functions are mutually exclusive. See Truth Table on page1. F1 should be toggled high after power is applied. Electrical Specifications Unless Otherwise Specified, Typical Parameters are at T A = +25oC, Min-Max Parameters are over Operating Temperature Range, VB- = -48V, VB+ = +5V, AG = DG = BG = 0V. All A.C. Parameters are specified at 600Ω 2-Wire terminating impedance. (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
5 9 F0 Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to externally select logic functions. The three selectable functions are mutually exclusive. See Truth Table on page 1. 6 10 RS Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a positive pulse (50 - 500µs) occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected systems, on the positive going zero crossing. This en- sures that the ring delay activates and deactivates when the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to +5. 71 1 S H D Switch Hook Detection - An active low LS TTL compatible logic output. A line supervisory output. 81 2 G K D Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output. 91 3 T S T A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until the proper F1, F0 state is set and will keep ALM low. See Truth Table on page 1. 10 14 ALM A LS TTL compatible active low output which responds to the thermal detector circuit when a safe operating die temperature has been exceeded. When TST is forced low by an external control signal, ALM is latched low until the proper F1, F0 state and TST input is brought high. The ALM can be tied directly to the TST pin to power down the part when a thermal fault is detected and then reset with F0, F1. See Truth Table on page 1. It is possible to ignore transient thermal over- load conditions in the SLIC by delaying the response to the TST pin from the ALM. Care must be exercised in attempting this as continued thermal overstress may reduced component life. 11 18 ILMT Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a re- sistive voltage divider. 12 19 OUT1 The analog output of the spare operational amplifier. 13 20 -IN1 The inverting analog input of the spare operational amplifier. 14 22 TIP An analog input connected to the TIP (more positive) side of the subscriber loop through a feed resistor and ring relay contact. Functions with the RING terminal to receive voice signals from the telephone and for loop monitoring purpose. 15 24 RING An analog input connected to the RING (more negative) side of the subscriber loop through a feed resistor. Functions with the TIP terminal to receive voice signals from the telephone and for loop monitoring purposes. 16 25 RFS Ring Feed Sense - Senses RING side of the loop for Ground Key Detection. During Ring injected ringing the ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing, the RF and RFS pins must be shorted. 17 27 VRX Receive Input, Four Wire Side - A high impedance analog input. AC signals appearing at this in- put drive the Tip Feed and Ring Feed amplifiers differentially. 18 31 LAO Longitudinal Amplifier Output - A low impedance output to be connected to C2 through a low pass filter. Output is proportional to the difference in I TIP and IRING. 19 32 VTX Transmit Output, Four Wire Side - A low impedance analog output which represents the differ- ential voltage across TIP and RING. Transhybrid balancing must be performed beyond this out- put to completely implement two to four wire conversion. This output is referenced to analog ground. Since the D.C. level of this output varies with loop current, capacitive coupling to the next stage is necessary. 20 33 PRI A TTL compatible input used to control PR . PRI active High = PR active low. 21 34 PR An active low open collector output. Can be used to drive a Polarity Reversal Relay. NA 35 DG Digital Ground - To be connected to zero potential - serves as reference for all digital inputs and outputs on the SLIC. 22 36 BG Battery Ground - Tube connected to zero potential. All loop current and some quiescent current flows into this terminal. Pin Descriptions (Continued) DIP/SOIC PLCC SYMBOL DESCRIPTION
23 37 RD Ring Relay Driver - An active low open collector output. Used to drive a relay that switches ring- ing signals onto the 2-Wire line. 24 38 VFB Feedback input to the tip feed amplifier; may be used in conjunction with transmit output signal and the spare op-amp to accommodate 2W line impedance matching. 25 39 TF2 Tip Feed - A low impedance analog output connected to the TIP terminal through a feed resistor. Functions with the RF terminal to provide loop current, and to feed voice signals to the telephone set and to sink longitudinal currents. Must be tied to TF1. NA 40 TF1 Tie directly to TF2 in the PLCC application. 26 41 RF1 Ring Feed - A low impedance analog output connected to the RING terminal through a feed re- sistor. Functions with the TF terminal to provide loop current, feed voice signals to the telephone set, and to sink longitudinal currents. Tie directly to RF2. NA 42 RF2 Tie directly to RF1 in the PLCC application. 27 43 VB- The battery voltage source. The most negative supply. 28 44 C2 Capacitor #2 - An external capacitor to be connected between this terminal and ground. It pre- vents false ring trip detection from occurring when longitudinal currents are induced onto the sub- scriber loop from power lines and other noise sources. This capacitor should be nonpolarized. 1, 5, 6, 7, 15, 16, 17, 21, 23, 26, 28, 29, 30 NC No internal connection. NOTE: 1. All grounds (AG, BG, DG) must be applied before V B+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. Pin Descriptions (Continued) DIP/SOIC PLCC SYMBOL DESCRIPTION
R VRX OUT 1 R/2 TA 90k LA 25k 25k 17 12 RF1 SHD FAULT DET OP AMP VFB VTX RTD GKD GM 28 11 RF2 VB REF VB/2 -IN 1 13 24 19 THERM LTD C2LAO ILMT Die Characteristics Thermal Constants ( oC/W) θJA θJC Overvoltage Protection and Longitudinal Current Protection The SLIC device, in conjunction with an external protection bridge, w ill withst and high voltage lightning surges and power line crosses. High voltage surge conditions are as specified in Table 1. The SLIC will withstand longitudinal currents up to a maxi- mum or 30mArms, 15mArms per leg, without any perfor- mance degradation TABLE 1. PARAMETER TEST CONDITION PERFORMANCE (MAX) UNITS Longitudinal Surge 10µs Rise/ ±1000 (Plastic) V PEAK 1000µs Fall ±500 (Ceramic) V PEAK Metallic Surge 10 µs Rise/ ±1000 (Plastic) V PEAK 1000µs Fall ±500 (Ceramic) V PEAK T/GND 10 µs Rise/ ±1000 (Plastic) V PEAK R/GND 1000 µs Fall ±500 (Ceramic) V PEAK 50/60Hz Current T/GND 11 Cycles 700 (Plastic) V RMS R/GND Limited to 10Arms 350 (Ceramic) V RMS
Functional Diagram (Continued) PLCC R VRX OUT 1 R/2 TA 90k LA 25k 25k 27 19 RF1 SHD FAULT DET OP AMP+ VFB VTX RTD GKD GM 44 18 RF2 VB REF VB/2 20 38 32 THERM LTD -IN 1 C1 C2LAO ILMT
T WN CH KEY A B C INJ A B C RELAY DRIVER NOTE: PRI is an independent switch driven by TTL input lev-
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC ***Not Present on DIP or SOIC packages.
- All grounds (AG, BG, & DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
- Application shows Ring Injected Ringing, a Balanced or Tip injected configuration may be used.