CD54HC190 TI | Alldatasheet
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Technical content
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C00682-V to 6-V VCC Operation (’HC190, 191) /C00684.5-V to 5.5-V VCC Operation (’HCT191) /C0068Wide Operating Temperature Range of −55°C to 125°C /C0068Synchronous Counting and Asynchronous Loading /C0068Two Outputs for n-Bit Cascading /C0068Look-Ahead Carry for High-Speed Counting /C0068Balanced Propagation Delays and Transition Times /C0068Standard Outputs Drive Up To 15 LS-TTL Loads /C0068Significant Power Reduction Compared to LS-TTL Logic ICs description/ordering information The CD54/74HC190 are asynchronously presettable BCD decade counters, whereas the CD54/74HC191 and CD54/74HCT191 are asynchronously presettable binary counters. Presetting the counter to the number on preset data inputs (A−D) is accomplished by a low asynchronous parallel load (LOAD) input. Counting occurs when LOAD is high, count enable (CTEN) is low, and the down/up (D/U) input is either high for down counting or low for up counting. The counter is decremented or incremented synchronously with the low-to-high transition of the clock.
ORDERING INFORMATION
TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING CD74HC190E CD74HC190E PDIP − E Tube of 25 CD74HC191E CD74HC191EPDIP − E Tube of 25 CD74HCT191E CD74HCT191E Tube of 40 CD74HC191M SOIC − M Reel of 2500 CD74HC191M96 HC191M SOIC − M Reel of 250 CD74HC191MT HC191M −55°C to 125°C Tube of 40 CD74HCT191M HCT191M −55°C to 125°C SOP − NS Reel of 2000 CD74HC190NSR HC190M Tube of 90 CD74HC190PW TSSOP − PW Reel of 2000 CD74HC190PWR HJ190TSSOP − PW Reel of 250 CD74HC190PWT HJ190 CD54HC190F3A CD54HC190F3A CDIP − F Tube of 25 CD54HC191F3A CD54HC191F3ACDIP − F Tube of 25 CD54HCT191F3A CD54HCT191F3A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2003, Texas Instruments Incorporated/C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. CD54HC190, 191; CD54HCT19 1...F PACKAGE CD74HC190 . . . E, NS, OR PW PACKAGE CD74HC191, CD74HCT191 ...E O R M PACKAGE (TOP VIEW) B Q B Q A CTEN D/U Q C Q D GND VCC A CLK RCO MAX/MIN LOAD C D /C0079/C0110 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0109/C0112/C0108/C0105/C0097/C0110/C0116 /C0116/C0111 /C0077/C0073/C0076/C0262/C0080/C0082/C0070/C0262/C0051/C0056/C0053/C0051/C0053/C0044 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115 /C0097/C0114/C0101 /C0116/C0101/C0115/C0116/C0101/C0100 /C0117/C0110/C0108/C0101/C0115/C0115 /C0111/C0116/C0104/C0101/C0114/C0119/C0105/C0115/C0101 /C0110/C0111/C0116/C0101/C0100/C0046 /C0079/C0110 /C0097/C0108/C0108 /C0111/C0116/C0104/C0101/C0114 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115/C0044 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued) When an overflow or underflow of the counter occurs, the MAX/MIN output, which is low during counting, goes high and remains high for one clock cycle. This output can be used for look-ahead carry in high-speed cascading (see Figure 1). The MAX/MIN output also initiates the ripple clock (RCO) output, which normally is high, goes low, and remains low for the low-level portion of the clock pulse. These counters can be cascaded using RCO (see Figure 2). If a decade counter is preset to an illegal state or assumes an illegal state when power is applied, it returns to the normal sequence in one or two counts, as shown in the state diagrams (see Figure 3). FUNCTION TABLE INPUTS FUNCTIONLOAD CTEN D/U CLK FUNCTION H L L Count up H L H Count down L X X X Asynchronous preset H H X X No change D/U or CTEN should be changed only when clock is high. X = Don’t care Low-to-high clock transition
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ’HC190 logic diagram A D/U CLK LOAD LOAD FF0 DATA CLK T Q Q LOAD FF1 DATA CLK T Q Q B 15 1 b c d e f g h i k j l m n o p Q A Q B CTEN
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
’HC190 logic diagram (continued) LOAD FF2 DATA CLK T Q Q LOAD FF3 DATA CLK T Q Q D b c d e fg h i k j l m n C o p MAX/MIN RCO Q C Q D
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ’HC191, ’HCT191 logic diagram C LK D/U LOAD LOAD FF0 DATA CLK T Q Q LOAD FF1 DATA CLK T Q Q LOAD FF2 DATA CLK T Q Q A B 15 1 b c d e f g h i k j l M N C C TEN Q A Q CQ B
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
’HC191, ’HCT191 logic diagram (continued) RCO LOAD FF3 DATA CLK T Q Q 13b c d e f g h i k j l m n D
12 MAX/MIN
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ’HC190 and ’HC191/HCT191 flip-flop Q CLK CL np Q T CLK CK CLK CLK CLK CL CLK LOAD LOAD LOAD LOAD p nn p DATA LOAD np p n np
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003
8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
typical load, count, and inhibit sequence for ’HC190 The following sequence is illustrated below: 1. Load (preset) to BCD 7 2. Count up to 8, 9 (maximum), 0, 1, and 2 3. Inhibit 4. Count down to 1, 0 (minimum), 9, 8, and 7 Parallel Load Preset Input Data Clock Down/Up Clock Enable Terminal Count Ripple Clock Load H H 78 90 1 2 2 2 1 0 9 87 L L L L H H H H H L L L L H Count Up Inhibit Count Down
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 typical load, count, and inhibit sequence for ’HC191 and ’HCT191 The following sequence is illustrated below: 1. Load (preset) to binary 13 2. Count up to 14, 15 (maximum), 0, 1, and 2 3. Inhibit 4. Count down to 1, 0 (minimum), 15, 14, and 13 Data Inputs Data Outputs LOAD A B C D CLK D/U CTEN MAX/MIN Q A Q B Q C Q D Load Count Up Inhibit 13 14 15 0 1 2 RCO Count Down 221 0 1 5 1 4 1 3 L H H L H L
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Figure 1. ’HC190 Synchronous n-Stage Counter With Parallel Gated Terminal Count Figure 2. ’HC191, ’HCT191 Synchronous n-Stage Counter With Parallel Gated Terminal Count Figure 3. ’HC190 State Diagram
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 11POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions for ’HC190 and ’HC191 (see Note 3) TA = 25°C TA = −55°C TO 125°C TA = −40°C TO 85°C UNIT MIN MAX MIN MAX MIN MAX UNIT VCC Supply voltage 2 6 2 6 2 6 V VCC = 2 V 1.5 1.5 1.5 VIH High-level input voltage VCC = 4.5 V 3.15 3.15 3.15 VVIH High-level input voltage VCC = 6 V 4.2 4.2 4.2 V VCC = 2 V 0.5 0.5 0.5 VIL Low-level input voltage VCC = 4.5 V 1.35 1.35 1.35 VVIL Low-level input voltage VCC = 6 V 1.8 1.8 1.8 V VI Input voltage 0 VCC 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC 0 VCC V VCC = 2 V 1000 1000 1000 tt Input transition (rise and fall) time VCC = 4.5 V 500 500 500 nstt Input transition (rise and fall) time VCC = 6 V 400 400 400 ns NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. recommended operating conditions for ’HCT191 (see Note 4) TA = 25°C TA = −55°C TO 125°C TA = −40°C TO 85°C UNIT MIN MAX MIN MAX MIN MAX UNIT VIH High-level input voltage 2 2 2 V VIL Low-level input voltage 0.8 0.8 0.8 V VI Input voltage VCC VCC VCC V VO Output voltage VCC VCC VCC V tt Input transition (rise and fall) time 500 500 500 ns NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
’HC190, ’HC191 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C TA = −55°C TO 125°C TA = −40°C TO 85°C UNITPARAMETER TEST CONDITIONS VCC MIN MAX MIN MAX MIN MAX UNIT 2 V 1.9 1.9 1.9 IOH = −20 µA 4.5 V 4.4 4.4 4.4 VOH VI = VIH or VIL IOH = −20 µA 6 V 5.9 5.9 5.9 VVOH VI = VIH or VIL IOH = −4 mA 4.5 V 3.98 3.7 3.84 V IOH = −5.2 mA 6 V 5.48 5.2 5.34 2 V 0.1 0.1 0.1 IOL = 20 µA 4.5 V 0.1 0.1 0.1 VOL VI = VIH or VIL IOL = 20 µA 6 V 0.1 0.1 0.1 VVOL VI = VIH or VIL IOL = 4 mA 4.5 V 0.26 0.4 0.33 V IOL = 5.2 mA 6 V 0.26 0.4 0.33 II VI = VCC or 0 6 V ±0.1 ±1 ±1 µA ICC VI = VCC or 0, IO = 0 6 V 8 160 80 µA C i 10 10 10 pF ’HCT191 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C TA = −55°C TO 125°C TA = −40°C TO 85°C UNITPARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX MIN MAX UNIT VOH VI = VIH or VIL IOH = −20 µA 4.5 V 4.4 4.4 4.4 VVOH VI = VIH or VIL IOH = −4 mA 4.5 V 3.98 3.7 3.84 V VOL VI = VIH or VIL IOL = 20 µA 4.5 V 0.1 0.1 0.1 VVOL VI = VIH or VIL IOL = 4 mA 4.5 V 0.26 0.4 0.33 V II VI = VCC to GND 5.5 V ±0.1 ±1 ±1 µA ICC VI = VCC or 0, IO = 0 5.5 V 8 160 80 µA ∆ICC † One input at VCC − 2.1 V, Other inputs at 0 or VCC 4.5 V to 5.5 V 100 360 490 450 µA C i 10 10 10 pF † Additional quiescent supply current per input pin, TTL inputs high, 1 unit load HCT INPUT LOADING TABLE INPUTS UNIT LOADS A-D 0.4 CLK 1.5 LOAD 1.5 D/U 1.2 CTEN 1.5 Unit load is /C0110ICC limit specified in electrical characteristics table, (e.g., 360 µA max at 25°C).
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 13POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ’HC190, ’HC191 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 4) VCC TA = 25°C TA = −55°C TO 125°C TA = −40°C TO 85°C UNITVCC MIN MAX MIN MAX MIN MAX UNIT
2 V 6 4 5
fclock Clock frequency† 4.5 V 30 20 25 MHzfclock Clock frequency†
6 V 35 23 29
2 V 80 120 100
LOAD low 4.5 V 16 24 20 tw Pulse duration LOAD low
6 V 14 20 17
nstw Pulse duration 2 V 100 150 125 ns CLK high or low 4.5 V 20 30 25CLK high or low
6 V 17 26 21
2 V 60 90 75
Data before LOAD↑ 4.5 V 12 18 15Data before LOAD↑
6 V 10 15 13
tsu Setup time CTEN before CLK↑ 4.5 V 12 18 15 nstsu Setup time CTEN before CLK↑
2 V 90 135 115
D/U before CLK↑ 4.5 V 18 27 23D/U before CLK↑
6 V 15 23 20
2 V 2 2 2
Data before LOAD↑ 4.5 V 2 2 2Data before LOAD
6 V 2 2 2
th Hold time CTEN before CLK↑ 4.5 V 2 2 2 nsth Hold time CTEN before CLK
2 V 0 0 0
D/U before CLK↑ 4.5 V 0 0 0D/U before CLK
6 V 0 0 0
trec Recovery time LOAD inactive before CLK↑ 4.5 V 12 18 15 nstrec Recovery time LOAD inactive before CLK↑ † Applies to noncascaded operation only. With cascaded counters, clock-to-terminal count propagation delays, CTEN-to-clock setup times, and CTEN -to-clock hold times determine maximum clock frequency. For example, with these HC devices: fmax (CLK )/C0043 1 CLK-to-MAX/C0324MIN propagation delay/C0041CTEN -to-CLK setup time/C0041CTEN -to-CLK hold time/C00431 42 /C004112 /C00412 /C009118 MHz
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
’HC190, ’HC191 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 4) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE VCC TA = 25°C TA = −55°C TO 125°C TA = −40°C TO 85°C UNITPARAMETER (INPUT) (OUTPUT) CAPACITANCE VCC MIN TYP MAX MIN MAX MIN MAX UNIT fmax 4.5 V 30 20 25 MHzfmax
2 V 195 295 245
C L = 50 pF 4.5 V 39 59 49 LOAD Q C L = 50 pF
6 V 33 50 42
C L = 15 pF 5 V 16
2 V 175 265 220
A, B, C, Q C L = 50 pF 4.5 V 35 53 44A, B, C, or D Q C L = 50 pF
6 V 30 45 37or D
C L = 15 pF 5 V 14
2 V 170 255 215
C L = 50 pF 4.5 V 34 51 43 CLK Q C L = 50 pF
6 V 29 43 37
C L = 15 pF 5 V 14
2 V 125 190 155
C L = 50 pF 4.5 V 25 38 31 CLK RCO C L = 50 pF
6 V 21 32 26
C L = 15 pF 5 V 10 nstpd 2 V 210 315 265 ns CLK MAX/MIN C L = 50 pF 4.5 V 42 63 53 CLK MAX/MIN C L = 50 pF
6 V 36 54 45
C L = 15 pF 5 V 18
2 V 150 225 190
C L = 50 pF 4.5 V 30 45 38 D/U RCO C L = 50 pF
6 V 26 38 33
C L = 15 pF 5 V 12
2 V 165 250 205
C L = 50 pF 4.5 V 33 50 41 D/U MAX/MIN C L = 50 pF
6 V 28 43 35
C L = 15 pF 5 V 13 C L = 50 pF 4.5 V 25 38 31 CTEN RCO C L = 50 pF C L = 15 pF 5 V 10
2 V 75 110 95
tt Any C L = 50 pF 4.5 V 15 22 19 nstt Any C L = 50 pF
6 V 13 19 16
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003 15POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ’HCT191 timing requirements over recommended operating free-air temperature range VCC = 4.5 V (unless otherwise noted) (see Figure 5) TA = 25°C TA = −55°C TO 125°C TA = −40°C TO 85°C UNIT MIN MAX MIN MAX MIN MAX UNIT fclock Clock frequency 30 20 25 MHz tw Pulse duration LOAD low 16 24 20 nstw Pulse duration CLK high or low 20 30 25 ns Data before LOAD↑ 12 18 15 tsu Setup time CTEN before CLK↑ 12 18 15 nstsu Setup time D/U before CLK↑ 18 27 23 ns Data before LOAD↑ 2 2 2 th Hold time CTEN before CLK↑ 2 2 2 nsth Hold time D/U before CLK↑ 0 0 0 ns trec Recovery time LOAD inactive before CLK↑ 12 18 15 ns ’HCT191 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 5) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE VCC TA = 25°C TA = −55°C TO 125°C TA = −40°C TO 85°C UNITPARAMETER (INPUT) (OUTPUT) CAPACITANCE VCC MIN TYP MAX MIN MAX MIN MAX UNIT fmax 4.5 V 30 20 25 MHz LOAD Q C L = 50 pF 4.5 V 40 60 50 LOAD Q C L = 15 pF 5 V 17 A, B, C, Q C L = 50 pF 4.5 V 38 57 48A, B, C, or D Q C L = 15 pF 5 V 16 CLK RCO C L = 50 pF 4.5 V 35 53 44 CLK RCO C L = 15 pF 5 V 14 CLK Q C L = 50 pF 4.5 V 27 41 34 tpd CLK Q C L = 15 pF 5 V 11 nstpd CLK MAX/MIN C L = 50 pF 4.5 V 42 63 53 ns CLK MAX/MIN C L = 15 pF 5 V 18 D/U RCO C L = 50 pF 4.5 V 30 45 38 D/U RCO C L = 15 pF 5 V 12 D/U MAX/MIN C L = 50 pF 4.5 V 38 57 48 D/U MAX/MIN C L = 15 pF 5 V 16 CTEN RCO C L = 50 pF 4.5 V 27 41 34 CTEN RCO C L = 15 pF 5 V 11 tt Any C L = 50 pF 4.5 V 15 22 19 ns
/C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0048/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0048 /C0067/C0068/C0053/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0049/C0057/C0049/C0044 /C0067/C0068/C0053/C0052/C0072/C0067/C0084/C0049/C0057/C0049/C0044 /C0067/C0068/C0055/C0052/C0072/C0067/C0084/C0049/C0057/C0049 /C0083/C0089/C0078/C0067/C0072/C0082/C0079/C0078/C0079/C0085/C0083 /C0085/C0080/C0047/C0068/C0079/C0087/C0078 /C0067/C0079/C0085/C0078/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0068/C0079/C0087/C0078/C0047/C0085/C0080 /C0077/C0079/C0068/C0069 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 SCHS275E − MARCH 2002 − REVISED OCTOBER 2003
16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TYP UNIT ’HC190 59 C pd Power dissipation capacitance ’HC191 55 pFC pd Power dissipation capacitance ’HCT191 68 pF
NOTES: A. C L includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. D. For clock inputs, fmax is measured with the input duty cycle at 50%. E. The outputs are measured one at a time with one input transition per measurement. F. tPLZ and tPHZ are the same as tdis. G. tPZL and tPZH are the same as ten. H. tPLH and tPHL are the same as tpd. Figure 4. Load Circuit and Voltage Waveforms
18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
NOTES: A. C L includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. D. For clock inputs, fmax is measured with the input duty cycle at 50%. E. The outputs are measured one at a time with one input transition per measurement. F. tPLZ and tPHZ are the same as tdis. G. tPZL and tPZH are the same as ten. H. tPLH and tPHL are the same as tpd. Figure 5. Load Circuit and Voltage Waveforms
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 5962-8867101EA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type 5962-8994601EA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type CD54HC190F3A ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type CD54HC191F3A ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type CD54HCT191F3A ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type CD74HC190E ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CD74HC190EE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CD74HC190NSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC190NSRE4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC190PW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC190PWE4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC190PWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC190PWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC190PWT ACTIVE TSSOP PW 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC190PWTE4 ACTIVE TSSOP PW 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC191E ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CD74HC191EE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CD74HC191M ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC191M96 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC191M96E4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC191ME4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC191MT ACTIVE SOIC D 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HC191MTE4 ACTIVE SOIC D 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HCT191E ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CD74HCT191EE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CD74HCT191M ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74HCT191ME4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 Addendum-Page 1
(1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 Addendum-Page 2
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M0,10 0,10 0,25 0,50 0,75 0,15 NOM Gage Plane 9,80 9,60 7,90 7,70 2016 6,60 6,40 4040064/F 01/97 0,30 6,60 6,20 0,19 4,30 4,50 0,15 A 1,20 MAX 5,10 4,90 3,10 2,90 A MAX A MIN DIM PINS ** 0,05 4,90 5,10 Seating Plane 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153
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